From nobody Mon Jun 8 09:49:32 2026 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8F5B23F4DFE; Thu, 4 Jun 2026 08:58:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563483; cv=none; b=bigP5SeYkhva+TtOWSrLmgzBDu7gFTlRx5VtGHVHEI8tUWc8X0YWxzN0bM7YfFJvfsr/PtozXt7YDdjiNyilF3sjWj5QHPin4LWfNpNBLAvXKoFlsaWErI+PA+oTO9HzCiCwkbFSp6Um8Z8k57cx1yxkG9HxIPOb55Tjj+KJOu0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563483; c=relaxed/simple; bh=4VNbeuAEBxmJSqCtxGL09pPzAi93oBcZmmlW/auoegw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fob+9E4sBZzmaJfdmrPRXaN+skqrOi03ilJ2a4QyiTaCTuvkewz0cDu7VWDvFGPIn+5MRkIGSBuoVAxMlyWOVb+UStA+6EYb28/2HCj/kUMTVN4KmVDgEhqWedUSPkjBXX8U5xqujwVck3wFcywlANpuzmJ5qsY3BPzCqzFRWwA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8BxJekUPiFq8HkQAA--.39489S3; Thu, 04 Jun 2026 16:57:56 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJAx28ERPiFqlIObAA--.31690S3; Thu, 04 Jun 2026 16:57:55 +0800 (CST) From: Bibo Mao To: Huacai Chen Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH 1/2] KVM: LoongArch: selftests: Enable LASX feature by auto detect method Date: Thu, 4 Jun 2026 16:57:51 +0800 Message-Id: <20260604085752.2820331-2-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260604085752.2820331-1-maobibo@loongson.cn> References: <20260604085752.2820331-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJAx28ERPiFqlIObAA--.31690S3 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Add LSX and LASX features when VM is created. These features are detected firstly, enable it if it is available on host machine. Signed-off-by: Bibo Mao --- .../selftests/kvm/include/loongarch/processor.h | 10 ++++++++++ .../testing/selftests/kvm/lib/loongarch/processor.c | 12 +++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/include/loongarch/processor.h b/to= ols/testing/selftests/kvm/include/loongarch/processor.h index 93dc1fbd2e79..2324e311180f 100644 --- a/tools/testing/selftests/kvm/include/loongarch/processor.h +++ b/tools/testing/selftests/kvm/include/loongarch/processor.h @@ -131,6 +131,16 @@ #define CSR_TLBREHI_PS_SHIFT 0 #define CSR_TLBREHI_PS (0x3fUL << CSR_TLBREHI_PS_SHIFT) =20 +#define LOONGARCH_CPUCFG2 0x2 +#define CPUCFG2_FP BIT(0) +#define CPUCFG2_FPSP BIT(1) +#define CPUCFG2_FPDP BIT(2) +#define CPUCFG2_FPVERS GENMASK(5, 3) +#define CPUCFG2_LSX BIT(6) +#define CPUCFG2_LASX BIT(7) +#define CPUCFG2_LLFTP BIT(14) +#define CPUCFG2_LLFTPREV GENMASK(17, 15) + #define read_cpucfg(reg) \ ({ \ register unsigned long __v; \ diff --git a/tools/testing/selftests/kvm/lib/loongarch/processor.c b/tools/= testing/selftests/kvm/lib/loongarch/processor.c index 64d91fb76522..e7fb54d746f4 100644 --- a/tools/testing/selftests/kvm/lib/loongarch/processor.c +++ b/tools/testing/selftests/kvm/lib/loongarch/processor.c @@ -278,7 +278,7 @@ static void loongarch_set_csr(struct kvm_vcpu *vcpu, u6= 4 id, u64 val) =20 void loongarch_vcpu_setup(struct kvm_vcpu *vcpu) { - int width; + int width, ret; unsigned int cfg; unsigned long val; struct kvm_vm *vm =3D vcpu->vm; @@ -292,6 +292,16 @@ void loongarch_vcpu_setup(struct kvm_vcpu *vcpu) TEST_FAIL("Unknown guest mode, mode: 0x%x", vm->mode); } =20 + /* Enable LSX/LASX feature by detecting host capability */ + cfg =3D CPUCFG2_FP | CPUCFG2_FPSP | CPUCFG2_FPDP | CPUCFG2_LLFTP; + ret =3D __kvm_has_device_attr(vm->fd, KVM_LOONGARCH_VM_FEAT_CTRL, KVM_LOO= NGARCH_VM_FEAT_LSX); + if (!ret) + cfg |=3D CPUCFG2_LSX; + + ret =3D __kvm_has_device_attr(vm->fd, KVM_LOONGARCH_VM_FEAT_CTRL, KVM_LOO= NGARCH_VM_FEAT_LASX); + if (!ret) + cfg |=3D CPUCFG2_LASX; + loongarch_set_cpucfg(vcpu, LOONGARCH_CPUCFG2, cfg); cfg =3D read_cpucfg(LOONGARCH_CPUCFG6); loongarch_set_cpucfg(vcpu, LOONGARCH_CPUCFG6, cfg); =20 --=20 2.39.3 From nobody Mon Jun 8 09:49:32 2026 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6B6A73D6CAE; Thu, 4 Jun 2026 08:57:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563483; cv=none; b=EvH3asb5cw0Z6kI5vqcBWe8RsMYu+FYdK6/bnCcPRrxO6aZ7DdvxNa15lPTYPJaPWESRAlP/8zoSQsqsdAb1TgBVMeHgAXO6iqJtIQgNEhijQWpTkLLhBTpjwl8C9VDj1E3yWGWAwqHdIpMdhYDKYOsX/FsWJzULb42lAbPUANg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563483; c=relaxed/simple; bh=aFjfiS6Ccq8MRExNzQOvB6UC/aSBLiumOfINILAX5Ik=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XuWmHhM29gBVt0VI9xgunCvDhXhFFTd3uRGSBzcEG09dy9JQy4t4RHC3o57KjM35WMU+rVUpEREqGyUJTvf4X2HMdQ4w8yczNeklfZFIA4ptNJutnP/7IKpiV07ScT0cmU0JktolI6hwSM+P0BiReRnwU38eK7HVA0bluUOB2uY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn; spf=pass smtp.mailfrom=loongson.cn; arc=none smtp.client-ip=114.242.206.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8DxhukUPiFq9HkQAA--.45704S3; Thu, 04 Jun 2026 16:57:56 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowJAx28ERPiFqlIObAA--.31690S4; Thu, 04 Jun 2026 16:57:56 +0800 (CST) From: Bibo Mao To: Huacai Chen Cc: kvm@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH 2/2] KVM: LoongArch: selftests: Add FPU test case Date: Thu, 4 Jun 2026 16:57:52 +0800 Message-Id: <20260604085752.2820331-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20260604085752.2820331-1-maobibo@loongson.cn> References: <20260604085752.2820331-1-maobibo@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: qMiowJAx28ERPiFqlIObAA--.31690S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Content-Type: text/plain; charset="utf-8" Add FPU test case and verify FPU register get and set APIs, the FPU width supports 64/128/256 bits. Signed-off-by: Bibo Mao --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/loongarch/fpu_test.c | 144 ++++++++++++++++++ 2 files changed, 145 insertions(+) create mode 100644 tools/testing/selftests/kvm/loongarch/fpu_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index 9118a5a51b89..7d11592b3759 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -224,6 +224,7 @@ TEST_GEN_PROGS_riscv +=3D rseq_test TEST_GEN_PROGS_riscv +=3D steal_time =20 TEST_GEN_PROGS_loongarch =3D loongarch/pmu_test +TEST_GEN_PROGS_loongarch +=3D loongarch/fpu_test TEST_GEN_PROGS_loongarch +=3D arch_timer TEST_GEN_PROGS_loongarch +=3D coalesced_io_test TEST_GEN_PROGS_loongarch +=3D demand_paging_test diff --git a/tools/testing/selftests/kvm/loongarch/fpu_test.c b/tools/testi= ng/selftests/kvm/loongarch/fpu_test.c new file mode 100644 index 000000000000..459996286c83 --- /dev/null +++ b/tools/testing/selftests/kvm/loongarch/fpu_test.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include "kvm_util.h" +#include "processor.h" +#include "loongarch/processor.h" + +struct kvm_fpureg vector =3D {{1, 2, 3, 4 }}; + +static void guest_code(void) +{ + unsigned long val; + struct kvm_fpureg *fp =3D &vector; + + val =3D csr_read(LOONGARCH_CSR_EUEN); + csr_write(val | 7, LOONGARCH_CSR_EUEN); + + __asm__ __volatile__("fld.d $f0, %0, 0\n" : : "r"(fp) :); + GUEST_SYNC(0); + + __asm__ __volatile__("vld $vr0, %0, 0\n" : : "r"(fp) : ); + GUEST_SYNC(1); + + __asm__ __volatile__("xvld $xr0, %0, 0\n" : : "r"(fp) :); + GUEST_SYNC(2); + + __asm__ __volatile__("fst.d $f0, %0, 0\n" : : "r"(fp) : "memory"); + GUEST_SYNC(3); + + __asm__ __volatile__("vst $vr0, %0, 0\n" : : "r"(fp) : "memory"); + GUEST_SYNC(4); + + __asm__ __volatile__("xvst $xr0, %0, 0\n" : : "r"(fp) : "memory"); + GUEST_SYNC(5); + + GUEST_DONE(); +} + +static void run_vcpu(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + int cont; + + cont =3D 1; + while (cont) { + vcpu_run(vcpu); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_PRINTF: + printf("%s", (const char *)uc.buffer); + break; + case UCALL_DONE: + printf("FPU test PASSED\n"); + case UCALL_SYNC: + cont =3D 0; + break; + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + default: + TEST_ASSERT(false, "Unexpected exit: %s", + exit_reason_str(vcpu->run->exit_reason)); + } + } +} + +static bool __vm_has_feature(struct kvm_vm *vm, int feature) +{ + int ret; + + ret =3D __kvm_has_device_attr(vm->fd, KVM_LOONGARCH_VM_FEAT_CTRL, feature= ); + return !ret; +} + + +int main(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct kvm_fpu fpu; + struct kvm_fpureg *fp =3D &vector; + + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); + __TEST_REQUIRE(__vm_has_feature(vm, KVM_LOONGARCH_VM_FEAT_LSX), + "LSX not available, skipping test\n"); + __TEST_REQUIRE(__vm_has_feature(vm, KVM_LOONGARCH_VM_FEAT_LASX), + "LASX not available, skipping test\n"); + + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + sync_global_from_guest(vm, *fp); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 8), "Wanted 0x%llx from f0, got 0x%llx", + fp->val64[0], fpu.fpr[0].val64[0]); + + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 16), "Wanted 0x%llx %llx from vr0, got 0= x%llx %llx", + fp->val64[0], fp->val64[1], + fpu.fpr[0].val64[0], fpu.fpr[0].val64[1]); + + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 32), + "Wanted 0x%llx %llx %llx %llx from xr0, got 0x%llx %llx %llx %llx", + fp->val64[0], fp->val64[1], fp->val64[2], fp->val64[3], + fpu.fpr[0].val64[0], fpu.fpr[0].val64[1], + fpu.fpr[0].val64[2], fpu.fpr[0].val64[3]); + + fpu.fpr[0].val64[0] +=3D 0x10; + vcpu_fpu_set(vcpu, &fpu); + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + sync_global_from_guest(vm, *fp); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 8), "Wanted 0x%llx from f0, got 0x%llx", + fp->val64[0], fpu.fpr[0].val64[0]); + + fpu.fpr[0].val64[0] +=3D 0x10; + fpu.fpr[0].val64[1] +=3D 0x10; + vcpu_fpu_set(vcpu, &fpu); + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + sync_global_from_guest(vm, *fp); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 16), "Wanted 0x%llx %llx from vr0, got 0= x%llx %llx", + fp->val64[0], fp->val64[1], + fpu.fpr[0].val64[0], fpu.fpr[0].val64[1]); + + fpu.fpr[0].val64[0] +=3D 0x10; + fpu.fpr[0].val64[1] +=3D 0x10; + fpu.fpr[0].val64[2] +=3D 0x10; + fpu.fpr[0].val64[3] +=3D 0x10; + vcpu_fpu_set(vcpu, &fpu); + run_vcpu(vcpu); + vcpu_fpu_get(vcpu, &fpu); + sync_global_from_guest(vm, *fp); + TEST_ASSERT(!memcmp(fpu.fpr, fp, 32), + "Wanted 0x%llx %llx %llx %llx from xr0, got 0x%llx %llx %llx %llx", + fp->val64[0], fp->val64[1], fp->val64[2], fp->val64[3], + fpu.fpr[0].val64[0], fpu.fpr[0].val64[1], + fpu.fpr[0].val64[2], fpu.fpr[0].val64[3]); + + run_vcpu(vcpu); + kvm_vm_free(vm); + return 0; +} --=20 2.39.3