From nobody Mon Jun 8 09:49:06 2026 Received: from mail-m32104.qiye.163.com (mail-m32104.qiye.163.com [220.197.32.104]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56B9B3F6C48; Thu, 4 Jun 2026 08:58:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.104 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563518; cv=none; b=JpSl63BrWu3bIWrVHn8PDKNC+JS+tZDWIXxxJNGg5UH8llmL4b9jJV7/l/BPR1v00A1Is3wHY1YOqjR1YU40kWWxiusWRyYr3qoGI1Q8t+uw+FEj6Mx1CqnsPxYrmXw+4LX6wTUYqptvAazICKqNga7KkwukJ3r6ZoojWYG7q8c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563518; c=relaxed/simple; bh=GIAdeH8wm9WTSGRXHgKCuMTsRPgcIZ40zkZ7olu6cjc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uDtc8wdVpMfUzsioI274d4WkSGC46YxHxLgOuJ1RgB49ueNNSDkNrN3EwosHqjF/ZSruH7v2RZVsYH975Sv0+nt7rbJkINxh5wTfjit6Srvry5V1dKtcO4WF91QT27YK6DOPvOVBKmzAFToOJip7ZzB+BiKEIcY6NmVrCDsPWU4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=GF8lR1sA; arc=none smtp.client-ip=220.197.32.104 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="GF8lR1sA" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 410f6c9cf; Thu, 4 Jun 2026 16:53:15 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding , Conor Dooley Subject: [PATCH v5 1/4] dt-bindings: display: bridge: analogix-dp: Add data-lanes support for endpoint Date: Thu, 4 Jun 2026 16:52:17 +0800 Message-Id: <20260604085220.2862986-2-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260604085220.2862986-1-damon.ding@rock-chips.com> References: <20260604085220.2862986-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a9e91d6358203a8kunm52a01cd04098ec X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkZGB1CVktNQh9LSx5LHh8YQlYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=GF8lR1sAeaW3nR5F2c+Jj+S+6Xc7eQANpNg/ZoyrH3+wenSo/oqCAOIjbMdV/kVVEUod7R3lbW/x8vPbSIWCDPNgHcewKaz5XoFROewWQAyYIA+kfPJXmt+1L0tWO/7XNEU+5QUmoQ8+cY6InwWqtSoUWNTmbFFUIcYoDYb7hQU=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=b+nSKBFe+y1XdWvizakdBtzYyTbwGeDxxK3jwOpDtv0=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add data-lanes property support to the port@1 endpoint for physical lane mapping configuration. Lane mapping is mainly used for below scenarios: 1. Correct PCB lane swap and differential line routing crossover without hardware changes; 2. Adapt mismatched lane pin definitions between SoC and eDP panel; 3. Support multiple panel hardware variants on the same board by configuring data-lanes in device tree only. Additionally, add data-lanes setting in Rockchip eDP DT node example to show actual lane mapping usage. Acked-by: Conor Dooley Reviewed-by: Sebastian Reichel Signed-off-by: Damon Ding --- Changes in v2: - Add lane mapping application scenarios in commit message. - Remove redundant deprecated property 'data-lanes' for eDP node. - Update port@1 $ref to /schemas/graph.yaml#/$defs/port-base. Changes in v3: - Squash data-lanes adjustment of Rockchip eDP DT example into this commit. - Add unevaluatedProperties: false to both the port@1 and endpoint nodes. Changes in v5 - Add Acked-by and Reviewed-by tags. --- .../bindings/display/bridge/analogix,dp.yaml | 19 ++++++++++++++----- .../rockchip/rockchip,analogix-dp.yaml | 1 + 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,dp.y= aml b/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml index 62f0521b0924..ecf206871cdd 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml @@ -42,13 +42,22 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/properties/port - description: - Input node to receive pixel data. + description: Input node to receive pixel data. =20 port@1: - $ref: /schemas/graph.yaml#/properties/port - description: - Port node with one endpoint connected to a dp-connector node. + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Port node with one endpoint connected to sink device = node. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + properties: + data-lanes: + minItems: 1 + maxItems: 4 + items: + enum: [ 0, 1, 2, 3 ] =20 required: - port@0 diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,an= alogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchi= p,analogix-dp.yaml index 6548f157fd96..39dafe75a680 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-= dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-= dp.yaml @@ -160,6 +160,7 @@ examples: reg =3D <1>; =20 edp_out_panel: endpoint { + data-lanes =3D <0 1>; remote-endpoint =3D <&panel_in_edp>; }; }; --=20 2.34.1 From nobody Mon Jun 8 09:49:06 2026 Received: from mail-m49212.qiye.163.com (mail-m49212.qiye.163.com [45.254.49.212]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 630483F7A87; Thu, 4 Jun 2026 08:58:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.212 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563517; cv=none; b=bPAwuVsAesYwH3DOg2Z+soZ4EfKtopKam8e6YK33QrqqWGy2/n/d6iqWrykuVt7LY/eq63YgDnfQj480lcoo6ecEGgSvGq7l7Um40n95wawQTXWJXSbZcQUxwHsl989IVp/poekIVqXUUjtJWY5Qnd5dnobs7R5e0kCnMgZ7eqs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563517; c=relaxed/simple; bh=6pUnD1VZFUVIHo2dUlqvjxwiN9CPLJBTFjP0mdEpF98=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NGnV3PGkftuFkYZXdwW/mmfvpv2pmbXdpfRiAV6d+ZmI/xwcy6uKKh+iK9jqzEhzpBC3H5yWS2XeQrHrawGzRv7Kd1LylVx12+GPo8vT0evbxAS+jY8cIyibEfad8z6wFf95pQ8c/JYnOr7JVpfxnQs7K5gzIlKuwvYS6UxPSt4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=ISOkaqn3; arc=none smtp.client-ip=45.254.49.212 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="ISOkaqn3" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 410f6c9da; Thu, 4 Jun 2026 16:53:16 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v5 2/4] drm/dp: Add helper to validate DP lane counts Date: Thu, 4 Jun 2026 16:52:18 +0800 Message-Id: <20260604085220.2862986-3-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260604085220.2862986-1-damon.ding@rock-chips.com> References: <20260604085220.2862986-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a9e91d63bbd03a8kunm52a01cd0409908 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDTktCVhkdGh1DGE4YQkoaTVYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=ISOkaqn33xDGR1+G5j0ZVei2/HBuEVAzaVlXIYZNFH8pjcu3U5DesmPqPNH3xI8kRkuc9lksYWo2zhgHIGxFzozvq2/jyGOz45rHazQTFzXJs0heJ4v4QmH9QEv9GZMb08zLj5fMOMQkzCO4W6QdTmohhmv5cMekmME4J1EyPEI=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=9dIv0NNIoT30XW+12t9f4ox/v0SxbNDGY/P6QADqWYk=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add a generic helper function drm_dp_lane_count_is_valid() to check if a DisplayPort lane count is valid. According to the DP specification, only 1, 2, or 4 lanes are supported. This helper avoids duplicating DP lane count validation logic across individual DisplayPort drivers. Suggested-by: Luca Ceresoli Signed-off-by: Damon Ding --- include/drm/display/drm_dp_helper.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_= dp_helper.h index 8c2d77a032f0..c904cb480d84 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -138,6 +138,12 @@ bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, c= onst u8 dpcd[DP_RECEIVER_C =20 int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); =20 +static inline bool +drm_dp_lane_count_is_valid(int lane_count) +{ + return lane_count =3D=3D 1 || lane_count =3D=3D 2 || lane_count =3D=3D 4; +} + static inline int drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { --=20 2.34.1 From nobody Mon Jun 8 09:49:06 2026 Received: from mail-m155104.qiye.163.com (mail-m155104.qiye.163.com [101.71.155.104]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3511E3FCB1A; Thu, 4 Jun 2026 08:58:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.104 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563522; cv=none; b=qceWd3IESleFtvkn+zJtrgx7B3RGTpfMJTEEHclPDGyjl0cBUa+ftwUvVjfYAp060/pSicjNXwrgFXA/V3gGcOoRG3uqx+rKPYmrsaCkbNyR5jB2r/0RG5YMY/+zGsbEMXE97XUXJcfLaoRtF8vCMO7owkdUQ1pKZsfPxFbeJao= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780563522; c=relaxed/simple; bh=v+ojtBgtrzF2pzzWaO31FV+dHjZc9i32szUx0/SAp/Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SwgjdRhdTR4bpJ3K/KbiqkTTloyG3NaCaylFbx1TRxMJtLWAT7PZGRk1BSr37oAzgZgb4UZKblskUyinXGUsxTS5H7akCU0nDnzSoJ71Ym6bjBMmMAN7cVmDx7Wbcv4jVggxtBCE0v4gjmIy1WLCXldBPqV2Of//y5eGjYLbkXs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=XtPIphHO; arc=none smtp.client-ip=101.71.155.104 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="XtPIphHO" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 410f6c9e1; Thu, 4 Jun 2026 16:53:18 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v5 3/4] drm/bridge: analogix_dp: Add validation for samsung,lane-count property Date: Thu, 4 Jun 2026 16:52:19 +0800 Message-Id: <20260604085220.2862986-4-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260604085220.2862986-1-damon.ding@rock-chips.com> References: <20260604085220.2862986-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a9e91d6412703a8kunm52a01cd040991a X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkZGBkZVhoZHRoZGhoZT0kdTFYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=XtPIphHOd4WY525UFfi7R/qd8U3GUq0V/Ubr7gaGIlz2bVDf7f/pMZllG+LxW4NF2ANz9s05SHwrfTo6kD492++QiWV5Ra8BKRB3tX4f3Puj8wJjhPvWRng2xd5xunDN7qmzajTkKlrX4cuSw4UNnZxbJE1+HDS+0zt+Zczn5uQ=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=vaAgRgvYs/017HC0NYlZCsyPo5zWTchBewVBuZZwOnY=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add validity check for samsung,lane-count to ensure DT-provided lane count values are specification-compliant. Suggested-by: Luca Ceresoli Signed-off-by: Damon Ding --- Changes in v5: - Apply DRM DP helper API to check the validity of DP lane count. --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index 5dc07ff84cd3..9300b0db8785 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1238,6 +1238,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix= _dp_device *dp) { struct device_node *dp_node =3D dp->dev->of_node; struct video_info *video_info =3D &dp->video_info; + int ret; =20 switch (dp->plat_data->dev_type) { case RK3288_DP: @@ -1261,8 +1262,11 @@ static int analogix_dp_dt_parse_pdata(struct analogi= x_dp_device *dp) */ of_property_read_u32(dp_node, "samsung,link-rate", &video_info->max_link_rate); - of_property_read_u32(dp_node, "samsung,lane-count", - &video_info->max_lane_count); + ret =3D of_property_read_u32(dp_node, "samsung,lane-count", + &video_info->max_lane_count); + if (ret || !drm_dp_lane_count_is_valid(video_info->max_lane_count)) + return dev_err_probe(dp->dev, ret ? ret : -EINVAL, + "failed to parse samsung,lane-count\n"); break; } =20 --=20 2.34.1 From nobody Mon Jun 8 09:49:06 2026 Received: from mail-m1973189.qiye.163.com (mail-m1973189.qiye.163.com [220.197.31.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA264401486; Thu, 4 Jun 2026 09:08:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.89 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780564137; cv=none; b=jIdtabxqlu5ndHs0WV860XZoUswzEkjWpOCt7qec+GJKM01BoLbxGAXkD1m055svkUijUioJ075sXPIc0wCYRt0U4HegpPaIZr1x2fVL13Ydx+4/k+zKogHMObAw7WQo1chvJcaDJbmouV2vezTPC26ROTK9NqfGKefQN2luhPU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780564137; c=relaxed/simple; bh=IPQLjrEiNsWN8mkhjLN5cnngBqz6MM4T/9jbyDUck+s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mnn2gGJ2GgJyRvHe1kWdECvoO/iLACdvcDnYn4uuntwgp7iaTtYBhE2QHgGOTyNXd/Wf98091G2iLmDKRhJtUm1/DJN3gTf4liuoA3eBdyanWA62kFiBnMOrct8XvGvm51QsBTKPPcPcvY57SKQYD3306pU8A4t/tmza+jjFsuk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=C+fjXuPi; arc=none smtp.client-ip=220.197.31.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="C+fjXuPi" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 410f6c9e6; Thu, 4 Jun 2026 16:53:19 +0800 (GMT+08:00) From: Damon Ding To: hjc@rock-chips.com, heiko@sntech.de, andy.yan@rock-chips.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, nicolas.frattaroli@collabora.com, cristian.ciocaltea@collabora.com, sebastian.reichel@collabora.com, dmitry.baryshkov@oss.qualcomm.com, luca.ceresoli@bootlin.com, dianders@chromium.org, m.szyprowski@samsung.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Damon Ding Subject: [PATCH v5 4/4] drm/bridge: analogix_dp: Add support for optional data-lanes mapping Date: Thu, 4 Jun 2026 16:52:20 +0800 Message-Id: <20260604085220.2862986-5-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260604085220.2862986-1-damon.ding@rock-chips.com> References: <20260604085220.2862986-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0a9e91d6469103a8kunm52a01cd0409925 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlCShpOVk0fHU8eHUJJTR9NHVYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=C+fjXuPiMsaQvF5ARMIfqrHySgHL79nTwEzI+gvhZVCfkdOe1JqkUXMpS6uvf30oPl2cqneE+nYlfwQebOPg7a7FHz0ZE7j3/4cYpgVGePmWVFBKKYE2sUsG4UkGBk4CYnrD77k4uXt99HXhiudIbfxdjkgo5hsm+utqTFpoPrY=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=O/Xmys3hdVcG95GwMYwNDu2dcFOpni9GNeu8EtSpmFc=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Parse the optional 'data-lanes' device tree property to support custom physical lane mapping configuration. If no valid configuration is found, fall back to the default lane map (0, 1, 2, 3) automatically and keep the driver running. Lane mapping is mainly used for below scenarios: 1. Correct PCB lane swap and differential line routing crossover without hardware changes; 2. Adapt mismatched lane pin definitions between SoC and eDP panel; 3. Support multiple panel hardware variants on the same board by configuring data-lanes in device tree only. Reviewed-by: Sebastian Reichel Signed-off-by: Damon Ding --- Changes in v2: - Add lane mapping application scenarios in commit message. Changes in v5: - Add Reviewed-by tag. --- .../drm/bridge/analogix/analogix_dp_core.c | 56 +++++++++++++++++++ .../drm/bridge/analogix/analogix_dp_core.h | 4 +- .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 +++-- .../gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++ 4 files changed, 70 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index 9300b0db8785..ea525aa3effd 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1234,6 +1234,59 @@ static const struct drm_bridge_funcs analogix_dp_bri= dge_funcs =3D { .detect =3D analogix_dp_bridge_detect, }; =20 +static int analogix_dp_dt_parse_lanes_map(struct analogix_dp_device *dp) +{ + struct video_info *video_info =3D &dp->video_info; + struct device_node *endpoint; + u32 tmp[LANE_COUNT4]; + u32 map[LANE_COUNT4] =3D {0, 1, 2, 3}; + bool used[LANE_COUNT4] =3D {false}; + int num_lanes; + int ret, i; + + memcpy(video_info->lane_map, map, sizeof(map)); + + num_lanes =3D drm_of_get_data_lanes_count_ep(dp->dev->of_node, 1, 0, 1, + video_info->max_lane_count); + if (num_lanes < 0) + return -EINVAL; + + endpoint =3D of_graph_get_endpoint_by_regs(dp->dev->of_node, 1, -1); + if (!endpoint) + return -EINVAL; + + ret =3D of_property_read_u32_array(endpoint, "data-lanes", tmp, num_lanes= ); + of_node_put(endpoint); + if (ret) + return -EINVAL; + + for (i =3D 0; i < num_lanes; i++) { + if (tmp[i] >=3D LANE_COUNT4) { + dev_dbg(dp->dev, "data-lanes[%d] =3D %u is out of range\n", i, tmp[i]); + return -EINVAL; + } + + if (used[tmp[i]]) { + dev_dbg(dp->dev, "data-lanes[%d] =3D %u is duplicate\n", i, tmp[i]); + return -EINVAL; + } + + used[tmp[i]] =3D true; + map[i] =3D tmp[i]; + } + + for (i =3D 0; i < LANE_COUNT4 && num_lanes < LANE_COUNT4; i++) { + if (!used[i]) + map[num_lanes++] =3D i; + } + + dev_dbg(dp->dev, "Using parsed lane map: <%u %u %u %u>\n", map[0], map[1]= , map[2], map[3]); + + memcpy(video_info->lane_map, map, sizeof(map)); + + return 0; +} + static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) { struct device_node *dp_node =3D dp->dev->of_node; @@ -1270,6 +1323,9 @@ static int analogix_dp_dt_parse_pdata(struct analogix= _dp_device *dp) break; } =20 + if (analogix_dp_dt_parse_lanes_map(dp)) + dev_dbg(dp->dev, "No valid data-lanes found, using default lane map\n"); + return 0; } =20 diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.h index 94348c4e3623..a75d0fb8f980 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -137,6 +137,8 @@ struct video_info { =20 int max_link_rate; enum link_lane_count_type max_lane_count; + + u32 lane_map[LANE_COUNT4]; }; =20 struct link_train { @@ -175,7 +177,7 @@ struct analogix_dp_device { /* analogix_dp_reg.c */ void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool ena= ble); void analogix_dp_stop_video(struct analogix_dp_device *dp); -void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable); +void analogix_dp_lane_mapping(struct analogix_dp_device *dp); void analogix_dp_init_analog_param(struct analogix_dp_device *dp); void analogix_dp_init_interrupt(struct analogix_dp_device *dp); void analogix_dp_reset(struct analogix_dp_device *dp); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gp= u/drm/bridge/analogix/analogix_dp_reg.c index ea8401293a23..c1344a3f013a 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -48,16 +48,15 @@ void analogix_dp_stop_video(struct analogix_dp_device *= dp) writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); } =20 -void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable) +void analogix_dp_lane_mapping(struct analogix_dp_device *dp) { + u32 *lane_map =3D dp->video_info.lane_map; u32 reg; =20 - if (enable) - reg =3D LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 | - LANE1_MAP_LOGIC_LANE_2 | LANE0_MAP_LOGIC_LANE_3; - else - reg =3D LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 | - LANE1_MAP_LOGIC_LANE_1 | LANE0_MAP_LOGIC_LANE_0; + reg =3D lane_map[0] << LANE0_MAP_SHIFT; + reg |=3D lane_map[1] << LANE1_MAP_SHIFT; + reg |=3D lane_map[2] << LANE2_MAP_SHIFT; + reg |=3D lane_map[3] << LANE3_MAP_SHIFT; =20 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); } @@ -140,7 +139,7 @@ void analogix_dp_reset(struct analogix_dp_device *dp) =20 usleep_range(20, 30); =20 - analogix_dp_lane_swap(dp, 0); + analogix_dp_lane_mapping(dp); =20 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gp= u/drm/bridge/analogix/analogix_dp_reg.h index 12735139046c..ac914e37089b 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h @@ -209,6 +209,10 @@ #define LANE0_MAP_LOGIC_LANE_1 (0x1 << 0) #define LANE0_MAP_LOGIC_LANE_2 (0x2 << 0) #define LANE0_MAP_LOGIC_LANE_3 (0x3 << 0) +#define LANE3_MAP_SHIFT (6) +#define LANE2_MAP_SHIFT (4) +#define LANE1_MAP_SHIFT (2) +#define LANE0_MAP_SHIFT (0) =20 /* ANALOGIX_DP_ANALOG_CTL_1 */ #define TX_TERMINAL_CTRL_50_OHM (0x1 << 4) --=20 2.34.1