From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A50723BFADD for ; Thu, 4 Jun 2026 05:26:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550796; cv=none; b=OAFPuJgUkp2zPelZxKGmRtDRZINk5LPek5DqxxTMiWwsfEY/0yKHtj0Jr4DTHIaNwKHVG7Yt+r9SmBbYbAt8xvc847cEzGWfiru5v9Cw7n718wMPVzckrLUHjvYYDpO9cDCy5iI3KgS+OU9h+dkriqZVSCvXRSKEPolIdBS9Ri4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550796; c=relaxed/simple; bh=BVccFCmjXwoxPbXDwMrtGs37J0RlIlOlUSSCQBzfvOM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fvdjlaqMbUExAUCDpUrydc+qeKoEFtmAwYSuigbgUUBP1SXaeNLdKU6ov8u23RXOzuHOy21jXtB458uX+oJi4R/CGRSe1Y1GJzc/+4MNrDhMDOzJ3KpqAOf0oW6rZsg77e3/KM8frK6sP1JEzKrt+IyiOoUQ3n5LkbfSIuKrHI0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=cuL8J2vc; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=T0/4QHBJ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="cuL8J2vc"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="T0/4QHBJ" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6545PkhG994671 for ; Thu, 4 Jun 2026 05:26:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= ZqHvjj+Oc3HiPUaRfQW46Ggf7EtaZUjvLHZxHJcckEc=; b=cuL8J2vcO2XECja3 1fsR0cXMtdJ5Qnl59hY09yOA5PCaNt6K3JXBsqmjopbnVnofnUOYkwq/Iky2PfQc shMy6K/GPYGKueHYTSPf6LJcGHZBmRHH3BHZ3Y6sir57hDx94DxEQdtWRzCDVde/ 4ljGE3BA/LkjKfHgtP8qyFx15oC+SHrCZVyX4zwIvZB8Mh2ymZGKXk9Sp88wOpiH ELGgEs77BSJe1qMkBCITvnCp0kDtGaTOUPoMzWc6zcyQVuTad/30Sv5Ssc49DDWq p3TOp2Zi9FSBcBIbPP/1Uq2a8J2Eq1H93kz5lZLBg6KMrwEMlLi6TxFTc8XfOt4a U4jmRA== Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ek374r02k-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:26:33 +0000 (GMT) Received: by mail-pg1-f198.google.com with SMTP id 41be03b00d2f7-c85dc345ac8so229788a12.1 for ; Wed, 03 Jun 2026 22:26:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550793; x=1781155593; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZqHvjj+Oc3HiPUaRfQW46Ggf7EtaZUjvLHZxHJcckEc=; b=T0/4QHBJ1E7i8PVKuuIz2X4DMBOsOhXnakm6c4RzPd8pSckFTNg7iBkRW+xAwYn+ig 9CeCnzynqFovm2Z/UaXURu5tYdW+OhTK2jOXloIk0QDTFzBfyYehSoUBAodcauEtAnbX 4aTz1F4x4nB4BjH262cdcVbM1akUijPKQARZgUTM9EwtAajJuSJFNIQfoPaEcHK3kzWq 1rRDaWUFmxccTuS+mZkqdm0xlzdM/I85n9Vm1P4QDNwk7ZYFgxmB/GO9bZ/xn5djFZkh cK0GjMIxBNznO2aPVyf1MEEdI+w9uBg0dJoTCTXyMqKE/5SW3VRCmmgz7A2RUOWT6TBS wqoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550793; x=1781155593; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=ZqHvjj+Oc3HiPUaRfQW46Ggf7EtaZUjvLHZxHJcckEc=; b=iGydJtqGe8SbNZmGYRol9syg+SzumCCUQ6AamJHZRmP9pIJnKw/HKFU9G8sPfpOOHG UNf64nbkJE2zx82QujNylRkQMw2Lw1zx1+OOfCICNe83JaEblF0+6NiTBUtWKYQbBfRP v2YDI3FYIuHOjYWvq+TrGf/WXwlImpqfiOyGJ1ncGXbJUKulbdBjkoriKSX0x3vTFkRx j0hNwZsdTY8y4qyUAC3XTZ8yWaTqXZhOaaZ9+HwDNOXGPCoBQi58o4Vbu9/S48bhZGaB 04EpLDmdGBKNaX18Q2KEFEpx9rz46NNM7q+vhyBjryT3ABJXuhgX0ZqF9ljesdel5RUZ 64Uw== X-Forwarded-Encrypted: i=1; AFNElJ8wWhzBOOOdeMGrTBo6VpAz5W6qik7jpiIMvFofCBA+kobRC3hS0fupQpPeG2u0YHnByJ1/6uCdNr0D7UE=@vger.kernel.org X-Gm-Message-State: AOJu0YxyfDmibsPAlB8bGnhQQuzjA6XrfxrIFLOWPX8V7YWb5QNWTAE3 o7wHV1wMAdIipuvNBBgpXazIH/RCOnoKVQB/ZxALcjZlGM5S8YPMm/436WaYXnTLNtiMHTcHbSh f7dyMuKdqigLxw2puI+MB2s5vBeDQ3vFZHHbISdONDtL46ZYrqXDkB+xUKhiQJ0EXag0= X-Gm-Gg: Acq92OGOnPLn1fP7yv4SAytHJxBrVVnncQQcgNhi6PJdvuytCzhwkKjfg7vf7oDuKR8 1HaDVmpsxyt7/aDlaPrkqMJ2KC1uZYUksNVdB21kc/8Q27VHOqb2ErGyH0vSBITuXJ5u5OeOQdM IcEbYmqLLt7hE8H9A7h3rLNV7eEYesRyY9t24UL4x7pwZuCSEjbxC253xlwQ1MwFB/S2Y8Vy7QB ePlc7rErmE4JADDmcm9IjOLQA1o9xN419wKLaVpuVZ4mfUrSdU83AlnEO6IBMbjIQd4hRIM3DRT /6wScn5BhUVu4P3lGVxbJhsutmAHB/RuG7oBFKi58d/pwZ8uJ7h4Dp+fcWJ1whdQoJOmllyl7lM scJMK994DvRJzpEBrf/vHhPmqVV6+MnGUoZbeGofbC0LYGEoIo1NcUFGFu51TIgw= X-Received: by 2002:a05:6a00:951b:b0:842:2419:6bfe with SMTP id d2e1a72fcca58-84284e36473mr6824946b3a.7.1780550792922; Wed, 03 Jun 2026 22:26:32 -0700 (PDT) X-Received: by 2002:a05:6a00:951b:b0:842:2419:6bfe with SMTP id d2e1a72fcca58-84284e36473mr6824931b3a.7.1780550792451; Wed, 03 Jun 2026 22:26:32 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:31 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:07 +0530 Subject: [PATCH v4 01/13] clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-1-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA0OSBTYWx0ZWRfX7o4W2Jld9pds NzejIeylPjiGvqZoS+dmB97Se0g6PvfCW9QHBHRcCNat9Q8b9YZn/7dwUgRJV0i53e0KnO1SVgi AJbYgmavSUxjg5ENi0JKbdJQoVP53FNfMiijbQnVoZWqEFqHP82NoGzzqJMhUFuGINA//K1tKvO fpbdeuLhW5UC2J9BIy23H8Zu3M3ctd1Xscrdf07Aqz1P4vo5PbQlzp6PzOx5y64Hz9zYflRCtw9 Rchys43vdxmItJc8X5ZJAzbQdv9iLqDD1RFU+ALPa8RCu/inWd1umcR2aUuLedhCdanntPLkKS5 6aAzualulwTbyuPDh+IqrXJDsSYEoPsz+aJTuvGLke3Ns9kO/FDwXyM0PsEA9GKIFj9T07I5SWR 9QZsQnzbJey6gJ0s8S+uUjvaomkKjo8GY5AMMO1u0+Xew1IV2LM/n8fxOIVx+2ed8zRQTrCG2Hn Wm7UzKkW/u2kulvWiOw== X-Proofpoint-GUID: MK98ijpyfpKT6FRdS7_J-WMy_BmbmV88 X-Proofpoint-ORIG-GUID: MK98ijpyfpKT6FRdS7_J-WMy_BmbmV88 X-Authority-Analysis: v=2.4 cv=eJsjSnp1 c=1 sm=1 tr=0 ts=6a210c89 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=_NXGYkT8nB-KqtbFvMoA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 phishscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040049 Some GCC branch clocks are required to be kept always-on due to the hardware requirements. Drop the modelling of those always-on QCM2290 GCC clocks and use the latest .clk_cbcr convention to keep them enabled from probe. Signed-off-by: Imran Shaik --- drivers/clk/qcom/gcc-qcm2290.c | 160 +++++--------------------------------= ---- 1 file changed, 18 insertions(+), 142 deletions(-) diff --git a/drivers/clk/qcom/gcc-qcm2290.c b/drivers/clk/qcom/gcc-qcm2290.c index 6684cab63ae1160848631d1f8cd3c9cb691ff4ec..8d18bbbca0aaf92b430b749caa1= 6cbae79abfcd7 100644 --- a/drivers/clk/qcom/gcc-qcm2290.c +++ b/drivers/clk/qcom/gcc-qcm2290.c @@ -1397,36 +1397,6 @@ static struct clk_branch gcc_cam_throttle_rt_clk =3D= { }, }; =20 -static struct clk_branch gcc_camera_ahb_clk =3D { - .halt_reg =3D 0x17008, - .halt_check =3D BRANCH_HALT_DELAY, - .hwcg_reg =3D 0x17008, - .hwcg_bit =3D 1, - .clkr =3D { - .enable_reg =3D 0x17008, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_camera_ahb_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - -static struct clk_branch gcc_camera_xo_clk =3D { - .halt_reg =3D 0x17028, - .halt_check =3D BRANCH_HALT, - .clkr =3D { - .enable_reg =3D 0x17028, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_camera_xo_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_camss_axi_clk =3D { .halt_reg =3D 0x58044, .halt_check =3D BRANCH_HALT, @@ -1825,22 +1795,6 @@ static struct clk_branch gcc_cfg_noc_usb3_prim_axi_c= lk =3D { }, }; =20 -static struct clk_branch gcc_disp_ahb_clk =3D { - .halt_reg =3D 0x1700c, - .halt_check =3D BRANCH_HALT, - .hwcg_reg =3D 0x1700c, - .hwcg_bit =3D 1, - .clkr =3D { - .enable_reg =3D 0x1700c, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_disp_ahb_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_regmap_div gcc_disp_gpll0_clk_src =3D { .reg =3D 0x17058, .shift =3D 0, @@ -1899,20 +1853,6 @@ static struct clk_branch gcc_disp_throttle_core_clk = =3D { }, }; =20 -static struct clk_branch gcc_disp_xo_clk =3D { - .halt_reg =3D 0x1702c, - .halt_check =3D BRANCH_HALT, - .clkr =3D { - .enable_reg =3D 0x1702c, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_disp_xo_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gp1_clk =3D { .halt_reg =3D 0x4d000, .halt_check =3D BRANCH_HALT, @@ -1964,22 +1904,6 @@ static struct clk_branch gcc_gp3_clk =3D { }, }; =20 -static struct clk_branch gcc_gpu_cfg_ahb_clk =3D { - .halt_reg =3D 0x36004, - .halt_check =3D BRANCH_HALT, - .hwcg_reg =3D 0x36004, - .hwcg_bit =3D 1, - .clkr =3D { - .enable_reg =3D 0x36004, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_gpu_cfg_ahb_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gpu_gpll0_clk_src =3D { .halt_check =3D BRANCH_HALT_DELAY, .clkr =3D { @@ -2012,19 +1936,6 @@ static struct clk_branch gcc_gpu_gpll0_div_clk_src = =3D { }, }; =20 -static struct clk_branch gcc_gpu_iref_clk =3D { - .halt_reg =3D 0x36100, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x36100, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_gpu_iref_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_gpu_memnoc_gfx_clk =3D { .halt_reg =3D 0x3600c, .halt_check =3D BRANCH_VOTED, @@ -2439,22 +2350,6 @@ static struct clk_branch gcc_sdcc2_apps_clk =3D { }, }; =20 -static struct clk_branch gcc_sys_noc_cpuss_ahb_clk =3D { - .halt_reg =3D 0x2b06c, - .halt_check =3D BRANCH_HALT_VOTED, - .hwcg_reg =3D 0x2b06c, - .hwcg_bit =3D 1, - .clkr =3D { - .enable_reg =3D 0x79004, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_sys_noc_cpuss_ahb_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_sys_noc_usb3_prim_axi_clk =3D { .halt_reg =3D 0x1a080, .halt_check =3D BRANCH_HALT, @@ -2605,21 +2500,6 @@ static struct clk_branch gcc_venus_ctl_axi_clk =3D { }, }; =20 -static struct clk_branch gcc_video_ahb_clk =3D { - .halt_reg =3D 0x17004, - .halt_check =3D BRANCH_HALT, - .hwcg_reg =3D 0x17004, - .hwcg_bit =3D 1, - .clkr =3D { - .enable_reg =3D 0x17004, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_video_ahb_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gcc_video_axi0_clk =3D { .halt_reg =3D 0x1701c, .halt_check =3D BRANCH_HALT, @@ -2686,19 +2566,6 @@ static struct clk_branch gcc_video_venus_ctl_clk =3D= { }, }; =20 -static struct clk_branch gcc_video_xo_clk =3D { - .halt_reg =3D 0x17024, - .halt_check =3D BRANCH_HALT, - .clkr =3D { - .enable_reg =3D 0x17024, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gcc_video_xo_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct gdsc gcc_camss_top_gdsc =3D { .gdscr =3D 0x58004, .pd =3D { @@ -2775,8 +2642,6 @@ static struct clk_regmap *gcc_qcm2290_clocks[] =3D { [GCC_BOOT_ROM_AHB_CLK] =3D &gcc_boot_rom_ahb_clk.clkr, [GCC_CAM_THROTTLE_NRT_CLK] =3D &gcc_cam_throttle_nrt_clk.clkr, [GCC_CAM_THROTTLE_RT_CLK] =3D &gcc_cam_throttle_rt_clk.clkr, - [GCC_CAMERA_AHB_CLK] =3D &gcc_camera_ahb_clk.clkr, - [GCC_CAMERA_XO_CLK] =3D &gcc_camera_xo_clk.clkr, [GCC_CAMSS_AXI_CLK] =3D &gcc_camss_axi_clk.clkr, [GCC_CAMSS_AXI_CLK_SRC] =3D &gcc_camss_axi_clk_src.clkr, [GCC_CAMSS_CAMNOC_ATB_CLK] =3D &gcc_camss_camnoc_atb_clk.clkr, @@ -2817,22 +2682,18 @@ static struct clk_regmap *gcc_qcm2290_clocks[] =3D { [GCC_CAMSS_TOP_AHB_CLK] =3D &gcc_camss_top_ahb_clk.clkr, [GCC_CAMSS_TOP_AHB_CLK_SRC] =3D &gcc_camss_top_ahb_clk_src.clkr, [GCC_CFG_NOC_USB3_PRIM_AXI_CLK] =3D &gcc_cfg_noc_usb3_prim_axi_clk.clkr, - [GCC_DISP_AHB_CLK] =3D &gcc_disp_ahb_clk.clkr, [GCC_DISP_GPLL0_CLK_SRC] =3D &gcc_disp_gpll0_clk_src.clkr, [GCC_DISP_GPLL0_DIV_CLK_SRC] =3D &gcc_disp_gpll0_div_clk_src.clkr, [GCC_DISP_HF_AXI_CLK] =3D &gcc_disp_hf_axi_clk.clkr, [GCC_DISP_THROTTLE_CORE_CLK] =3D &gcc_disp_throttle_core_clk.clkr, - [GCC_DISP_XO_CLK] =3D &gcc_disp_xo_clk.clkr, [GCC_GP1_CLK] =3D &gcc_gp1_clk.clkr, [GCC_GP1_CLK_SRC] =3D &gcc_gp1_clk_src.clkr, [GCC_GP2_CLK] =3D &gcc_gp2_clk.clkr, [GCC_GP2_CLK_SRC] =3D &gcc_gp2_clk_src.clkr, [GCC_GP3_CLK] =3D &gcc_gp3_clk.clkr, [GCC_GP3_CLK_SRC] =3D &gcc_gp3_clk_src.clkr, - [GCC_GPU_CFG_AHB_CLK] =3D &gcc_gpu_cfg_ahb_clk.clkr, [GCC_GPU_GPLL0_CLK_SRC] =3D &gcc_gpu_gpll0_clk_src.clkr, [GCC_GPU_GPLL0_DIV_CLK_SRC] =3D &gcc_gpu_gpll0_div_clk_src.clkr, - [GCC_GPU_IREF_CLK] =3D &gcc_gpu_iref_clk.clkr, [GCC_GPU_MEMNOC_GFX_CLK] =3D &gcc_gpu_memnoc_gfx_clk.clkr, [GCC_GPU_SNOC_DVM_GFX_CLK] =3D &gcc_gpu_snoc_dvm_gfx_clk.clkr, [GCC_GPU_THROTTLE_CORE_CLK] =3D &gcc_gpu_throttle_core_clk.clkr, @@ -2870,7 +2731,6 @@ static struct clk_regmap *gcc_qcm2290_clocks[] =3D { [GCC_SDCC2_AHB_CLK] =3D &gcc_sdcc2_ahb_clk.clkr, [GCC_SDCC2_APPS_CLK] =3D &gcc_sdcc2_apps_clk.clkr, [GCC_SDCC2_APPS_CLK_SRC] =3D &gcc_sdcc2_apps_clk_src.clkr, - [GCC_SYS_NOC_CPUSS_AHB_CLK] =3D &gcc_sys_noc_cpuss_ahb_clk.clkr, [GCC_SYS_NOC_USB3_PRIM_AXI_CLK] =3D &gcc_sys_noc_usb3_prim_axi_clk.clkr, [GCC_USB30_PRIM_MASTER_CLK] =3D &gcc_usb30_prim_master_clk.clkr, [GCC_USB30_PRIM_MASTER_CLK_SRC] =3D &gcc_usb30_prim_master_clk_src.clkr, @@ -2887,13 +2747,11 @@ static struct clk_regmap *gcc_qcm2290_clocks[] =3D { [GCC_VCODEC0_AXI_CLK] =3D &gcc_vcodec0_axi_clk.clkr, [GCC_VENUS_AHB_CLK] =3D &gcc_venus_ahb_clk.clkr, [GCC_VENUS_CTL_AXI_CLK] =3D &gcc_venus_ctl_axi_clk.clkr, - [GCC_VIDEO_AHB_CLK] =3D &gcc_video_ahb_clk.clkr, [GCC_VIDEO_AXI0_CLK] =3D &gcc_video_axi0_clk.clkr, [GCC_VIDEO_THROTTLE_CORE_CLK] =3D &gcc_video_throttle_core_clk.clkr, [GCC_VIDEO_VCODEC0_SYS_CLK] =3D &gcc_video_vcodec0_sys_clk.clkr, [GCC_VIDEO_VENUS_CLK_SRC] =3D &gcc_video_venus_clk_src.clkr, [GCC_VIDEO_VENUS_CTL_CLK] =3D &gcc_video_venus_ctl_clk.clkr, - [GCC_VIDEO_XO_CLK] =3D &gcc_video_xo_clk.clkr, [GPLL0] =3D &gpll0.clkr, [GPLL0_OUT_AUX2] =3D &gpll0_out_aux2.clkr, [GPLL1] =3D &gpll1.clkr, @@ -2943,6 +2801,18 @@ static struct gdsc *gcc_qcm2290_gdscs[] =3D { [HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC] =3D &hlos1_vote_mm_snoc_mmu_tbu_nrt= _gdsc, }; =20 +static const u32 gcc_qcm2290_critical_cbcrs[] =3D { + 0x17008, /* GCC_CAMERA_AHB_CLK */ + 0x17028, /* GCC_CAMERA_XO_CLK */ + 0x1700c, /* GCC_DISP_AHB_CLK */ + 0x1702c, /* GCC_DISP_XO_CLK */ + 0x36004, /* GCC_GPU_CFG_AHB_CLK */ + 0x36100, /* GCC_GPU_IREF_CLK */ + 0x79004, /* GCC_SYS_NOC_CPUSS_AHB_CLK */ + 0x17004, /* GCC_VIDEO_AHB_CLK */ + 0x17024, /* GCC_VIDEO_XO_CLK */ +}; + static const struct clk_rcg_dfs_data gcc_dfs_clocks[] =3D { DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk_src), DEFINE_RCG_DFS(gcc_qupv3_wrap0_s1_clk_src), @@ -2960,6 +2830,11 @@ static const struct regmap_config gcc_qcm2290_regmap= _config =3D { .fast_io =3D true, }; =20 +static const struct qcom_cc_driver_data gcc_qcm2290_driver_data =3D { + .clk_cbcrs =3D gcc_qcm2290_critical_cbcrs, + .num_clk_cbcrs =3D ARRAY_SIZE(gcc_qcm2290_critical_cbcrs), +}; + static const struct qcom_cc_desc gcc_qcm2290_desc =3D { .config =3D &gcc_qcm2290_regmap_config, .clks =3D gcc_qcm2290_clocks, @@ -2968,6 +2843,7 @@ static const struct qcom_cc_desc gcc_qcm2290_desc =3D= { .num_resets =3D ARRAY_SIZE(gcc_qcm2290_resets), .gdscs =3D gcc_qcm2290_gdscs, .num_gdscs =3D ARRAY_SIZE(gcc_qcm2290_gdscs), + .driver_data =3D &gcc_qcm2290_driver_data, }; =20 static const struct of_device_id gcc_qcm2290_match_table[] =3D { --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77A533BFAF7 for ; Thu, 4 Jun 2026 05:26:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550800; cv=none; b=BGc2wnQhZPjDrE5kzV8FGfM8xXLyHYm87zJQ/zTX9zCdCmxhoMgWl3EXHK9+vnthgLoVbdh2OB1dtT+VZ0SD6NUv6oPz5kLq0E5/VzvEa9xr82T4b7lYh4Jc+lCbuC+46T4dZxzZMovWJsAr6eHa3SJnyHL55ra1FFCE1AE/k0c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550800; c=relaxed/simple; bh=B5z29ywrBKYbX7HkV5T+1ROTV9fAvOR3TfGmv4njIVU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lWciqyr4rRcmvnWfAqlfe7b7AiHk06qGg4u7UUJbqPmalHEMT/JZRsTVpzhLeTH8auvuc/oi5Qg+7+QPOsx2n8uWHZ/mlOUxDeoMyD+w1lvOxn2enq2O8MA4qOT+jRrQP9tjY6pebJs/lIcJuE/71rEftqKf/p5xTeceTdZrbfc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=bRmE5MB4; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=YxqKUiMk; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="bRmE5MB4"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="YxqKUiMk" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6542HqnH2260708 for ; Thu, 4 Jun 2026 05:26:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= EZxgtPE3V36We0kq/nIqe2bKsweupeP7AxqN5pPOXwg=; b=bRmE5MB4NDUX3mYC eddDc3+alG+LNsu50nSnawTmxqiT9Kw5IlvjUhhxY3sCgiErhkaJ8/UP8ZPHqtbi +wpjGriTF+PDLYOMgsIu1cIggPK0XC2r2Vmh/+DGYACwTWFX5NcOr9oP/KH7Sto4 5VguRwM28dXHMJSByPz76EijkwrVvicVVE/7G2fW6HOqVzxeLAROPctZSEo1YyWr ife7tD1TnLHHT0XO2d6HWu1pN2q7Rgf0WUjDn32b+j/OoTUu8pgk9n4WPUD/TawM AdhtXoUv/IsHWs7c1bMXX+QD28NvsWRqk5bvwOEU8VL1ZOAAp379xsWva/fxzaLx znVEFg== Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejr2mjga5-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:26:38 +0000 (GMT) Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-8422a0eee68so513985b3a.0 for ; Wed, 03 Jun 2026 22:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550798; x=1781155598; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EZxgtPE3V36We0kq/nIqe2bKsweupeP7AxqN5pPOXwg=; b=YxqKUiMkX1f2Rw3TT+qGXgclgo9Omk2EH72plE8t/bZnig+0v8RcqCQvZjpFxuf3B4 Ljsp62ptXGwusdSsq95U1Tu4jo08OWul6wPY+r7Ls6WEkpCsQp5QvdZcFl4tOJmNyBJx CdvjnWmau/pKqQp4vnf1V763iIj5R0vSU5uQazVkOjJUaABWSg1GzvF8gZlL7LFcH1E0 RakHVz6v/hr9kDw2oYkLO3rK90IzZmrn2nmnSw4GsEkXkgJuvsAP3UwYLrYF4wUUdiqr Jb8HjVvJ0NwRI93+f6dnAmZ8WpXghY2VbTM7XdG3AjRKD3dugw8Dx1mU98c/6C1lkkQG W6ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550798; x=1781155598; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=EZxgtPE3V36We0kq/nIqe2bKsweupeP7AxqN5pPOXwg=; b=dcFTnq6dBIcNUUNAUKSSApfq5BWb5tHAxZyRIMYHKJmkjU03w3w1gJoLKUJUGfoVA6 K6hJS1qxNIVuaRcNJ4ILnzAojDIjm3adPS6aGSm5vSKZ9Ihttdf6hgi5t5VCcFdPAZ01 FdIHOd4Hmpyd4UsH2ryxv9ZxYv7FVkhY3fX9UsEnswIMvBieeNTsesePPdjv29dgVKle DR9UPHl2/BpLLcrlV/MMINogbSLkWMUeJgcAXVR+bT9vqBc3WrW0wASWl66Q8Zs95GBL Z274+k9yMy61q19VYSsB36JXM1vO5ALjHwba+mjxF6xewFLxLoXK32o4RetTdeK41/6A CN1w== X-Forwarded-Encrypted: i=1; AFNElJ+YXkqEUqB7kPE5JQCMJdv8eFlSgeOnCw7eM1BE2tfxzyDyyY9BC303pk3H9BZYYlRKuX4kyFxT6oCJa0A=@vger.kernel.org X-Gm-Message-State: AOJu0Yw06Rl1Ac+W3BFtHsDN86LlzBl26Ls4dXFWtaHP4A630YnaldhZ sXk8t5Vg6DOZFwpggXphWDHSZMuPUOiZrEmwUWattHZPmvBNjgXkCrc7S9+q8l9GtT3KvRZfirp 94OAMwRClB+O2qt5itU3UCmKSgiDGbjG8z8U4Zmx1nVYc+istQLrUf5h8H28Fo7Hnr7o= X-Gm-Gg: Acq92OHspXO0gSrjgKB91FkUnpUBiC8RWEcjPzbAs8kDg9p2LiXLgQL9qWtH3VOAwSE dgZs4kt5dvAtoDVMQNKBM5GoAf/o4wYf5F7MIDD7212TCT2SZ/E3xSu9PQNz7lJfb3J8Bg89T9q NNtadjq9cOSH0SI/evuhg18GIOXLmNqCD7/LE0/wPf8wCo+ghjyE0BWfihOxrmdVw15ZPqhK6R2 TbuqdOsblfxLHhb76AjWlhSH//gnsCxJqcmGYhd7mGshdLfPgMEq3znkjPdGZ+TU0QZSR03I/6n WEPLYSdSBdgiX/69+eBD0hHFtSQIFtuUZayNLVwYor4OqCH+BNf75X+LAVLLZjwxHSZ4mFnlBjL k2o9+6ytNIM2k5k4QfAEHkMht7/97DCPOsoPJxfCnv0Uk1trB7rhDdegNIscTbCM= X-Received: by 2002:a05:6a00:f0f:b0:842:670d:f6dc with SMTP id d2e1a72fcca58-84284e8e3damr6205885b3a.27.1780550798197; Wed, 03 Jun 2026 22:26:38 -0700 (PDT) X-Received: by 2002:a05:6a00:f0f:b0:842:670d:f6dc with SMTP id d2e1a72fcca58-84284e8e3damr6205862b3a.27.1780550797778; Wed, 03 Jun 2026 22:26:37 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:37 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:08 +0530 Subject: [PATCH v4 02/13] dt-bindings: clock: qcom,qcm2290-dispcc: Add DSI1 PHY and sleep clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-2-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: 6puAgbT_R-ps_I_f2rO52X161YndqKQM X-Proofpoint-ORIG-GUID: 6puAgbT_R-ps_I_f2rO52X161YndqKQM X-Authority-Analysis: v=2.4 cv=A91c+aWG c=1 sm=1 tr=0 ts=6a210c8e cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=z-ZRDpFp9XMTG1_t9IYA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX2K3xREcwpJ48 GvuVfQ/Fm5Birz5IGg6JeIL1FtKFvUP8HGyj+2qpkIPEgQiHlro1NKUDhb8JZSv3Dv5iWuXuqHq 3h32MlJwrzoOn0CY/mmaLfS9SyO8sfnsITbIoNDGaJLVAaTe2pLBSS8KEnnpQeQs6/qskW2RjHe Qx9vMIuNKBuKAkXk4AEaVrtLOlX617znC7W5MSGji5P5S3z/7+C8TUMI3yx2j+IFslRKzslCocT l83UPCxsutSf8eME6l43XYhsm4aJSbfgHKy2hkMsC5luCTx3/OOE9ULAMTMBseoL163+qm1ahHq JzhWbbnZsxjaWbrfgsDPFR84ORVZ0iS3ebOcO/fSrG2kucZSIMDfZUdZsndpYsb4L4/d3c2BCUt Lib4HUgdC/IKkquBXSJo5YdvpGUCxHP8pfZR57lBL8/3ACaX20Tm0m5SrbVzvZhT2p7rBy6ZtH4 wdtvMSywRxHa/UzYS6g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 suspectscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 DISPCC binding to document additional clock inputs supported by the hardware, including DSI1 PHY byte/pixel clocks and the sleep clock, alongside the existing clock list. This is an ABI extension, and existing clock inputs ordering is unchanged. Signed-off-by: Imran Shaik --- .../bindings/clock/qcom,qcm2290-dispcc.yaml | 20 ++++++++++++++++= ---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.ya= ml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml index 4a533b45eec2d8e7b866c3436bfe6f80fcd714fb..24f2cce033f6e109b65a79553fb= a5295eb9adf3a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml @@ -25,8 +25,11 @@ properties: - description: Board active-only XO source - description: GPLL0 source from GCC - description: GPLL0 div source from GCC - - description: Byte clock from DSI PHY - - description: Pixel clock from DSI PHY + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: Byte clock from DSI PHY1 + - description: Pixel clock from DSI PHY1 + - description: Board sleep clock =20 clock-names: items: @@ -36,6 +39,9 @@ properties: - const: gcc_disp_gpll0_div_clk_src - const: dsi0_phy_pll_out_byteclk - const: dsi0_phy_pll_out_dsiclk + - const: dsi1_phy_pll_out_byteclk + - const: dsi1_phy_pll_out_dsiclk + - const: sleep_clk =20 required: - compatible @@ -61,13 +67,19 @@ examples: <&gcc GCC_DISP_GPLL0_CLK_SRC>, <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, <&dsi0_phy 0>, - <&dsi0_phy 1>; + <&dsi0_phy 1>, + <&dsi1_phy 0>, + <&dsi1_phy 1>, + <&sleep_clk>; clock-names =3D "bi_tcxo", "bi_tcxo_ao", "gcc_disp_gpll0_clk_src", "gcc_disp_gpll0_div_clk_src", "dsi0_phy_pll_out_byteclk", - "dsi0_phy_pll_out_dsiclk"; + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "sleep_clk"; #clock-cells =3D <1>; #reset-cells =3D <1>; #power-domain-cells =3D <1>; --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDE4E3BFAF6 for ; Thu, 4 Jun 2026 05:26:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550805; cv=none; b=TnwYEVv5IzVjcCK3BM8FQK9pumSRCyW6XHTfjrQ0tx7ihOvc1kCQBPQgY78vtJYFYQ8/3kRsSseD7ZtFk1qN2gEsVgW+Skxsa1HrWyBNMdfwAN6gRBfVV3ST3JO5KJWZ/UMUZrhwqznRyl6EeFv9KkxL/40svSIrf9mfkUfGJpI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550805; c=relaxed/simple; bh=Q5+uO3LW2fHz7K6MzYEBqR1TRxqTCEKCt8vYU5DOE7M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eb7J6uxua51CpbU7K0TBUfu2Tbm0+rJy91MVC0RnLyP4qz5X77T8XmYc0EIAYVt/0ma4PLhPfwa0G5jaYe44OvJ8Bk7Gop3uv5KSyp7/C8kSyvQoFLPnVewpVL5FruB1aaMksGweaT70EM9ZHfyu1PaYXBIWAe+yinHIu2N0wUc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=IsIiTMfh; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=dE69F1Y9; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="IsIiTMfh"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="dE69F1Y9" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65450kN51039548 for ; Thu, 4 Jun 2026 05:26:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= o7xunX9AoaOwWCMQKY0XEljtxPH3cBbeVh85YvfYixU=; b=IsIiTMfhGPWECGDj w0d/K9g3hGHlcZ4XdwTMjkTuyO8jegjOmNSmqXdOrblKErYITlOjNI6M9/w+G8bt kszMJgDqhKNUuDOKK5fxF5S02gQkmbBz4xDb0HQU+jWCdM1e2MVi2x/Qhz5MPUtb pkthGCuvlVaWp0vYTEhDh4jJvoMpMDqMwmID8WFaJd4sJTFIsZgCEviDAxNZ95dl yYZvwX4CHe/qgwPG38y4gxq0T8vxOKbpmpKGyJsjB1f+08tFpq/GA57N7P4pi662 oi63c78Gn/1k3EABUBKv7MCTgrKhg5GX+gg7EQJQNSu0JuRnwBH+ZB/f2EGqC7N0 XJvTyQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejtj8hs75-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:26:44 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-8421f5d76aaso243308b3a.2 for ; Wed, 03 Jun 2026 22:26:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550804; x=1781155604; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=o7xunX9AoaOwWCMQKY0XEljtxPH3cBbeVh85YvfYixU=; b=dE69F1Y9aG/s8VK71+ls+hFgOmSJqXxhbIuOCskcyWufeI8Rv54yyl+6hNAm+q8xJj Ja4BzHIR42KWhJw1X/18flveTgjJmrLf3r/m6JAJMmmidOiUk/SH6gWiICGwzMrW61Z9 +bFEZhlfy6QQp1kNJGF28p39TStZedYmojY1QvN8iZ1iqa9CHAWi/adjhQMX4qjqdaOw 7ftyKSMa/d4nDiEZg2VyCn6L/2TN9qczQHb1MyJN11fZTU6CHnMCviawYt4gWHnp3SJZ qMfQH2kh+essHupiDaHyeIAF48LPpHeJ3C96C8HF4vrSMJVUnxk6UjJ6G0LBJAAdr0Es ZD9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550804; x=1781155604; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=o7xunX9AoaOwWCMQKY0XEljtxPH3cBbeVh85YvfYixU=; b=lCxpjuhR9K0Mi2a7C9kL7hS60r1uAIgG+YdL0z9mSY47lDtQS0hm+kGEoCriecyOXf Fp40EBLbW/8MJiT0bS4psbSJ1JUU5nEWaykU1TqYJzrDCJmvb2wIndretQi6TTdgqncg Bw6e8hUCz6PAAAbnkB84zyhEpf1ga34Owrud6oRDSE+naM70ayMiHenrXFPl+w66dDI/ yFPBlE7uK3mXl2v27AIldJeQvO10e4bPUKQmBZWdsZ2UE1nVKA5QBErPQAAV2yggM+aW FIcX0JpX500ZpfFSCxb8k4cV8GPV/Ize450zVVFkdFBN2/X+1TJFmtPmYi6R1jT6zrgr puCQ== X-Forwarded-Encrypted: i=1; AFNElJ/dKYiyz2P0BbOxDJpDMQ5m3jpaEbo1TZAQ2WiTxHkaxzZzlHbwpbiMzFbzVQKpBFBMruw+TkHoNOlSAg0=@vger.kernel.org X-Gm-Message-State: AOJu0YxtP7Lhn5AQ/6dzeyCrc5O1VbkPA8BfJOhzBshHwRQchYSkYds+ YMlihnTKepEtJZY1cQBYSWTEiUL0hhR37dS7v5BWaNx/IgcNyaDZ1sKGOeOUuNlL5YTDCROGh6P R65TrM0tMokc44oAr3/3fYtmM1JJoPf4STgHhScSEA43wSAx2E89Kf8pdWaHngAbdjM0= X-Gm-Gg: Acq92OGR0X8Z71TYfAIx6WUpVDvq6VKDwQjqsuyj3jwwBtu9ojNH99SpR6C9NYqG8Bk sOje3yeiJiuufoKuXvDw9UEULjKvySfeU94jod0IMvxSOdLPPftLNo5juZvJbzfKy9M22sK3yP/ 1GoRHiCAn0TC8k7y9D0mCFTCFnNpsER0XboFsFaIqOpyTRdp1Nz4717Z5kAhyGEjQWgCrxOsAnK Y+AM8UyF5QvoBeJIk8+hEG1CzBjPxS99Pz8l+5HOp81focbG9HRA9Rypt7cbP5SxwrXiOYT6gPs 5BhP52XeuwZbMo3GBB5xjLm7hUP8SmgswiYsD/V0FKMF9IGXBF23GKsiR33w50YUsSqWidqxiZC v/Ag2D2hQlwUSLyXSGZvv4VdNVn3fS4oOiBr305WJ42TDONBz/IaUJETmYz1lXZM= X-Received: by 2002:a05:6a00:139e:b0:842:77ab:35c8 with SMTP id d2e1a72fcca58-84284fe7c61mr6194786b3a.44.1780550803652; Wed, 03 Jun 2026 22:26:43 -0700 (PDT) X-Received: by 2002:a05:6a00:139e:b0:842:77ab:35c8 with SMTP id d2e1a72fcca58-84284fe7c61mr6194759b3a.44.1780550803185; Wed, 03 Jun 2026 22:26:43 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:42 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:09 +0530 Subject: [PATCH v4 03/13] dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-3-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: 9G1nq-Toc4WR8AunVeRbhoRLvMxCoaBC X-Proofpoint-GUID: 9G1nq-Toc4WR8AunVeRbhoRLvMxCoaBC X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX2ART+qsPqOEI /NJBdipSS2N8asylmar3aBS9rRIMTzF+5ra+7Kgg4g4XYEnL8DdX7u/+EtUHEhK562LoP7jMdrj QybjagDUUs6vqstgD6GaV7P7Gli4SLeslLoxMyqadho60TgW4LU8RwEZ29DWrQIsb0ThO2Nza4z fk9CnsAwlSA4vdR4MsKL3Su8JciljJ56ywOB/JQFP6ls7+ugV1CSu8bWtP++SRcrOa+yayTZ9WW Iio011mmShypAr5YHfTz05wunuDTPxNInF0JKd8s19JWsePcGnDa8j4hVfcftGXoKtjYo+k3BIc NsrYLBJSgXabEAPpsG8LTPZdXfN+daZm1r/UuJ2GsTD/ZRy3l19Bp+9KJGsSnYyYhsrlMNCnuZK B5GhvAwqFcYn4OMjbZ8tLIae2TWZlBNkKEvio6m6xLP3i+f+3vJlwKRhLOxIfaidEycZVggxb0v RNJbo8EsWz9vhWmhOGg== X-Authority-Analysis: v=2.4 cv=f4p4wuyM c=1 sm=1 tr=0 ts=6a210c94 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=zFVXnba82tZ0OxNrzBkA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 The Qualcomm Shikra Display clock controller is similar to QCM2290 DISPCC hardware block. Hence, reuse the QCM2290 DISPCC bindings for Qualcomm Shikra SoC. Signed-off-by: Imran Shaik --- Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml | 8 +++++= ++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.ya= ml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml index 24f2cce033f6e109b65a79553fba5295eb9adf3a..5cee033f2115deb392fc1deeee8= d5aed4cbde052 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml @@ -17,7 +17,13 @@ description: | =20 properties: compatible: - const: qcom,qcm2290-dispcc + oneOf: + - items: + - enum: + - qcom,shikra-dispcc + - const: qcom,qcm2290-dispcc + - enum: + - qcom,qcm2290-dispcc =20 clocks: items: --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A9853BFAF6 for ; Thu, 4 Jun 2026 05:26:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550812; cv=none; b=Cb5dMP82oBnwwN14repMdcZ6WpFl0Dm1ckzw2FfgTcX8eg5iCuDg6oFyu0kGR29Ktsy7eRNjypzjga+GWqgOsA7qX5NSBX3T19XGPZ8bN6ty+vyqrw5/tlCeHJIsN2KbaT7tOGATOvWduWN2tXYVfeIOBftuxJMThVYz4LmC+ts= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550812; c=relaxed/simple; bh=9iDney/4UaOp4gyAQJJgqYiksjkSOYt9Vy7GvLh9Yzg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SJfKamKmwNLmb9ThbYL9Umh2mWRvCWeZUKWrKRKRgvl3r61yjp1GXN8jv1n09nMXd0aDQ2wFko92Z6SOPgCg3B5cxdrXnH1l+HfOtZwKWfrvjtVy6WV4/oB1WSG/EB7Q3Yk30bJONuVAgpqu+2D8z3pb++nmUgXuzPZlUDkOq54= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=hmVAjKsd; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=F+qBT41Q; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="hmVAjKsd"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="F+qBT41Q" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6540ntds313659 for ; Thu, 4 Jun 2026 05:26:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= AFmrDdVLwIZRpxtw0b8WZQHqbC7uM4wElpvELfKZF90=; b=hmVAjKsdVxEFlHjc ysMv6bgDRHL+YM6itkKc6vq0rAiN8h7XYMlXEl7W4io9H/UjogLMINwY+sYkZy23 V3twBR02KqKfjKZJQ+2RFiHkY2tQX+tM4OZAkH2L5JSiM/9mRObPvSBpfMMNyi2L t6KgAijahIgtOu/n2MvdBpwXUC4Lt69s7W4iJGfJhU42fb1VD6S4zYsAExM6Oy4V Ck7FNMg8MdllYLcTL7RrIlwccHQ1zTAstwbkPdpjWRJqhqE5+K+bN7uek3+HTLfc CWa89UKHMCONa+Q1sLG8LZtlCJcfQq7S1Z/00PB6nc5C16xVOQdhMeAfEcv+YATy UOf/JA== Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejy5v0st7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:26:49 +0000 (GMT) Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-c857ebbb0easo925462a12.1 for ; Wed, 03 Jun 2026 22:26:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550809; x=1781155609; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=AFmrDdVLwIZRpxtw0b8WZQHqbC7uM4wElpvELfKZF90=; b=F+qBT41QU4BuF4HUCmbGa8jdhS5u2t5B/oBIwCS3S9H+CA9MXbxSWg/3q6X8u8Fa0K qxP+zxEgfuXxFHaj1xEiooY9V6bxby7LZSWut0x0iXvH2yBKtLIxXeGzW24uklsdV1CE 92f+CKeBXgJpwbMuGn6DauDj4M7D5bdKovLip7E8kLKNjzrFAZJzvPKOTa7bk0DnOaDr 3C9AQebPJnDu12Uqck7mTM/ipNaLCs9cynUiQvuzlM+Zv/FzRhA0nds7A3cIohbodeNA ZSUMBm8sACXX1aN1uvQPTZ8GauM9I34CafeItbJC1DfGMFQnlsxGyaehcDPHvePqm35s tiig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550809; x=1781155609; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=AFmrDdVLwIZRpxtw0b8WZQHqbC7uM4wElpvELfKZF90=; b=Wefi4geDwNKPebz1nW/5yAL8d5/DFlAm46kF27MBBytRiSuYe4gBlLHr6HvRNj67kf EJ3YlbrSkyTkkb9l8e1u6aBAIah9X/x3mfXAjgjAU7tlg2KLNGepGuXoN2kvae9/2k5j wGZ+8we6g9Y6ujvpmFfgu5vxC5hKZSz1j789biJXjb9oSLClgnHQSJ8Kj9opdJqtbT+c /DpM/H48eIQVg/UNzeHAFL9LueKUBPxrO7oRNfyvjCEiKnLXywNtEzzIpAysyppHKERb 1l4Onxhb1NSD1ZKUjk9XyoZbyOnaXhoFy82NLIDKemQun7VHPHIV1NrhVMHkF5e+OriM iyXQ== X-Forwarded-Encrypted: i=1; AFNElJ/DVlIXYiop4fdu6zL1JXblgeD5RW9cqS+DbwRfZwS+ip35NUzZRc0UBBJwSxJKVuYnzNi6rcIRjAS42Zc=@vger.kernel.org X-Gm-Message-State: AOJu0Yx3ziArDx+K2is3EXrfX/nvYJyoxudTsF/mn65ry9S85vWNoskZ 6JUDUN7pB2ayGKHCpuqqjoLvccr/1K+89KdNoFVVFDTHr/LOZedVXkwhJZPNphxwCvS30VenA2J D4T19SyEUwk4zk1IgTLD5qXVJ/LItdCdBUAsTLVqh+NZzG8x5gDOc1SGkDMYWzhi58DE= X-Gm-Gg: Acq92OG7izGYeYlsNM6lIqGfJSmKzaD1/NaZZy9mXCwRs07tmKX2Gj1fpesUC6a0mb0 +nzimGqpzUWBT9Sm95lzKMh4AdlMOS8SyXa9SWx3N9Jm+DeZfMsUBn5Mg/bJnRlmtO7zLkJr+N5 8g5Wm/wrYW6tdb2sLtrLYIFpFqYHBSestgxWRdHQGzEqyDgB0lL4NTj/rG1zyG9sKEJcZQLR7ln oj+w0QmIj/PFhCMDUkusBkjrvxPEDIC68G8vG5v2n9zdtztmqza3nH8Rf2l9MfhRXOgAWCD+M+z fx2cByG5hQOy5fRAD/rF8MnMuR870XbJy0+eijmlPXtsdvBHG44DVGxbWzckHt0YZh5sy72htjX yyhWI8ygq2DazkEb60CRmWGGE28FGNaPbWfF/o4zcRCKn5xQr2e4mQEaiX+egrEU= X-Received: by 2002:a05:6a20:4e9a:b0:38e:92f6:9ab1 with SMTP id adf61e73a8af0-3b4b1ff2723mr1938614637.22.1780550808965; Wed, 03 Jun 2026 22:26:48 -0700 (PDT) X-Received: by 2002:a05:6a20:4e9a:b0:38e:92f6:9ab1 with SMTP id adf61e73a8af0-3b4b1ff2723mr1938578637.22.1780550808487; Wed, 03 Jun 2026 22:26:48 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:48 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:10 +0530 Subject: [PATCH v4 04/13] dt-bindings: clock: qcom: Add Qualcomm Shikra GPU clock controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-4-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX98hEiM3iKRgE Fbe5hc3hpQcNVx9ZTUzZJHFZZ311+MqIDsvxJGbT+LlcSs7DpJ+esxZ78tv97A/Lm4eHgdWoYGb +UUh/cMLtLMQZiRuMD1kZC/0vZE27ChQmueFYu4+bSatVYcMZLDwnxk6gv9YUPO6ApgkC9ntLSp Y0QoDKGxLk86OPUx8ymkqksYBbudLWSoaBznwAY3mmqSUoSClkrKZ1hYnvpdemMjaCjZ++mg/5f 8uipmNEicKrAnakOyKUtZsyL3Iub9oq2JpTjAe5C1YbOwCN5FuTKyDNtOtY9yxXKxQqw1YBgaYk wW9r3gccYqAJ/sxfkKsu6gGSN9Lvo8Z3vdu1hu/7dCvMVjXyAkFeubV3+H9m91+iqzLcA8vVWxI OtzWyqOb1FpG3Su6Ek/D0jgrzKRzluP9ebjUavpmGl3VPjDNyAyeYLwxD8OODVlwd+7Gxv+nxfi 7SvaJP1tJE1fIrYr7Yw== X-Proofpoint-ORIG-GUID: p51ofYU7wgA-IFO_2Iy-e5UNYFXfv4I6 X-Authority-Analysis: v=2.4 cv=afRRWxot c=1 sm=1 tr=0 ts=6a210c99 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=tQxzmpfZ-Uf8aLjc2qgA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-GUID: p51ofYU7wgA-IFO_2Iy-e5UNYFXfv4I6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 The Qualcomm Shikra GPU clock controller is similar to QCM2290 GPUCC hardware block, with minor differences. Hence, reuse the QCM2290 GPUCC bindings for Qualcomm Shikra SoC. Signed-off-by: Imran Shaik --- Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yam= l b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml index 734880805c1b981a1c899d85435f83f4f3dd3ea9..1bd70d091fcd7b6d7805ac090aa= f840a415c123b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml @@ -18,7 +18,9 @@ description: | =20 properties: compatible: - const: qcom,qcm2290-gpucc + enum: + - qcom,qcm2290-gpucc + - qcom,shikra-gpucc =20 reg: maxItems: 1 --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1E243C063B for ; Thu, 4 Jun 2026 05:26:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550816; cv=none; b=B+IpWhShG0iHRHFy5OeOIoou14rst8mgPZXBB6VBl6RAWyU2k5QsETaITETd7iKa1S+FtTJotBFbqVeGY2OA5Ah2LaVZLBfjD/2QPCFZ7Xcr3ZPWEw7lK6sCA08TaGhENl4TRYnZQf+nJH+4BMdMp+UjdIEf5WcJMyTY0ymam4w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550816; c=relaxed/simple; bh=42ccGag0WOj0/GBe2dVH9h3Tap4krbtNxLr1X4sK6N8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DNQ/8tMuEbdUKYgTFzkqwKHNX/8UCZYw+O0u5ABB5WO1mAscH7Zd8CgeAI4NnBzcvETKi577V3JJ7oyiGXS7p+8ZJKafAS2BSk1wSqW2H8Av2TuY46eO0C/BO7vP++SxnRTEd6MApTq0JX7g40BCvxbH3gTTAN2VY69V4JNyWU8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=OWL8E5H0; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ITK7Qq+p; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="OWL8E5H0"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ITK7Qq+p" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 65426rJ82260801 for ; Thu, 4 Jun 2026 05:26:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= puZDQSZbceIaT3uro2Z2sNeQm6mU370uUUyIBgl4Q4w=; b=OWL8E5H06GXMGVpQ gZNN8NmWWSACqYGiDciGdVRvYiNSm87VHduLObObTWSE8svhb36AJEU0oTJsD+Gv VUCw4wDQewRtqRcXjGHJJtN4R61Pp+1WLLnz4RJLckU4tHLdXXxNpFV+eeGJgkcd G0zc45pO/BB/dhaDvkXSgra2wEu8qlMfhILsYSONpQeao2vZEn7L9M1vyqs6k9Bq 6EimwlYTiJRplMj5995yFZFNKdQrl6Hh4bA2bxrKNXfkJHW8bZjYjeB4vlA9/GiE Hud2RWWbW6wH+cSaDJvNnXozAi5NQrnsgwOwJ910jqWGqaSpm2m66WGy+Dd6pvUC OPLfSA== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejr2mjgat-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:26:54 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-84235f9b91fso244729b3a.2 for ; Wed, 03 Jun 2026 22:26:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550814; x=1781155614; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=puZDQSZbceIaT3uro2Z2sNeQm6mU370uUUyIBgl4Q4w=; b=ITK7Qq+pdggMnF5wijd+YrcwKX43ze+EqUSwOrMYaw2OZiknPkAoyZ4SnSxvF3lp17 xfdcupkv11hPaoRIDaonsYnh4UTMPudqnTdCIU+GwJUOdyXqX5sDcxZh7D9fM3tH2jcV 1F1Anq+DT6rkjOrn90iFA/X111RcolBMGVA4VdCpgUrGWvuukz/gW4Oud35YnrMs8WXR PQ2+3skIsq2gzA4ocOVVl/XWvv9wDLG0uQ8AtXJN/mQfLdNAC8kWslzS9Uk0wicG/GkN 2rR3pb5B/OGIldhav+R79/5RGjMi9YE56plhABfqRqCuQshPpW2ktYdltYZw/Lho324D 4pPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550814; x=1781155614; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=puZDQSZbceIaT3uro2Z2sNeQm6mU370uUUyIBgl4Q4w=; b=p0/zAO1eUr4tdmW+KGkC5Hq/48QPwcY2Irde7tcr3DSl3NeEJTkUN3rsCd5vD0yVhx fcj1eeeQyQtXniJFLecrjCwRmrkYJOCJIyQt09VLATfjB5uW7Yr80kUHYQ4ThCp5/aBD nL2TbeBclIS3Ta0OSoL+dz1uReYLUwxEu2sdMRc5T1ZHj2V6cOj+/w48GHTzEIA1xtQl FQBjCoULFC8Es3fGQX1TOgnjgeyIuhyb6IoVS+FrwxxsQI3/3ruGQ9OO8xwI7CIrhN3v kIyXAXe9KgQls4ffhKEx5sAWU7xPUe7k7GLF9+jfCy8wf5sITtGdKe24nDlMJuHZpgFy piBA== X-Forwarded-Encrypted: i=1; AFNElJ9rf/a8uhV87UHKnLnPt6ysMX068XoTUQM68qwjv5CPUVD0O6SX+ia73xpY/4jXgU3H4IfIlgArh9stITA=@vger.kernel.org X-Gm-Message-State: AOJu0YxY5eCZnlWIuWLfCLz8hbHzjASE7vGDa2+uZHOflYPHmRgTHQuz 5BQnAGAaL1qw+eLnvWo05IJdsNql1pGyWhzdR8bMv3hgDhdDNsbtsUj0Ttx/mQO+57WciqZIEeO fpvoDqCrHmzYU1pkhao8iYjT4eR32g4CLnPzEZrYgYuT5B1W2B6/cEfSILJkeLoA1uJc= X-Gm-Gg: Acq92OEswwN/EBJc2pFTjMTRdexm2ScM8VqjTPqHUis+wCVhR/HE5GJ87ne7qTEXB7p G6hwjEhoCZLI8/GInVwgg3lKum/SfWaq4v7qhkf0W0Y7JBiB+OrT/xX5RAyEhc/j9bds6kGAcfo 6akO/qDfIgF2f3I0Bvs6nUypBeA0cdKvXCI3rySwAtr7tNhlXpzw61lvoMGgTEApYel889u+H2C /AeTM5ZzjECEHtUnwtTHT557J/UgAePkbzeQoZfXCMOmLslWfxhr5wsot3lPYETwfETidolI1L7 n6JADa59pfl7MrhJyXsoEXSuDXFe/XCO4oKpArRAYJo6baVvT3zNCegNszE0MHUFjTgz1HRNXjO bcipSO6biMWajYjGFj7Emt4AX9ZX/NpsB2IADsjsHozSYSNMHrWR73ojg7CdMURk= X-Received: by 2002:a05:6a00:13a7:b0:842:21f0:5114 with SMTP id d2e1a72fcca58-84284f78f88mr6408282b3a.30.1780550814209; Wed, 03 Jun 2026 22:26:54 -0700 (PDT) X-Received: by 2002:a05:6a00:13a7:b0:842:21f0:5114 with SMTP id d2e1a72fcca58-84284f78f88mr6408266b3a.30.1780550813795; Wed, 03 Jun 2026 22:26:53 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:53 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:11 +0530 Subject: [PATCH v4 05/13] clk: qcom: dispcc-qcm2290: Move to the latest common qcom_cc_probe() model Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-5-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: RpLJ-5A0wRIe8ONozYJ1osb0LQFsvgBd X-Proofpoint-ORIG-GUID: RpLJ-5A0wRIe8ONozYJ1osb0LQFsvgBd X-Authority-Analysis: v=2.4 cv=A91c+aWG c=1 sm=1 tr=0 ts=6a210c9e cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=5-E6Jl9njFXL_0F9BXgA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX1Enuzr6mcJ+m OSKafEI+Vioxyr8bx4h7iBQ9GaEARtUjF5oOqJAlBQ9LztroHQX/A1B4MWP4n5HHwOSDr0S4RMY 10M2TZ0l5KyFrDr58ekzVI8k88BMqAOspuFmdQ1XnuJiHBOBnsUuAFpiuhI6wDlYxYR3WMmZvVe aVDZoLd8vRUroxK9wD6EHfxJztCYFymuNQgd4SGdwkaH/SK4sf1zYfqaO9JOad8Q1gnG/LguXRX DVsYt2YVLMTPVyWZ1rO/5CFqkAdVMeIM0zBf5+gPLeCF4RuBMFcIRLotw//pyPb45ZQB6tr/4tw yiS7r60kRnHuVQ73Ttsf1Za/CbIVLykK7CYajHBb4nEIPkqkz0snVQMin65aw2bygbW64BgoEA2 28aSuT43zE7xknLI7/D2R2A80EJd4x6w/EC0RvkpjrcmoxPRVn0rEus/OqyRO8DsqeRjXt5vnBA cbCQ+QM4fhzccx4u2/A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 suspectscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 DISPCC driver to use the qcom_cc_probe() model by moving the critical clocks handling and PLL configurations from probe to the driver_data to align with the latest convention. Signed-off-by: Imran Shaik Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-qcm2290.c | 38 +++++++++++++++++++----------------= --- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qc= m2290.c index 6d88d067337fa132114b0d8666931b449f86de17..1c21267ae0f7a86c1de88e888c2= a990c35f0a0e0 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2020, The Linux Foundation. All rights reserved. * Copyright (c) 2021, Linaro Ltd. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ =20 #include @@ -49,6 +50,7 @@ static const struct alpha_pll_config disp_cc_pll0_config = =3D { =20 static struct clk_alpha_pll disp_cc_pll0 =3D { .offset =3D 0x0, + .config =3D &disp_cc_pll0_config, .vco_table =3D spark_vco, .num_vco =3D ARRAY_SIZE(spark_vco), .regs =3D clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], @@ -483,6 +485,14 @@ static struct clk_regmap *disp_cc_qcm2290_clocks[] =3D= { [DISP_CC_SLEEP_CLK_SRC] =3D &disp_cc_sleep_clk_src.clkr, }; =20 +static struct clk_alpha_pll *disp_cc_qcm2290_plls[] =3D { + &disp_cc_pll0, +}; + +static const u32 disp_cc_qcm2290_critical_cbcrs[] =3D { + 0x604c, /* DISP_CC_XO_CLK */ +}; + static const struct regmap_config disp_cc_qcm2290_regmap_config =3D { .reg_bits =3D 32, .reg_stride =3D 4, @@ -491,6 +501,13 @@ static const struct regmap_config disp_cc_qcm2290_regm= ap_config =3D { .fast_io =3D true, }; =20 +static const struct qcom_cc_driver_data disp_cc_qcm2290_driver_data =3D { + .alpha_plls =3D disp_cc_qcm2290_plls, + .num_alpha_plls =3D ARRAY_SIZE(disp_cc_qcm2290_plls), + .clk_cbcrs =3D disp_cc_qcm2290_critical_cbcrs, + .num_clk_cbcrs =3D ARRAY_SIZE(disp_cc_qcm2290_critical_cbcrs), +}; + static const struct qcom_cc_desc disp_cc_qcm2290_desc =3D { .config =3D &disp_cc_qcm2290_regmap_config, .clks =3D disp_cc_qcm2290_clocks, @@ -499,6 +516,7 @@ static const struct qcom_cc_desc disp_cc_qcm2290_desc = =3D { .num_gdscs =3D ARRAY_SIZE(disp_cc_qcm2290_gdscs), .resets =3D disp_cc_qcm2290_resets, .num_resets =3D ARRAY_SIZE(disp_cc_qcm2290_resets), + .driver_data =3D &disp_cc_qcm2290_driver_data, }; =20 static const struct of_device_id disp_cc_qcm2290_match_table[] =3D { @@ -509,25 +527,7 @@ MODULE_DEVICE_TABLE(of, disp_cc_qcm2290_match_table); =20 static int disp_cc_qcm2290_probe(struct platform_device *pdev) { - struct regmap *regmap; - int ret; - - regmap =3D qcom_cc_map(pdev, &disp_cc_qcm2290_desc); - if (IS_ERR(regmap)) - return PTR_ERR(regmap); - - clk_alpha_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); - - /* Keep some clocks always-on */ - qcom_branch_set_clk_en(regmap, 0x604c); /* DISP_CC_XO_CLK */ - - ret =3D qcom_cc_really_probe(&pdev->dev, &disp_cc_qcm2290_desc, regmap); - if (ret) { - dev_err(&pdev->dev, "Failed to register DISP CC clocks\n"); - return ret; - } - - return ret; + return qcom_cc_probe(pdev, &disp_cc_qcm2290_desc); } =20 static struct platform_driver disp_cc_qcm2290_driver =3D { --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCC263C063B for ; Thu, 4 Jun 2026 05:27:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550822; cv=none; b=e8cZQRfkKiZYsc8Y9Ukaq4RSsTKisKSpcDnmfyBQ15rKeMCRnN8/Rwh2RTq/5hHiwF0gVPspaZkXhwMrqW5JN7QC9fAG1BYopoAGY4mUTG0uaEE1QgsXInFfdUslynGh7ruC82IkIdOa04i5AH7cQk1jCsP3OtLEJr1L9H8zM58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550822; c=relaxed/simple; bh=sfuATI0fCC0PdMmc4wHiyaBvpIQ5ZcPp15gGK/db0jM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZdKkLs3TzPOyhnrKoxGG6UBjePMaYX348tAi4BW2md/oZh6hzpevZwIkT1gwpyRRa5IZZnE3bzTozBkcv6G3/EjCXrBlKMoRNQvuMqIhgSLK6uIBatPMIf+j96C4kuDvpuIQhSDylN+C9da82oEDkriZAxe9adDqMAoqysV6mPc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ZzjTSTOc; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=e57bx3SI; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ZzjTSTOc"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="e57bx3SI" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6542DD6g3552126 for ; Thu, 4 Jun 2026 05:27:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= WzeyjYyJNfSQbXmAFrqFQg8Zn1md9eGVWpG1i9pHV7E=; b=ZzjTSTOcQXQQWkJZ tvrGlqYDUwwW5BPGrsQVvEbrhzfOZZx8nZgbsdCwA31X9uJo+vIDoc++RDVj3PLv xPcHibPiRwzLE1rxG8okvBmljrduk3QheN34X5npOoy8wKEi2UlYaJKGrdewwXxI 7JRP2SJUGNUwSUuPKdgEiZR7DZ5L5ZZ5aJqPtRbuX/1/J0UGYS78BSXwi8217zKw 9QR9TC+gQxFjTMid6NtHj5HLT0m0dhwvFSHcSGMUanlW3Z7s7i+EqfMUHWBGH1Io VoSiahn/CbVUyWmKoOuQqWicVmaZmA7YFoIPgsps1ctTIK6dFHOFJuyOKr5DpEwm 9XqRQg== Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejj9mv540-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:00 +0000 (GMT) Received: by mail-pf1-f197.google.com with SMTP id d2e1a72fcca58-842692bf60aso494483b3a.1 for ; Wed, 03 Jun 2026 22:27:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550819; x=1781155619; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WzeyjYyJNfSQbXmAFrqFQg8Zn1md9eGVWpG1i9pHV7E=; b=e57bx3SIJ8VNB2Ud2NIwqTqrx6fPGeL5mkS9po26ZNA08qZL5ZrbgrPDeroLlK45xm V8h0tksM8VIfMJVuCAKFmeDsdkzEmQK77A3Fgkl1aHqCTvm52hkHX+et6krWmS8FuzxB tn18pkiaBExiSHc+PItzYZb5pabLulLe6ahSwmYKjLLF8AfVLnua6qhPd1sGsWzoWPu2 yIKTXmaSoiwO3BLzW7kFc7oaEgNPYklTlix4x1vp7MNL+LqiPDNQ/A/MaIuxDJMBEdri 88Nujj+hOn/Z3inV3KgA69//zsKx43OMqH6OA9ILsVI20DQ5caNBxB04zeVQrNJYYVOK nqSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550819; x=1781155619; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=WzeyjYyJNfSQbXmAFrqFQg8Zn1md9eGVWpG1i9pHV7E=; b=Z98qdeSxujfdjFGyBMkUWDP8Phh42iFbY81Egj0wgLbZJ2HqU+U7Uh7DzmwxQZrSrE 2VFqKJMyfkBBKfdeAkSNJ2kVV3BWNePhdyJW6echx5fIalLRXJl+luI5yz/HRyf19d1V w2xFf7ggwQA2zvJLicumZ/2iSt07m5IU2OlESt6Qr8s1f5oLx4/9tZ8XODEHFxi8HmZ3 O7SLbk6EoMHeI5jfU9484LBJoxPd0tCY0c6iQ6O/75jRIEfvKbuXHyF7v8NCnLKzli3x OUOy4pwglBM40K575T3gZ892L7DXohuU907hreiAa2jlB8Juu1IzIe//OGky7akWzYhu 4c2g== X-Forwarded-Encrypted: i=1; AFNElJ8q+uQzYtZgHwFZQ3NnDk/5JFd3SaabXhOtpaytOFj+o14eTU7pL9J9fdBkepF3Sn16JCqgirp/x02NJ2w=@vger.kernel.org X-Gm-Message-State: AOJu0YwTceV8hOOT2+iVk2hfMGj8YzRW/yrRpDiUv0EdNnuLgOS4uJy5 pt01Q2maouOjTbGog810jHjZXxMSuXnSuKqRIW+zdYnKTMp+rlyY+A1ol+raCUpi9IdTQyD/7hz chMhB/EfOLyw2CAEPtfnFVMGpcZ38vYNW18NclJ9UeyKQxkBt3tUo0gtYZZgJ3HPmyUE= X-Gm-Gg: Acq92OEc7GakdsAbUDjQbMhBr++G9hXf9xdkGK5ZyxVFkaWGIRjOvLm9EmIUwJJYoks nBxg2gG0O0CheUCwCCN0cgdg0k3YNVYDcT1o3g8FoGnwVyAQPxfJGGRDpS8qYy+/3ZUqXy8ShnL KH9f8OzG4rO5kcg5mdC2TMIhDTkW33AFV/NwMMXwhkmv+Gg4AE7QeQN9YIGSil6y014FzFQwQwc PZ7ujyGUd5CGNV0cFe5ign2o/eUMwGiLMRHFtSiMwUMd3/1Zyhgzw99uxFMKBc6OmqgC8pcwdLA fdMz2Y03/g/ufqoR1ZMlhuIWfkSGz3jtsdFPrHOZPwRmDfd5VSWZfUxWs3y0pUcjrfYQ+60HjmF vvVkN935pYwX5MooAZ8o8mpvzdok1QwBN/+FaO6rG71yU9gxT02GcvgFuhR69834= X-Received: by 2002:a05:6a00:2e05:b0:841:dcf3:e521 with SMTP id d2e1a72fcca58-84284f3436emr6990197b3a.49.1780550819501; Wed, 03 Jun 2026 22:26:59 -0700 (PDT) X-Received: by 2002:a05:6a00:2e05:b0:841:dcf3:e521 with SMTP id d2e1a72fcca58-84284f3436emr6990172b3a.49.1780550819064; Wed, 03 Jun 2026 22:26:59 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:26:58 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:12 +0530 Subject: [PATCH v4 06/13] clk: qcom: dispcc-qcm2290: Switch to DT index based clk lookup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-6-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: M-P1zQsqiHt3Lp3SBvqmArD-56nGfyzn X-Authority-Analysis: v=2.4 cv=XK0AjwhE c=1 sm=1 tr=0 ts=6a210ca4 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=Thq-9bDrPsIKtHylmFsA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfXyCmlU4hCgH5J Ugu/5o1sgyfkKf1MD7UAsqSjiCCxpfltx9mb3cEjtuoJGtgA8y7kUqCZEUqGfHPsDm4xaqLReoA j1vzM7+cOfy8G+ISrKVgPhCau4sFkh+JBwXFlpmFBL/Naw2bTBEs7LqA44hZZJt/bZfzbbMd5hC 9KJIwkeMJuWZpxGE29pX/dMyFaFyDN3J1JCzn7pbpoZ9XHUfhfta/oLTC/8B4nDexMo/XNwfmaM H7jCci24pU4LDK5q7LqrZ4IAFDAHhQxPBzPiDOpDB2KuFbylr/eBbOFwYqJPmDxA+45vFWHXgnu MXtA4dqKZ+T0nfuZq7BvY9myAFk14YV+uPrSacMYBCLTSSX1tpr3KNEiei485csZ9R9QNmTHdF0 TDNq5zE7Je/6k+bhgAsA9yPzj8e3GUVpo21ytfB6aX3Z2MPanwn+OYx0AqZ6h9RBFURVMgzeVWV B+vvJDQYTmlmc0T8Kcw== X-Proofpoint-ORIG-GUID: M-P1zQsqiHt3Lp3SBvqmArD-56nGfyzn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 DISPCC driver to use the DT index based parent clock lookup to align with the latest convention. While at it, fix the parent data of mdss ahb/mdp clocks to use GPLL0 main output as per HW clock plan, and update frequency table accordingly. Also, add the DSI1 PHY PLL input clocks support. Signed-off-by: Imran Shaik --- drivers/clk/qcom/dispcc-qcm2290.c | 44 ++++++++++++++++++++++++++---------= ---- 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qc= m2290.c index 1c21267ae0f7a86c1de88e888c2a990c35f0a0e0..f5dbd19d0a0334362a44f91a692= 29cb0f018f309 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -24,6 +24,18 @@ #include "gdsc.h" #include "reset.h" =20 +enum { + DT_BI_TCXO, + DT_BI_TCXO_AO, + DT_GPLL0_OUT_DIV, + DT_GPLL0, + DT_DSI0_PHY_PLL_OUT_BYTECLK, + DT_DSI0_PHY_PLL_OUT_DSICLK, + DT_DSI1_PHY_PLL_OUT_BYTECLK, + DT_DSI1_PHY_PLL_OUT_DSICLK, + DT_SLEEP_CLK, +}; + enum { P_BI_TCXO, P_BI_TCXO_AO, @@ -33,6 +45,8 @@ enum { P_GPLL0_OUT_DIV, P_GPLL0_OUT_MAIN, P_SLEEP_CLK, + P_DSI1_PHY_PLL_OUT_BYTECLK, + P_DSI1_PHY_PLL_OUT_DSICLK, }; =20 static const struct pll_vco spark_vco[] =3D { @@ -58,7 +72,7 @@ static struct clk_alpha_pll disp_cc_pll0 =3D { .hw.init =3D &(struct clk_init_data){ .name =3D "disp_cc_pll0", .parent_data =3D &(const struct clk_parent_data){ - .fw_name =3D "bi_tcxo", + .index =3D DT_BI_TCXO, }, .num_parents =3D 1, .ops =3D &clk_alpha_pll_ops, @@ -72,8 +86,8 @@ static const struct parent_map disp_cc_parent_map_0[] =3D= { }; =20 static const struct clk_parent_data disp_cc_parent_data_0[] =3D { - { .fw_name =3D "bi_tcxo" }, - { .fw_name =3D "dsi0_phy_pll_out_byteclk" }, + { .index =3D DT_BI_TCXO }, + { .index =3D DT_DSI0_PHY_PLL_OUT_BYTECLK }, }; =20 static const struct parent_map disp_cc_parent_map_1[] =3D { @@ -81,17 +95,17 @@ static const struct parent_map disp_cc_parent_map_1[] = =3D { }; =20 static const struct clk_parent_data disp_cc_parent_data_1[] =3D { - { .fw_name =3D "bi_tcxo" }, + { .index =3D DT_BI_TCXO }, }; =20 static const struct parent_map disp_cc_parent_map_2[] =3D { { P_BI_TCXO_AO, 0 }, - { P_GPLL0_OUT_DIV, 4 }, + { P_GPLL0_OUT_MAIN, 4 }, }; =20 static const struct clk_parent_data disp_cc_parent_data_2[] =3D { - { .fw_name =3D "bi_tcxo_ao" }, - { .fw_name =3D "gcc_disp_gpll0_div_clk_src" }, + { .index =3D DT_BI_TCXO_AO }, + { .index =3D DT_GPLL0 }, }; =20 static const struct parent_map disp_cc_parent_map_3[] =3D { @@ -101,19 +115,21 @@ static const struct parent_map disp_cc_parent_map_3[]= =3D { }; =20 static const struct clk_parent_data disp_cc_parent_data_3[] =3D { - { .fw_name =3D "bi_tcxo" }, + { .index =3D DT_BI_TCXO }, { .hw =3D &disp_cc_pll0.clkr.hw }, - { .fw_name =3D "gcc_disp_gpll0_clk_src" }, + { .index =3D DT_GPLL0 }, }; =20 static const struct parent_map disp_cc_parent_map_4[] =3D { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, + { P_DSI1_PHY_PLL_OUT_DSICLK, 2 }, }; =20 static const struct clk_parent_data disp_cc_parent_data_4[] =3D { - { .fw_name =3D "bi_tcxo" }, - { .fw_name =3D "dsi0_phy_pll_out_dsiclk" }, + { .index =3D DT_BI_TCXO }, + { .index =3D DT_DSI0_PHY_PLL_OUT_DSICLK }, + { .index =3D DT_DSI1_PHY_PLL_OUT_DSICLK }, }; =20 static const struct parent_map disp_cc_parent_map_5[] =3D { @@ -121,7 +137,7 @@ static const struct parent_map disp_cc_parent_map_5[] = =3D { }; =20 static const struct clk_parent_data disp_cc_parent_data_5[] =3D { - { .fw_name =3D "sleep_clk" }, + { .index =3D DT_SLEEP_CLK }, }; =20 static struct clk_rcg2 disp_cc_mdss_byte0_clk_src =3D { @@ -155,8 +171,8 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk= _src =3D { =20 static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] =3D { F(19200000, P_BI_TCXO_AO, 1, 0, 0), - F(37500000, P_GPLL0_OUT_DIV, 8, 0, 0), - F(75000000, P_GPLL0_OUT_DIV, 4, 0, 0), + F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0), + F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0), { } }; =20 --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A371B3BFE5A for ; Thu, 4 Jun 2026 05:27:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550827; cv=none; b=TetN1Ulol83oW+sARbtG+1A3r7E0SzjELUA92KlpxBp433vzLDdJ45kp/vAI0urjq2M/4ZrxLXfJZCuTYs8bdg3JbBLy1plhMIf9B8eTIHeSgJnO8ozrBuq4WYsbL0WKnrtF3DEpG0CqUnpLKus3Fe5rw/ctRtNbKZ4rYE71vJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550827; c=relaxed/simple; bh=qzmO9vTT9ZimsgS9gDOezDShy+F93qGz6TXjYzvqf8w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lgooKR6RpBUk1NYTV7M+eP9vayRnq9gcXsY+MrqG9pwS6K+EM0fiGxzaBR3rknp0ezZb1C5lTF8RgRHd1h26ubDD0FY24zoThpUZfyIQpwUhCcm7cgWvsK/uqcWoulRrn56SyvVWoLSNLi5nQND7hsNxp7C5mENXnqzncCwcQCk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=fsGIYaoE; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=HnGHmC4B; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="fsGIYaoE"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="HnGHmC4B" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 653LeqtD3240997 for ; Thu, 4 Jun 2026 05:27:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= d9rxV24LmCwJGuS/+x15NndginwjP/FOCBgel1x+6cU=; b=fsGIYaoEXq/YkYZ2 h58HKfWQxZW2f4Zxl3CNMFxWjI3SE5jSZsLv6sj1J0JVnS5fTfmlj3rn60oYHWFD LtLlBzLAcE4udR5ABFU6LeuUc9mQFBnINB9yGvmbpNm82pYc704fjKgpZAOXR4eb jZCugHGX6K8uIu9dvMGUbfE0wHMy4FkTtPPm/AX6eAMSzHL64BUFC8eSXbcwb8k7 jFUz5O+2JPP/e9CwDY4j8DGhzYi4JlZXjemjYNhnxEW+xNAj9b6iHncI0qxIIrRV KMGjE9fFKH0ugqZZCa1rKKNohFRMgGsbzNLtlQG4JMEQBNO05gLGE2wDmYCcMmBq hInUmw== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejvd09a6u-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:05 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-8422b544a4bso233592b3a.3 for ; Wed, 03 Jun 2026 22:27:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550825; x=1781155625; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=d9rxV24LmCwJGuS/+x15NndginwjP/FOCBgel1x+6cU=; b=HnGHmC4BPKDaPfQ+KmTrTJgAbkYzjdys5FjLCal9h2x8a8Q74MlqTGs64rkQaR0iDH itv4pPAwBm70a6AyOtVngcBgT2bQVSR03JC/jbjjPZ8IlcJTI4kXoFQCqHsOdJ8gH/Sb 4sjxZuzHTBlpNdG1Xtcae3HlDd/eKZCsqw8gXKbaylEFg/9OYFDcXd/KPh5DyMgYhYwq Cin7yuDpjNrkJ6cXWQRB9ztNSoORjg9M2FMzOozTlqXtebTJjh7hi7HFNi6FofpB5+b1 Ky1WHRLUJPTMqy9tPzp3co8nVCmDVVoO7+k0ElOaMmHAOx2COhISuVYf2Z+5VWORQIju NEgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550825; x=1781155625; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=d9rxV24LmCwJGuS/+x15NndginwjP/FOCBgel1x+6cU=; b=lMMDSRlIqvdMNO2MFc8oWqMFOJGo/BOYpsHvvU39ym0eZuviuVWvJrsJALOHyvdbTV x7OGaLpMeZeD1xri761ZCD1glOSZMI15LPtTIvqJHKa03FZ0VXHJ97Tr6Ki2KJHDKcrm j1xnaQq4Sw8IoGTVVV0/WfH9FHWsIBtVOBp83xtknhDwvlJjva0Yb4NpJ2M5X0fQ10Rg 31e7Hi73Th2PVlUqEALIPOmPvnIFdGYLD44/Jz/8+oyIg/aAEO+fIu+7yCZbyWJdFhmL 6TDDoHjeeiXs7Su+wOqMy6keWloSpUd3teX6lYvQ0sk2AbIGKvLu7b06i1it7g/gEsIT Fj1g== X-Forwarded-Encrypted: i=1; AFNElJ+y059xpevc94IO3ZXRuuI7uF2hStqm8aMgRK4MfyL9yBMxJXRCNzZVFZ0Gcl0AjVPN2ZGO3k+O+qY/YMY=@vger.kernel.org X-Gm-Message-State: AOJu0YwCWKWCzV/U+RgxNSPcEnY25Tyz7r+5i4c/pyDpFbLABLwISxgh u/Yo0ljZ9rjNt/sF29aQ2nPh3lRixAh7ezRNDJ2Z2DyX7VW+BvW8fSYxg7GrHymmff/XERGd7Nn ovhAKACvbB+RixdgZlE7qkCv8HuC1248oTM6y3XEH6sCYdepklOj1ZEWf5zJeNExSsLA= X-Gm-Gg: Acq92OG7R9toyW1ZBS7jnU7uk6vHXMR896q527Y+ESkj8+1s4DxFPNV1YybQv35z4a8 sO4rP+spb1xgt0dD6I1Yv0weEEcztc1FvZohmvVdyPtr8ZdVl6BKvtJajtJqYMpXOMbkFGsp9bT GH4I4jdVEqtwa8CL8cF2GOYuR+06Tq0oCKO1dsu+/x0XGhpRbQYqGY8/nPaQhBdFp0m4mO/80UR ym/SH17iP8NMRLL9BVvE8Y3sderp0TlLpqusFO9pAFtuSffdnS30IeT/aB4fwo/zmXLM2sxiW/2 JuDy6ZAg4OyuVrtDHvE/M85z9llaQlyjQ1aZwlcKzzO9XAsuTu6Ob5xmUQO26YYQlPBuTUmX+g0 HewivYwfDzQPAEqYgq/c/Ob4HpfhBGO12wzPep6Gne+C5KbyEzOBVDFeF7Q7+J2Y= X-Received: by 2002:a05:6a00:429b:b0:842:614e:cc9d with SMTP id d2e1a72fcca58-84284ed9586mr5915276b3a.27.1780550824669; Wed, 03 Jun 2026 22:27:04 -0700 (PDT) X-Received: by 2002:a05:6a00:429b:b0:842:614e:cc9d with SMTP id d2e1a72fcca58-84284ed9586mr5915255b3a.27.1780550824229; Wed, 03 Jun 2026 22:27:04 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.26.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:03 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:13 +0530 Subject: [PATCH v4 07/13] clk: qcom: dispcc-qcm2290: Update GDSC *wait_val values and flags Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-7-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: idD6EbZ3huLqLIDcMVoIwCuwqK_RrxO1 X-Authority-Analysis: v=2.4 cv=M8h97Sws c=1 sm=1 tr=0 ts=6a210ca9 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=USgIuZEjIA_ZHjWqnmUA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-ORIG-GUID: idD6EbZ3huLqLIDcMVoIwCuwqK_RrxO1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX0tA6gaHHiIBS WweMSDmtJaLEr+Ngk3ziF/a8UirX0XJb2qWXtdUSLmN3GMV+Kz5jenyrSm6zUcQRwZyapRfkaCp QAOb+XLDkR2N1YY5rMs5V21yYpdm0SUFjhgpzHhQqr379k/X1qa+x7iICt9E7VhBppSr2VCE3CT uKyWlo5JVp0aKgJ+f49PxIQRSarl4E3EOrqHFqQtyRuCCeSufEvuvy6JdjRc0bSpGwnIqi/Gq3p NYUTlqsqbO2ROuYwR9URQjT0uqtJYi+MGA7nAgnlKC+JbR9Lq3TZGHQcrIWZPGpXwkWg0CYUhPb UvK6idrB/ondkU9Ef6stvz5JFaagLhVyOkkS4Av7Dl0Xd1VXjtqwwrqUcAopjMWSArxQnpyJBcO ROTjXCGUKSii9c0/aZccY7YZsW8cpMb0TDzMvJ7n6M87oT5JvO6HC5uy+FgoTqrseDFjNymovSp LUAtT4gp8xRhpAjK/fQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 malwarescore=0 suspectscore=0 spamscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 DISPCC GDSC wait_val fields to match the hardware default values. Incorrect settings can cause the GDSC FSM to stuck, leading to power on/off failures. And update GDSC flags to retain the registers, and poll for the CFG GDSCR, and switch between HW/SW mode dynamically as per the latest convention. Signed-off-by: Imran Shaik --- drivers/clk/qcom/dispcc-qcm2290.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qc= m2290.c index f5dbd19d0a0334362a44f91a69229cb0f018f309..4c1eef79f41b6907fe79f2b18bc= b5f6160c74a43 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -468,11 +468,14 @@ static const struct qcom_reset_map disp_cc_qcm2290_re= sets[] =3D { =20 static struct gdsc mdss_gdsc =3D { .gdscr =3D 0x3000, + .en_rest_wait_val =3D 0x2, + .en_few_wait_val =3D 0x2, + .clk_dis_wait_val =3D 0xf, .pd =3D { .name =3D "mdss_gdsc", }, .pwrsts =3D PWRSTS_OFF_ON, - .flags =3D HW_CTRL, + .flags =3D HW_CTRL_TRIGGER | POLL_CFG_GDSCR | RETAIN_FF_ENABLE, }; =20 static struct gdsc *disp_cc_qcm2290_gdscs[] =3D { --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AB1A3C09EF for ; Thu, 4 Jun 2026 05:27:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550832; cv=none; b=qjr0vpKkWjb5eCpwsxRNXJFz4RhjRecf8rLVL6NslzgR4AJKV3KZYHIQKCkEP2cOH3Apv+ECDNiybTHnSelPeu+Dgi1z8k+czY7PIMdnLPJkdGILX9o3AETMWIpnE2DSZjri8TNPo1ZYp1C8/sZu7k9V63PprOcBFwOcDI4NgHg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550832; c=relaxed/simple; bh=QV1T2jQecsdrWuJKbVRoH9hUbldR74noUF6ZVYYiUhI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BfHQV3XRTKECzAz/IrEl2F7dX8bK0PCSVR24QSZMr24zuHOydNG5+SRQUlIW7gYecY39X8Xp6EvcU2EsoJbnPNk8Up2g9vqejQvSX/t0WgkdIZtU6YeT5p3slrtEk1ijqHp6sW9vCoZziHoh//NcS8N1XKrAizjCKyN/nN8nBa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=FLBhzVxG; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=I8kgcvQe; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="FLBhzVxG"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="I8kgcvQe" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6541xIM82260686 for ; Thu, 4 Jun 2026 05:27:11 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= xUEqgQxNX1Os6oM9bQGsHLB2AOvejl/HCO6K5ihAV2A=; b=FLBhzVxGg0uYeMAR vAwi/H3mz2/RynPzm0nDmfb6rUNM96M9qoMW/g3dVnh6KuUc25gUZdzEy7KQxLsp 0c3wzsq5jW3Vt322IhOgBfvtwDqD/L3l1r00sh6bJB+qsuc5FryOOS4OHgT376MQ n6dxl/adO+0UJPjotlbzztJ8Wve6Vap/3MhoFPaMGkbJO7rHQBjCHFkeEOVh4kwN CV9Skc8X1TvUIObbrdyOWa5Pa8IMiDPjoy33EprWcjFU8PLW3AGEDKxQPBI3lmIW unVPGnhZO93Tp1lHvpVBe37xoFkHjv+SfM7u47osOPhBOEp/O9x9ecXdqSnx65N1 z7YUcQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejr2mjgbe-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:10 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-84235f9b91fso244765b3a.2 for ; Wed, 03 Jun 2026 22:27:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550830; x=1781155630; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=xUEqgQxNX1Os6oM9bQGsHLB2AOvejl/HCO6K5ihAV2A=; b=I8kgcvQezlu07NlsQsO7rPKRYBIgKaHC2rfPYsU9s3iVZpypZ6rakPl1q/kVIfCh1p A4Drt0Rn1ol3JfQi4+7BZQT4mlhGPXYQ8cUsfiMW0ed0wA3POvPeHwuHRTI+nYtBelx3 OMKI9S8ipnkzX4f2HSPfkojuLlytzfwPluPUdbKGLIxMOVjgCx+CkfU4LF9Yi05Zgtb9 vehckfxd8sf+8xhFrfJ+CplaOT/5BKJ4yqCwv6NeSmmpZt0FeV22naTrnNgnw2YN8u+L xs2WIUN2SMfcaL2Ef+9i8m/w0bliFnad4fMeEG+dGedoVYnyL6G6ksJ+JrGhEb4pLjvI egNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550830; x=1781155630; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=xUEqgQxNX1Os6oM9bQGsHLB2AOvejl/HCO6K5ihAV2A=; b=I5bV52ktjm8GIyV29e0u3L2jrhjy14JTae5FhHGRrp1SrRjWoXr3uRJ/i4bT0fL0dI tpvvKieJF9cvh4HFvOM0ynNRwg/zSDfTpcVn1zq2x1/pRu15ZOFf5NQxVDBx90XFonU9 tSwF/3QAzNj8gGyrb3xb/HaQyggXc+MMMfsjoo0JOwKNgJrmFIh8//UmIKBr1Ksix2p9 m/kspzYxS7siVg0h7qFEoXpCs5kqU53sQ5k/jkDU/l5C7zn3Yog9FJZzxoCJ5GJFvsuO dDGvxnz3i5W2ruSJ06FTUkOEYbtnmiij7s/kCWH+s8B5+puUw7iqr9am3SvEQl/5DlmT YEWg== X-Forwarded-Encrypted: i=1; AFNElJ+gHU3rW447pLNqtlQVia7Di1xQsLKBwZNQUh0lV2v7u+4+3HxEjz4AGFC61fppbhLpnR/YoTVTBeJeGo0=@vger.kernel.org X-Gm-Message-State: AOJu0YySXXmj2Ehps3LmftnLhtoIIvwKWMnWFe1vDxVRttmSE3fAQ5M+ YqpsOt5NC1svL7y4Df6oPOUMEEVfRxnmnuuv4CpbROCDEFueMlZeLjfHwmu2TzJ3PL5gEk4RsxE 7w5BrYFQL9OLQRWGP6Dekw2wgbDWHBPLqfqfXGEwEVi8zFJwdE97PAlA69pfnLTHh0lI= X-Gm-Gg: Acq92OHQumsKCirkeG/hkN2F2ZadHqvEVLPR3KgZt4kHyQ7kd2GJ+526TRRNstPDc75 xb8vPO8pIYuJz5vAdmZ/6f94EsOA7cW2P4e+8+NmKj+hclSGBbKa0gOJFCz9lGjk6csAc6NwPVF Vhwj6aVYvYCZR1jAwYwEiE9a0i9nyL7LWxX45+rwMcDCNKA3tdQGy1UVREePvJGHDfdXOWHnLZt ELuP87lbaPa+9GGu+Op9L9ZeNQ9pFhPPT3oqsq+/XdG55IgcJcNuCSBGtr/gx37LrvKaS96NywO 2H2fZ4iXXm7GqOMRemwJRudMYpL1KIuHELHsxMpk5KqE745ZzBED1dD8/iGMUHnF2dam14mpMm6 GPCPTnDmDd1LMO3AgtkYoBXuqD+kihwvzzAR8ug/qAv4Z8fzxkcCwW8RoUkm2/Eo= X-Received: by 2002:a05:6a00:1885:b0:842:21f0:5110 with SMTP id d2e1a72fcca58-84284f78f43mr6095765b3a.27.1780550829932; Wed, 03 Jun 2026 22:27:09 -0700 (PDT) X-Received: by 2002:a05:6a00:1885:b0:842:21f0:5110 with SMTP id d2e1a72fcca58-84284f78f43mr6095745b3a.27.1780550829459; Wed, 03 Jun 2026 22:27:09 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:09 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:14 +0530 Subject: [PATCH v4 08/13] clk: qcom: gpucc-qcm2290: Move to the latest common qcom_cc_probe() model Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-8-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: ft1CR3gWkUIBEfWrYr4ya-JfJo8jn3rk X-Proofpoint-ORIG-GUID: ft1CR3gWkUIBEfWrYr4ya-JfJo8jn3rk X-Authority-Analysis: v=2.4 cv=A91c+aWG c=1 sm=1 tr=0 ts=6a210cae cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=hOWgcHCWboPR0Rv3GuQA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX9M/zneK8on8Z 7q/7Zd8QqwAG6Jd4n9OZ8N9N+3dqlo8Pj9OHX81d0xINwsuhiR46xsfw73QrdZKbfXF3ZYPkn+z icr0xTkKAyBvnDShaw0oWTCE0Q+61Bg738QrCcMYqp6Br/ZUg5EghKPdV+ZvGHs8pb4B4g6hoxJ pizVK4hoqnS60Jsk3uct+2Mx89diiVt6C0K7ywGFTAUFrfyMfvIk9qRrN86wwy+1Lwtj3+OjR2o asJSlddd7RpKKlI1oCV8R0u+FmpN4zKT+RKjzN1ywsh8sXeuQTJ94XOTXmtMwijs5WIhJT7iyf4 WOGEWkNRS2qAeDOnPM2N8n2IbFLiL81cOn/h9pD8QMgtdOOS2fyGSOYaCoR58Lsn4k+MHLS5IRJ NUVyZBoQV5XolyQo0jA4f0/W5MqAgO1sYplQO/z85ibU5Iabyte5r+MXvSwnI52OxWWqwzvsdhI Xscvl9PU85el9LU1rrQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 spamscore=0 suspectscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 GPUCC driver to use the qcom_cc_probe() model by moving the critical clocks handling and PLL configurations from probe to the driver_data to align with the latest convention. While at it, drop the modelling of gpu_cc_ahb_clk and gpu_cc_cxo_aon_clk clocks and keep them enabled from probe as per the hardware requirements, and drop pm_clk handling as the required GCC clocks are kept always-on from GCC probe. Signed-off-by: Imran Shaik --- drivers/clk/qcom/gpucc-qcm2290.c | 92 +++++++++---------------------------= ---- 1 file changed, 21 insertions(+), 71 deletions(-) diff --git a/drivers/clk/qcom/gpucc-qcm2290.c b/drivers/clk/qcom/gpucc-qcm2= 290.c index dc369dff882e69a8c0acd260953d5fcae9453120..1c8ed12f6bf8154596d03134754= 0ef621314edc6 100644 --- a/drivers/clk/qcom/gpucc-qcm2290.c +++ b/drivers/clk/qcom/gpucc-qcm2290.c @@ -2,14 +2,13 @@ /* * Copyright (c) 2020, The Linux Foundation. All rights reserved. * Copyright (c) 2024, Linaro Limited + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ =20 #include #include #include #include -#include -#include #include =20 #include @@ -20,7 +19,7 @@ #include "clk-regmap.h" #include "clk-regmap-divider.h" #include "clk-regmap-mux.h" -#include "clk-regmap-phy-mux.h" +#include "common.h" #include "gdsc.h" #include "reset.h" =20 @@ -57,6 +56,7 @@ static const struct alpha_pll_config gpu_cc_pll0_config = =3D { =20 static struct clk_alpha_pll gpu_cc_pll0 =3D { .offset =3D 0x0, + .config =3D &gpu_cc_pll0_config, .vco_table =3D huayra_vco, .num_vco =3D ARRAY_SIZE(huayra_vco), .regs =3D clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_HUAYRA_2290], @@ -148,20 +148,6 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src =3D { }, }; =20 -static struct clk_branch gpu_cc_ahb_clk =3D { - .halt_reg =3D 0x1078, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x1078, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gpu_cc_ahb_clk", - .flags =3D CLK_IS_CRITICAL, - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gpu_cc_crc_ahb_clk =3D { .halt_reg =3D 0x107c, .halt_check =3D BRANCH_HALT_DELAY, @@ -224,19 +210,6 @@ static struct clk_branch gpu_cc_cx_snoc_dvm_clk =3D { }, }; =20 -static struct clk_branch gpu_cc_cxo_aon_clk =3D { - .halt_reg =3D 0x1004, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x1004, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "gpu_cc_cxo_aon_clk", - .ops =3D &clk_branch2_ops, - }, - }, -}; - static struct clk_branch gpu_cc_cxo_clk =3D { .halt_reg =3D 0x109c, .halt_check =3D BRANCH_HALT, @@ -318,12 +291,10 @@ static struct gdsc gpu_gx_gdsc =3D { }; =20 static struct clk_regmap *gpu_cc_qcm2290_clocks[] =3D { - [GPU_CC_AHB_CLK] =3D &gpu_cc_ahb_clk.clkr, [GPU_CC_CRC_AHB_CLK] =3D &gpu_cc_crc_ahb_clk.clkr, [GPU_CC_CX_GFX3D_CLK] =3D &gpu_cc_cx_gfx3d_clk.clkr, [GPU_CC_CX_GMU_CLK] =3D &gpu_cc_cx_gmu_clk.clkr, [GPU_CC_CX_SNOC_DVM_CLK] =3D &gpu_cc_cx_snoc_dvm_clk.clkr, - [GPU_CC_CXO_AON_CLK] =3D &gpu_cc_cxo_aon_clk.clkr, [GPU_CC_CXO_CLK] =3D &gpu_cc_cxo_clk.clkr, [GPU_CC_GMU_CLK_SRC] =3D &gpu_cc_gmu_clk_src.clkr, [GPU_CC_GX_GFX3D_CLK] =3D &gpu_cc_gx_gfx3d_clk.clkr, @@ -342,6 +313,16 @@ static struct gdsc *gpu_cc_qcm2290_gdscs[] =3D { [GPU_GX_GDSC] =3D &gpu_gx_gdsc, }; =20 +static struct clk_alpha_pll *gpu_cc_qcm2290_plls[] =3D { + &gpu_cc_pll0, +}; + +static const u32 gpu_cc_qcm2290_critical_cbcrs[] =3D { + 0x1078, /* GPU_CC_AHB_CLK */ + 0x1004, /* GPU_CC_CXO_AON_CLK */ + 0x1060, /* GPU_CC_GX_CXO_CLK */ +}; + static const struct regmap_config gpu_cc_qcm2290_regmap_config =3D { .reg_bits =3D 32, .reg_stride =3D 4, @@ -350,6 +331,12 @@ static const struct regmap_config gpu_cc_qcm2290_regma= p_config =3D { .fast_io =3D true, }; =20 +static const struct qcom_cc_driver_data gpu_cc_qcm2290_driver_data =3D { + .alpha_plls =3D gpu_cc_qcm2290_plls, + .num_alpha_plls =3D ARRAY_SIZE(gpu_cc_qcm2290_plls), + .clk_cbcrs =3D gpu_cc_qcm2290_critical_cbcrs, + .num_clk_cbcrs =3D ARRAY_SIZE(gpu_cc_qcm2290_critical_cbcrs), +}; =20 static const struct qcom_cc_desc gpu_cc_qcm2290_desc =3D { .config =3D &gpu_cc_qcm2290_regmap_config, @@ -359,6 +346,7 @@ static const struct qcom_cc_desc gpu_cc_qcm2290_desc = =3D { .num_resets =3D ARRAY_SIZE(gpu_cc_qcm2290_resets), .gdscs =3D gpu_cc_qcm2290_gdscs, .num_gdscs =3D ARRAY_SIZE(gpu_cc_qcm2290_gdscs), + .driver_data =3D &gpu_cc_qcm2290_driver_data, }; =20 static const struct of_device_id gpu_cc_qcm2290_match_table[] =3D { @@ -369,45 +357,7 @@ MODULE_DEVICE_TABLE(of, gpu_cc_qcm2290_match_table); =20 static int gpu_cc_qcm2290_probe(struct platform_device *pdev) { - struct regmap *regmap; - int ret; - - regmap =3D qcom_cc_map(pdev, &gpu_cc_qcm2290_desc); - if (IS_ERR(regmap)) - return PTR_ERR(regmap); - - ret =3D devm_pm_runtime_enable(&pdev->dev); - if (ret) - return ret; - - ret =3D devm_pm_clk_create(&pdev->dev); - if (ret) - return ret; - - ret =3D pm_clk_add(&pdev->dev, NULL); - if (ret < 0) { - dev_err(&pdev->dev, "failed to acquire ahb clock\n"); - return ret; - } - - ret =3D pm_runtime_resume_and_get(&pdev->dev); - if (ret) - return ret; - - clk_huayra_2290_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config); - - regmap_update_bits(regmap, 0x1060, BIT(0), BIT(0)); /* GPU_CC_GX_CXO_CLK = */ - - ret =3D qcom_cc_really_probe(&pdev->dev, &gpu_cc_qcm2290_desc, regmap); - if (ret) { - dev_err(&pdev->dev, "Failed to register display clock controller\n"); - goto out_pm_runtime_put; - } - -out_pm_runtime_put: - pm_runtime_put_sync(&pdev->dev); - - return 0; + return qcom_cc_probe(pdev, &gpu_cc_qcm2290_desc); } =20 static struct platform_driver gpu_cc_qcm2290_driver =3D { --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69ADD3C09E9 for ; Thu, 4 Jun 2026 05:27:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550837; cv=none; b=TD6uBiro6xEwaVeLPbs630MfwEuH31s9VOHBZLChGEf7VAJkngV/Gwr8GkvqtuCcdzfoYIniEFRKM7e7NMmxw0REuaP2U7sAgKnsO99kiO7mwPrFdnKykp8f4C22AhozWmYzqVBvxpFKSwPViAvTMrTNapOlZUJl1YBg3DffNyY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550837; c=relaxed/simple; bh=rLybFr1nm3KqTJtJoM4+U3ZrfAsIkDs2LbS3+BLktrE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=su/nPmAojlSeU0PHN+l8BEBzpjVw6PePk6MHUwce7oFXxwyoJBnwD7zJ5qk0jwNeY76ALw5/FQVJIUIiWHR6Xxo2/mVd7z4fNwU0A7cFZyuk0ZvKkzWr8f5NOFT1OTSuFM9RLL55Svt//w8FEvQFlnloAzfFkPN6lbTWQD1M9CM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=O5rX6+eQ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=HQRHBa27; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="O5rX6+eQ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="HQRHBa27" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6542lxLW3552370 for ; Thu, 4 Jun 2026 05:27:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= PMyEHNl/fqkgrWTiyaG6A/NMiRKAiN12ZYqWIjYuh2s=; b=O5rX6+eQEVwIo6g6 2l39rAuAiC4AGMSMLMnKQiien5YGJ8WOaXpi9shsijiHQm4CRITGTu9xXMYjlW4V wH4/qnAIgv4OXqkKdAND7dCYm5xpujpa8LuA3SgYcxHLhmKVpbDfEUuScsC2btpA 5m95RekHKn3keX6hwRu0+sxprqwNBOLEEQMAG0usOSjZoL+t3lO5EAAEuqWlvL+w i2G0HZuna4GyPaReLQBZudWfI2HCwsU//VpBC7VWsUGeDpIqwXjf3zeP6VbP4u0B za3s6fR4uziLFsZ1MCu83Q7oLd4IOFRi5vfiKaFReriRPWnNJeh5fKlFDhZy5UbB Qh+kRg== Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejj9mv54m-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:15 +0000 (GMT) Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-c858e0cbc89so224389a12.0 for ; Wed, 03 Jun 2026 22:27:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550835; x=1781155635; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PMyEHNl/fqkgrWTiyaG6A/NMiRKAiN12ZYqWIjYuh2s=; b=HQRHBa27CcIwjZsbpdC+X0RLCJ/Obq+1n1agEZzi6IEDRDZm8tSvruMoeQKkeadz6o suU7Vsxhxy38jamKpnoPj+TtlQwKiJTGrT0rlQCMdoGfjxgC33gq5B3nM5B8BRsj2vjl MqT9/3s0zIigRreB6j2hfu63e290ndxiKNcGEs1VLeA9RetAi1w6JV4UI/gYgywa29IM SpCpXz/bDmeqAW+wB8KoWjv8LKzbDGk+CXFBKEcyGyVr+WWsiUZgiKJJ1RU6bu2QUwPs x/NXQtvgFDj9n4lKEm2+LMiAGR5KvFO4PIyexj1d8QtKH8FLp14GN6NqmuYdmMYf6lsZ syUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550835; x=1781155635; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=PMyEHNl/fqkgrWTiyaG6A/NMiRKAiN12ZYqWIjYuh2s=; b=HpkYo8XkmaUej8sRLl+dkwDzkmmaEHfYtkR+UK0g3KSjv9pe/yeNNujnJr86PYnt00 ny3iQfLrOMnZEg9rXmXfG9twgN9thyOLw0812lNHK0eaaC8GpuAY0fJuMtZQ3xM0YzO/ 0p3ZKdV1NyM2PQl7J0hYaxjbQBGHJIYgSoMOZ408/lAz4eBrIE/DuYQLkDoZ0ojrKshB COd/5yI2CN8S3RXGreB34iDYfR3s9YITqRqvU1i04PdW1nrmiU3lCzGRzrIerHatX7Th dKg/7IMzcUfOcf3GUJokfgABgPtbEEdf5kFRWtgQyBPWhucGJ9KBWKgmUBWuyJvYHpQ7 246A== X-Forwarded-Encrypted: i=1; AFNElJ+g0B8yAvFsT+185BDXqglQYc+ESQDYEYJssgl8siGXkhsIp/JT01CYFd3kstPri8717XVHAMhJBEKQijg=@vger.kernel.org X-Gm-Message-State: AOJu0YzwDnQQd1S5GNiVNIrs9YjqRiGXIFjYwWG5O+9K3Ue40ASM+DKf eXJR6sVUb9shEPidImifszsYhkfg+zufF4nq70eADUqUX4wkt8DCTZjKzZ7XhOYTk00pzCGPamN X9rrTUXmokmgHmAG6L8GRy6Hr6zlPCU1rnQPnf1gHz52e3MymcD2y1WxkQxqMS/p0MpM= X-Gm-Gg: Acq92OGzzkiwZnAPcCp144hNYoULABfULqSGWDiWuQ58UKtRWXgpO8guBxRKP0f12O8 LoLUcBKy1WZ09vH/ishZ8qqhv+g3rU7UT4VxCft3OGzqLU/b/oSnCY+7502BtuQQmJZkz2pwYT0 aCkL4Scsax14Q9qscI4kFGl/Mkm9cHLTHB6ZvAI/RYSdxLf4h0m5Y9TR092vaKcadtdjSSOSQW1 XBAcLX90IhnWr9Zj2PA6dwJtxGGgkinn8z54sbR37bDSpCzVjBHlsSYz/YvOqGu97m/MbefKBzE AI9/KeBAuDI9419gprFVdVmaKmzhxsPRtEJY8+nRs+nXmDSyi+73+izd3J78GZRY1Qmn1kv5Dys NNDaIY8W4NHSx74+1KwA0WwxuP1YrgBuNUEld0aeGrG6H2rnCgEqXvsQMDQ04zEk= X-Received: by 2002:aa7:8887:0:b0:834:e5a2:d089 with SMTP id d2e1a72fcca58-84284f1bdfamr6387404b3a.33.1780550835141; Wed, 03 Jun 2026 22:27:15 -0700 (PDT) X-Received: by 2002:aa7:8887:0:b0:834:e5a2:d089 with SMTP id d2e1a72fcca58-84284f1bdfamr6387379b3a.33.1780550834671; Wed, 03 Jun 2026 22:27:14 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:14 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:15 +0530 Subject: [PATCH v4 09/13] clk: qcom: gpucc-qcm2290: Park RCG's clk source at XO during disable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-9-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: 89s6YYOJEeFA1CHZDKZSsDq7lR9vcmMz X-Authority-Analysis: v=2.4 cv=XK0AjwhE c=1 sm=1 tr=0 ts=6a210cb3 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=zEYBLtLDRKTvQvC0xrIA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX8DsyvJJD8F0f JV7bpaGf0Dc9VoObFsdTX1k1Qv9ZiyT1u7guKw6aZL6A67a5mKMchRcX0SbaUDX8iEElGpe8TlR 6ZGPyvOSQx8P0n/j90pt6BTr7dJI/Og7/W0so03H8JQL42Jx4R3Ey+/H4rD0QkNPRh9/Ea4d3Cm SSa/YJxHrv42xbn2rQ/2TV82Yu62DYNkL5JMdxAEz5WXs0MjM6kh2eMi4xsDOvxqr5Nkm0JbZcA n5K0bSriNQsQGtENr8IPAqcIQJcjppb36z2tZmaqMRGYiWYjtnrex7UNMpOQha5QApgPA/Tirw3 IjVaB8tS7BCxPCtTaDvn8DoDAKQ0en6p1VoXxdqBSTbasRBcoJZPYVtTTgdPdLtxCzuDEsVJ8Hw qM08SL5noFIWUDt6no22xUTPMUr5g7pQCSLxJFXkhuh9wlVXG4PvzAYGzArEdw4JczOFyr4A+9e aHFBJCSb/LEKBk7LKpg== X-Proofpoint-ORIG-GUID: 89s6YYOJEeFA1CHZDKZSsDq7lR9vcmMz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 The RCG's clk src has to be parked at XO while disabling as per the HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. Signed-off-by: Imran Shaik --- drivers/clk/qcom/gpucc-qcm2290.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gpucc-qcm2290.c b/drivers/clk/qcom/gpucc-qcm2= 290.c index 1c8ed12f6bf8154596d031347540ef621314edc6..2150b94ad0ce5146c47ae21fae4= deccdaba20673 100644 --- a/drivers/clk/qcom/gpucc-qcm2290.c +++ b/drivers/clk/qcom/gpucc-qcm2290.c @@ -144,7 +144,7 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src =3D { .parent_data =3D gpu_cc_parent_data_1, .num_parents =3D ARRAY_SIZE(gpu_cc_parent_data_1), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CD893C060E for ; Thu, 4 Jun 2026 05:27:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550842; cv=none; b=SVXAbpv3J6QdvEW59YQaU6t94cR47yISxGsSB2zouKFpi7zazEMd4BZCLMBcbLjUGgs/QYNTrsU0HFLhhcjiwO0l0nANe+g3KmlrglgqJOTW6ueirhiEUXmOgRyfYFGCD/2/ga3cGfV+HG+rE1Auj03kQ7anki3tiGbkQTFmbqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550842; c=relaxed/simple; bh=lVc4njKqOhZzn4+GH1LiG7VTyYhJso+ZprzY1j0MwKk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pXdXDUoISdxTxgkTwlU7xwaAmWL1HkxD2pXUs7kLOxsbp39Ze78UOaCWXUep9Tl0S2FulvYT0fcR7t8Gtbr2OG4LTFu95X2eDG2l3v5UqfrUKb10QwcMozK1w3T8jqKFZEhAC15B7BuZMoTKThSxlNDFP/mNg5TzlVUpXfyIhWU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=dwvoqv4A; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=GvUqprfD; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="dwvoqv4A"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="GvUqprfD" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6544Ziho1039436 for ; Thu, 4 Jun 2026 05:27:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Kr1A4/6DU9ckTKGgpWrd7fjQD2lYalZrep1+V/xnykI=; b=dwvoqv4AuC4unBMq nhYnJ67hAFTMG5T/o9K4KYGLXW1iNlIQoYESojVLtTwgVjeC39zEjGFCyx3iEmD+ rEs3qBCD2F9r/HVEGAWr8/ST90LblqfJw6Rv5aVHioCqOWy/blYrkiUAt4nLvocv r3UYSuhozTD5X6Mvb7cvQSXYPjg5b+TpDZYT0u8HOjn4VD2PXIIYrlGq1A/jMM5s 1Y34vvLOjG3/kiin6GRulvEupdt5GKPZ+GC86PuIGHMiByPE7A500/JSLoTowH31 4Q9GEnh9++/a4y69CJIMjp+xFuYcpLNaT+Un5IOMKF0m7GwLCJuiEd/kY39Nq/Ak 32lCAg== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejtj8hs97-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:20 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-8423efbfb61so229598b3a.0 for ; Wed, 03 Jun 2026 22:27:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550840; x=1781155640; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Kr1A4/6DU9ckTKGgpWrd7fjQD2lYalZrep1+V/xnykI=; b=GvUqprfDNWn8DYI9gfHNJxz92j8x++IpubqRAsh78Vawu7h9GaBOM/DmbiirWixU/m 3F7KjoHTSKPPVQgTQbEqFcOIB+SGLiWNPuT2wHwdDMM3Eg91kgOHWdq8qm5O7+vhWLz3 lb09pG1+AfRpCUnOpmbX5kp6r9alVNang5rP29YuyrhhKpX6ZVVe62pddIwNHniukS/8 inWBIlWlr4pBy08/xMKh6MzftI7fIvPtLaIcZWlrayZQJljNpvTU7KVxUD7cOzdbKDot YAozlXS1MsPmMTN2rPtceC/OgSZFIJBiC5os2H2zO51ndVBq/OSQKZT/xQI7Eae2/NlH DuFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550840; x=1781155640; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Kr1A4/6DU9ckTKGgpWrd7fjQD2lYalZrep1+V/xnykI=; b=Q/5Jv6d/bni8A0e3bIW0p8zV4iqZbYqQmS1YFwCYqtuLUtsnAeZGpvTUgRbQCWx9Yc hqybT+07mzkvBc3RvLQ2WxRlvdF82cryHsxSKv5xlEWg0yczGyUcveOWAZD9FdZQH2/K myTEZCJgUkcVPLwtdpX+rwb1xlcJqHbBW1xPYX0mVEK3zHWoyMW3E4NnRRdi9FL939G8 O6SZrIzp9u6u4ladsYEuk2EjiLeq3hgMTtDuQtHj2iDdFXIMeqmyvxRwhVB/S8ZL9NSX p+fwMBwqFo/1fsA+nFka3KmTt3E7QCTX2C4aPEJMNeiHyNF93hf1ooOBDelZ2VwCgvqf QGqw== X-Forwarded-Encrypted: i=1; AFNElJ8mEboer+5vGVA4VsmBqpabK5/RTTyJKPoegSCE70uSuVA+70atBz1gOjI7jixqW91sd3+MM9A5gE9QS/0=@vger.kernel.org X-Gm-Message-State: AOJu0YwCcyAjSh05dvZPeGOdEcgvVL5a7iR0EW+QPJxJGvtlP40G2QsP lFkxqh6y+1gnlTdSmJYx5K5ko79YbSzEuVcBpyfJlugU870x7zOGhroSLEdgHfeE4OQYmhn43+/ Ut6FQMTiHBtnehq1/IKo2alBx+rddIgTF9HT7L9XhL9im0DGP/0NCWQCEMcsMluex/XU= X-Gm-Gg: Acq92OFii5WDmARzMwAg1ZYg8MlCT6eMfoXUhWIYcB8Xai6sAXI4V/D7wexT8mPhchI Wd0DahL7GZdJMr92ZWCIyxVWj5C/lzRfM8g7wKaOW5kXm076Zno1xKYyy8Fbta5ACi9NKIcddZW JK3uEXMylM+UdYBozhQVP9BHU/foLdPbcPBIygDXxqu/yhGFhGrAvhzUgo6xwmfGBefOybioz6o E41kwiFUfdtlCmFowS0cUlANxvyyCAGPLiZ7UQc/3grQLibSD26pAEIK9ufjP0CBj/dcGmU800l SLPBha3Rzb+uF7dINriUXpgrJbf/Y0UJTYn1Eh7qeyTg/pqUhwb6qNP7RayYw39kcrYnDvNE/xl kyeNxGT3U4cjse+opExNn6Gs8IhBp1DkFWhu6fPPics+LPfTSY3ccaQDZrAQETLE= X-Received: by 2002:a05:6a00:288c:b0:842:569d:b10a with SMTP id d2e1a72fcca58-84284fae3admr6234631b3a.49.1780550840274; Wed, 03 Jun 2026 22:27:20 -0700 (PDT) X-Received: by 2002:a05:6a00:288c:b0:842:569d:b10a with SMTP id d2e1a72fcca58-84284fae3admr6234602b3a.49.1780550839858; Wed, 03 Jun 2026 22:27:19 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:19 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:16 +0530 Subject: [PATCH v4 10/13] clk: qcom: gpucc-qcm2290: Update GDSC *wait_val values and flags Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-10-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: EYpibTcyzUbxdA-iB7qq7t1l5GQmaCT6 X-Proofpoint-GUID: EYpibTcyzUbxdA-iB7qq7t1l5GQmaCT6 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX8szktMZCfQ7r X9GjC5+yeCffNze8sL8saa5YGGfWKHL69NYC3zz4rH3U1EVf/Gf6y5t8pq0p1iGJW/GDSeUfrxF yAb88aQwEls088dj4CbF7zbRj9++xUM/n+cAbFJ+X91/kZ4aOaNrKlJDAkYoYW0T3XG3G/FYrqa cGqqtmmSwvPp+09fXNAYEXiotkYYQqT0PL/aSSOgBWrOi24avcT5HrlE3J62CWp34qzQs/sCFhd 5L0rLQrUbBSlY/clbaOnN5RvhGFiPvWuqmzYUeBpSUD3OgaKxykOxyzeqVfeRvm775eLAAiBCz3 0tpNoSvezVBWbqbeP2uAHogzhYmf2kSZrf5js6mBzMUMPFi637quec8DBFkmXbDYAHRR+msHLzL zHW4cw64wkWSzblEenyRUcQiF34/Utol4DueTTITlszeKEyqy/gjE81y8mXH4tE+ydivrwfLBgY GPNoh+JCF7HZs5hPeNg== X-Authority-Analysis: v=2.4 cv=f4p4wuyM c=1 sm=1 tr=0 ts=6a210cb8 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=0JU4rCqLU3avs8DDqI0A:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the QCM2290 GPUCC GDSC wait_val fields to match the hardware default values. Incorrect settings can cause the GDSC FSM to stuck, leading to power on/off failures. And update the GPUCC GDSC flags to retain the registers, and poll for the CFG GDSCR as applicable. Signed-off-by: Imran Shaik --- drivers/clk/qcom/gpucc-qcm2290.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/gpucc-qcm2290.c b/drivers/clk/qcom/gpucc-qcm2= 290.c index 2150b94ad0ce5146c47ae21fae4deccdaba20673..6e696cf672923495c789055dcd2= ff905d1761e16 100644 --- a/drivers/clk/qcom/gpucc-qcm2290.c +++ b/drivers/clk/qcom/gpucc-qcm2290.c @@ -270,11 +270,14 @@ static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_c= lk =3D { static struct gdsc gpu_cx_gdsc =3D { .gdscr =3D 0x106c, .gds_hw_ctrl =3D 0x1540, + .en_rest_wait_val =3D 0x2, + .en_few_wait_val =3D 0x2, + .clk_dis_wait_val =3D 0x2, .pd =3D { .name =3D "gpu_cx_gdsc", }, .pwrsts =3D PWRSTS_OFF_ON, - .flags =3D VOTABLE, + .flags =3D RETAIN_FF_ENABLE | VOTABLE, }; =20 static struct gdsc gpu_gx_gdsc =3D { @@ -282,12 +285,15 @@ static struct gdsc gpu_gx_gdsc =3D { .clamp_io_ctrl =3D 0x1508, .resets =3D (unsigned int []){ GPU_GX_BCR }, .reset_count =3D 1, + .en_rest_wait_val =3D 0x2, + .en_few_wait_val =3D 0x2, + .clk_dis_wait_val =3D 0x2, .pd =3D { .name =3D "gpu_gx_gdsc", }, .parent =3D &gpu_cx_gdsc.pd, .pwrsts =3D PWRSTS_OFF_ON, - .flags =3D CLAMP_IO | AON_RESET | SW_RESET, + .flags =3D POLL_CFG_GDSCR | RETAIN_FF_ENABLE | SW_RESET | CLAMP_IO | AON_= RESET, }; =20 static struct clk_regmap *gpu_cc_qcm2290_clocks[] =3D { --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88C3F3BFADD for ; Thu, 4 Jun 2026 05:27:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550848; cv=none; b=YH5+hy11DPMLdoiDc9O+9bhZPTBVduWO8G+sfRirvedoD5mr0Edla/IlGV8mSdajZEXV1DQAsET+rlCSd1gZ+zPmS+9kBzQ9Ov7Az3UQz99aCLclSaODyxV19+lL2343oLEy19VzHBShQG3wbWa8tPFRVDsiX5J35HnbOikXjNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550848; c=relaxed/simple; bh=Fb7z5iu2Tu23nAp6mDwCPKGAkCEtpKFZU1e3tF43ZGs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s54r2qfSJGjiTRM8IpGJUSssPoIilNNk7VZIZpSJ/iKbThu89O7AH4PW/+jqhh/+gB4lJwRbhNMe7aVHTSEA8iJcBQrpoAKkBqBi8JI2d5h0NJbKteXJe2ZigsNuHNJ9GJBu9dX3H2gkzIVZcwFgQ0k3gPA55hS5koCZWbUyw+A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=jP1BgOpo; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=A2ROExcL; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="jP1BgOpo"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="A2ROExcL" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 654195fA141438 for ; Thu, 4 Jun 2026 05:27:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Gk1LjnHnaMQZUuwx1TTnzERzXyykYwap6JC7YNxS4po=; b=jP1BgOponwXvKH+Z uKI93IC6ylBIZx/UCrvwLa24Otthi1EFGoTFh46JddICAqYWhwKQCo+RJDWkWhBv 8xP5iNkdwClopAA8MZO1Ja/J9Zj6VlXSKP8awd1Cgjg4tmBbWVfAcGmDaOaKb7Nr xdiAtw8J2HkDGmLobafhdLv9SpHAs1ixN5aYFGmscew2kmpjTE+bPGwjplxqIsy2 R3kSBO7F02DfDlfAhKZ/L7fAtcOrvEGky5qu4UmDe8sRqCgX3kxrX9/0Uk5fXVSY nfnGYg0sbrXR77OTMiN/uxUm7HZBvdheBsbAKBP9chQm7yCawnvilKRV4TqWAh4W m4JLmg== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejyen8r3e-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:26 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-8423efdbe6fso251842b3a.0 for ; Wed, 03 Jun 2026 22:27:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550845; x=1781155645; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Gk1LjnHnaMQZUuwx1TTnzERzXyykYwap6JC7YNxS4po=; b=A2ROExcL4f3m7Q5fnSffSgewS/p5u01TPZcAQa5Nv/Uv/XZZRIYGmZ2/ogFGvfjpPR M6dr9vOK1dgxP28gdoI95g/o+F7B5aOO1vXSKFCihyFuV0fQVIjSfhqT4IVHA8evaua9 pI94U+TjilP6NOcmH7muklb7p8EQQFcnK0pnm5eLkHPZqgfVk7vrmEoACFc9hWFq/ry7 F+s9wNPnnPNScG32wt5BT0ddXjf0yj5JwPN2ulUTK9MmTEPfpb0e2GiGWYa9JPIQTDBT byxBxzTXjw4BqLnO4BImqo9RJCkL0mNJhJbVo5llQW0/4yxrHGyptMdc+DM/IVuqlnQi X2tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550845; x=1781155645; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Gk1LjnHnaMQZUuwx1TTnzERzXyykYwap6JC7YNxS4po=; b=c7JiL8+VFISINyyULY72ju7S3dFHpZcXlTdIAhhyKxMaXT4UXwmqMog37USD0wd4l0 B/0QDc1vWEkA8PEuP9t4R8zgmwenhcslWUGU4gKgQ/Yg+zT0FVeEKEpBERbVEFqYbacG oy5dgovLxasx/Gdn+4AHhldot6h1ofJ4TKTpMPhqqSSuEjWd1rRbEVmV3BeZk4EGArSw BW7rPmCY1/Ce8rJ5nBo+5eEmzTYdBNQe50+j1/hMACas/rXQokdUWFDBN8x7MY8U4vyW ETaylGSkoIYfK1atlU4zzV5LMlJfs2hhvNJ/pu9VzWFQi1iMslTyPL/XW7y4uUkO0Qd/ TlSw== X-Forwarded-Encrypted: i=1; AFNElJ81m97RaXTTNwI9xRfVfacg3vYbWPQlaR1klK27uKAS0DDMdG0RN9USablK8nVteQE6kqmaV5mv2sql6O0=@vger.kernel.org X-Gm-Message-State: AOJu0Yzg2KEOwu9sHBo07+h40AvjYoLkAjP/bUvglV3W4W8YNyjrQ9My V9wpA8JTkTnETLogxFhZu7eaBj+6d/h9d1cxlwYcGUp4CrOB+oZP6SwxgF8OZiq82cn8EIgySGj tRU4ZdoeP067bG+ntY41G+dzSlnFs87low6GxAy+upDAxqdPh5TPAPIOznMoqqa1YC+g= X-Gm-Gg: Acq92OEK/WHclZ19Sj+njp8gS65yjJN3RcwUrgTejVFT18vCOqaxwn5GM6kBoNWWoHq YmHBs8ITvckPiuJUk80WpgGhhblN/0epOaeMIVQUKLg2xo7L5UeF0JAmzbMYaN1BXt3QRf5/i/g YrXZMjrotgAE8iZbVS2dyZ3fxMwMkk0kFRu1kXWuQ8a6qJk46azJ4CIQIo+cimoXor9KK/xTiXh +AqRKm0krtQt/xoQSwjx1Tkar7uu7HVVOSIHglqeXSTqC/foYZAP9RRO1HOU2o3fMImpcLSa38y wLq+YpeckSTlGrhdfGNAcUEz2FFSB5TErf6jkSBbnvo3ExPgMOa9p7B5eJxKhcBY+1HDjjqW/qx qwILQ22VsoEOzdYOy2ymQ6XZYVM5qoDWc1RAIV+W4sgTEAf9UI+033uXp5xss66A= X-Received: by 2002:a05:6a00:2999:b0:842:6004:3fd4 with SMTP id d2e1a72fcca58-84284ed9801mr6234791b3a.24.1780550845484; Wed, 03 Jun 2026 22:27:25 -0700 (PDT) X-Received: by 2002:a05:6a00:2999:b0:842:6004:3fd4 with SMTP id d2e1a72fcca58-84284ed9801mr6234757b3a.24.1780550845013; Wed, 03 Jun 2026 22:27:25 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:24 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:17 +0530 Subject: [PATCH v4 11/13] clk: qcom: Add support for Qualcomm GPU Clock Controller on Shikra Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-11-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Authority-Analysis: v=2.4 cv=JaSMa0KV c=1 sm=1 tr=0 ts=6a210cbe cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=vsOEvA3BJYGQS88P8KEA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-ORIG-GUID: uLTBfIBRB4gX-i2TK35QWKdpHOS9DVTD X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX32wSZWmOYg15 Wwdkb33bvSf/PZzX5gjIXXo3R+VktvfRPqxSUzsClMhyGRJDiICUK/Gs5NfnOay8QFRKRQEkekj oK7uT3UvkqF1Ih7Lu3/Li9y2U4D7zhFMO7ET3w4PF453jEmwEDHIY6zgG2HA5PuQYv5qTzeHmPP sMoOW8o9Y5xyj4/xGQiif7Wh1V9w74k002R84Kjsn3lBsiM66z8jDHUAXcwI0GClbLxYyrvcmau ggngqmIE+1R+fY8cJSrUX9uvcfjM18DJPK70t+Sikve3keATeiT+CrwnoMHFFnkMTnNjR/L23ym U2AyQOIuU8WUn7RiJFp1gOKuFEYVeu5uLBC9UdZSwWQAPzV0fIaY3yoF+KNu7mIxjOoJFaGagK3 IlLNuIeH/8QHkwmHUk5GpRoFxBX6MWYCkZBuOc7jqObD1eHAx4NKy8NQ4o8WagEa41hqhB2Qloy SPzYDIP9ObA757x2oQA== X-Proofpoint-GUID: uLTBfIBRB4gX-i2TK35QWKdpHOS9DVTD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 The Qualcomm Shikra GPU clock controller is similar to QCM2290 GPUCC hardware block, with minor differences. Hence add support for Shikra GPUCC by extending the QCM2290 GPUCC driver. Signed-off-by: Imran Shaik Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/gpucc-qcm2290.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/qcom/gpucc-qcm2290.c b/drivers/clk/qcom/gpucc-qcm2= 290.c index 6e696cf672923495c789055dcd2ff905d1761e16..f43dd8231fb20d6f44a10ac33ed= 7dff923c81fa4 100644 --- a/drivers/clk/qcom/gpucc-qcm2290.c +++ b/drivers/clk/qcom/gpucc-qcm2290.c @@ -133,6 +133,17 @@ static const struct freq_tbl ftbl_gpu_cc_gx_gfx3d_clk_= src[] =3D { { } }; =20 +static const struct freq_tbl ftbl_gpu_cc_gx_gfx3d_clk_src_shikra[] =3D { + F(355200000, P_GPU_CC_PLL0_OUT_AUX, 2, 0, 0), + F(537600000, P_GPU_CC_PLL0_OUT_AUX, 2, 0, 0), + F(672000000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0), + F(844800000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0), + F(921600000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0), + F(1017600000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0), + F(1142400000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0), + { } +}; + static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src =3D { .cmd_rcgr =3D 0x101c, .mnd_width =3D 0, @@ -357,12 +368,16 @@ static const struct qcom_cc_desc gpu_cc_qcm2290_desc = =3D { =20 static const struct of_device_id gpu_cc_qcm2290_match_table[] =3D { { .compatible =3D "qcom,qcm2290-gpucc" }, + { .compatible =3D "qcom,shikra-gpucc" }, { } }; MODULE_DEVICE_TABLE(of, gpu_cc_qcm2290_match_table); =20 static int gpu_cc_qcm2290_probe(struct platform_device *pdev) { + if (device_is_compatible(&pdev->dev, "qcom,shikra-gpucc")) + gpu_cc_gx_gfx3d_clk_src.freq_tbl =3D ftbl_gpu_cc_gx_gfx3d_clk_src_shikra; + return qcom_cc_probe(pdev, &gpu_cc_qcm2290_desc); } =20 --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBC2C3C063C for ; Thu, 4 Jun 2026 05:27:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550852; cv=none; b=eDQSfCPyPjBYUc5GaLlOr1HRSs0qKxD+ZSDxjU7lKrvXcCkjwPAHrMvzmAD3EtzD9Bexzi9QDqhrUyLKkhtmBfZDB/QPUtSr+74k6e2KOMGUsyTKmiVrT3+UXv2sJlgQggqrJTAtN/6JuiwaLvyxAedwiLEIb7MyIfSLreg750s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550852; c=relaxed/simple; bh=pXAawpVYsMfvV2O3InerqWXimxMOKRET1MkhuMfO/uA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=U+nCkLZulg46NeIwBO+oSUbJ5rnjptZ6r7o/JwPY6elRJJFfPvLUChwzPWfBI1C4m7R7lMcym8q8eQnrJJQ2GXDpm+A6wYDbgfC3pskr+4wDMkS7Te1RzgQzFPaPVqmzVjTxR5amgKdva7Qewp/Z8TfPUZV7nW+L4jt2P4jpytY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=DYd4OCEF; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TeX8F6PN; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="DYd4OCEF"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TeX8F6PN" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6542UL9l3552309 for ; Thu, 4 Jun 2026 05:27:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= GfY+l5ENa+nZkYY0yw7MYu7dswdpetfEmFu3VTlOPEg=; b=DYd4OCEF49gHOjc0 AcnmcFzA2grMFqsKhfC1db9MP3fWXTTXs9rdGSIyakuXI862UFjl9SGXF145Un2z EsGxXn848GEBBodc+FyZsYbtq+KI10kHmooqGtqGqmvJUV1Znnilv6UIlxXL/lp0 JfHE5YuBnkvplr+p8Qb9sNOUmGLMIc+kQEKJmK5x8bHy56IJZVnjgTnkTweaMmYR Y2BYwtpU95iMqf50akWLGvAe56x26jIBXiMbaRjSpmgqgrKrRBq+Tfw2P5B5QseG Z/ISfP4ibsleNU7uaK9k0paLgWNF6shpkp6Dt1S4FGAb2YmzkgiOV5wW/7749A2E jQB54Q== Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejj9mv559-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:31 +0000 (GMT) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-8423f424d5bso256095b3a.3 for ; Wed, 03 Jun 2026 22:27:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550851; x=1781155651; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GfY+l5ENa+nZkYY0yw7MYu7dswdpetfEmFu3VTlOPEg=; b=TeX8F6PNWZ7AOMq8aqDHztHiusiQ+R1dxTLoCzX0oMN76IerItgnhFQgIUifj5KgHV 6GhXbcKRwEdz2+rscbD6U/oE9GrBlsF0APIrv1UYt39w/tP4h5P8uGxJs3aEDiXM9/Id Z5w12i4LSnN5zWl8O+9EnI0amdl0E8gM1epitOju4YIR8/0geF8ebx8Ikk1MWTLOvNhB qvNPZHdv9dNixNinautlwbv2WWaFkIcvgbpzqTRSHsug1VglMzUgTfSHAsE4mb9JPd0T cDUXGsP1GWN3G4rwz04u5OFE6oMCUetiL5XEreHIA5FlLiBPXOHnCZTTm3WWAElYQzOn 6kCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550851; x=1781155651; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=GfY+l5ENa+nZkYY0yw7MYu7dswdpetfEmFu3VTlOPEg=; b=ITqhG8fcKhKxu/y/mGk8mKdP46gjomJQivZYRzdKw6xBSDe4YCAm+4BctQwGunDdH7 /hfyv3S9XkgvzQ2omcrUWeyfJZiM/Q3gN0nIz6LWiwrrIrlsx2d5gL9Z2sICANHrxhGj KydcSvhvnOJv+rGgR7TR7Pn/NvTT2OKHWsU67e4DauZ1VnbpDSp5RdpxBiRtKSe5p2Ym BgHccmgKjJk1N1OBsRnf5tPf6fbFmaK5YSDomi+95QA+5eGmHXoJ/oEK4k8XgiY2goNO /CC0Iwkhtg55PeFSsFPXGFqwrjwgTtS8tSStvrmYMHL+FLAQeToRS64V8/W+kkDiwtOo 9sJw== X-Forwarded-Encrypted: i=1; AFNElJ9chcZdW70D4Pd1YGzwWLKNBPTFsoEWJfRbUJxNPgjbMiasmcZpuuZFDJr7Clo5ZOmUKOx+mq1a+78zg1E=@vger.kernel.org X-Gm-Message-State: AOJu0YzoHREuUB4r+08A3q2qe+jeFZrglN3VNssBkxjElxlbtqKJyE2E DrTP+SDv6f+kq16rcMQ0vPihVPs+RkqvmVHXIxxqcWs3xfExEmzRjzfzWZzDIZPEbp1dGAnX/Lr Q7VqM1UJblklFE0sdZCdvpXsLztebLTruSHKMPtlV0FYc/m4Paa2KDtt5Kskm+BxJqVA= X-Gm-Gg: Acq92OF9OjMBQ2vX5CiOXbhJa+7Se2FF2EWMjcum44eauoxDYPGtSKpKyqINPNj7gB0 sPuwYUzu/CDG894RTmTbsmn3MrlC1mazzJfg/4knQB1767EnbJXy2A0bd22NLwEo9/IvFml/Z4K bm259Tfq8iaBSz4n5U3EInrcoOM9qxfp6imeEjreP1gGtW2HBb8NKo7rfDZRK7zaAQ2Mdi28+gR rt6pgIJmrke4dpaFeWB6m0Phvfd6siQoMnw43T4Nls1yGcDX5hFikwoygUSAwVM8mPrYRQcvXLb 0K78YEfunAFNXrWl1Fy+Pxt8y5GCC4ACYGXrsS4+EC/w08u5m3DuQSJHVVPSgEvpAFJuD+To4QR 8AFKlCQqQ6ZWlB7UD86SANIQ1A4DUzVKD7oW44Rj/8qpHrFjo1j8TFSTOLVfF/a8= X-Received: by 2002:a05:6a00:951b:b0:842:2419:6bfe with SMTP id d2e1a72fcca58-84284e36473mr6826989b3a.7.1780550850629; Wed, 03 Jun 2026 22:27:30 -0700 (PDT) X-Received: by 2002:a05:6a00:951b:b0:842:2419:6bfe with SMTP id d2e1a72fcca58-84284e36473mr6826962b3a.7.1780550850189; Wed, 03 Jun 2026 22:27:30 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:29 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:18 +0530 Subject: [PATCH v4 12/13] arm64: dts: qcom: agatti: Add DSI1 PHY and sleep clocks to DISPCC node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-12-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: fLV8iHHV-PPL24k4hfYoP5ded1Wl1tKP X-Authority-Analysis: v=2.4 cv=XK0AjwhE c=1 sm=1 tr=0 ts=6a210cc3 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=Gd0QNvzNEKi-DX6Kg7cA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX18qXpCfP+26f 1uIu4WE4uevkgZOrRKtvubNdYsODo5bI/pv9Tu2Pu0sQhTwDkAcQc80ALQtiGtuKxQnLp93i0hK xiGv+FNrlqXoVs/hpvSTZ4X37OtKwaiQdyRRyd97MpN4Ew+/z/gmAPb9cGEIHjd13JlXLPKDYdm yBJHa4t+B/UPOiZmJiczQlIM4UkeDKo86Nn2QrT/H1ATGiF6rkrQq9JhpiwBcEW1ThVpHa/2zX5 JGadzeaF1I+MKwoWhv0nN8+cCwKN1MhzKcoo3lN6SPQS2WGfdxdWCu4Bfv665Q3ZWnXrEHPVoD+ qyiF+PctxCybCFINdwGC1ABKMmxi2HVA62qKk7FwBDqiC8YwECf2jxwnKWms47zjGUGo+QjC3e4 Czy1oN2kUnNM241cW7Ahsdsqy+RjmM3o35RtjwkUfzBNq+X3ERayyqLkXbrg6YPRAZlK7Kmj3bU liRlrJjwBHvXcIbCSTA== X-Proofpoint-ORIG-GUID: fLV8iHHV-PPL24k4hfYoP5ded1Wl1tKP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Update the DISPCC node on QCM2290 (Agatti) to align with the latest DT bindings changes, which adds support for the DSI1 PHY and sleep clocks. Signed-off-by: Imran Shaik Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/agatti.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/agatti.dtsi b/arch/arm64/boot/dts/qco= m/agatti.dtsi index f0b6ae9b81528a848a75f6884f1b27137d780f07..f1d93f86d0a62a813f76580362e= 850ab847e51eb 100644 --- a/arch/arm64/boot/dts/qcom/agatti.dtsi +++ b/arch/arm64/boot/dts/qcom/agatti.dtsi @@ -2190,13 +2190,19 @@ dispcc: clock-controller@5f00000 { <&gcc GCC_DISP_GPLL0_CLK_SRC>, <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, - <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <0>, + <0>, + <&sleep_clk>; clock-names =3D "bi_tcxo", "bi_tcxo_ao", "gcc_disp_gpll0_clk_src", "gcc_disp_gpll0_div_clk_src", "dsi0_phy_pll_out_byteclk", - "dsi0_phy_pll_out_dsiclk"; + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "sleep_clk"; #power-domain-cells =3D <1>; #clock-cells =3D <1>; #reset-cells =3D <1>; --=20 2.34.1 From nobody Mon Jun 8 05:28:09 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 074F33BFAF6 for ; Thu, 4 Jun 2026 05:27:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550858; cv=none; b=Y6GA+ZMKv2Bdu7tzmuuPP8mtGujgQm7s9I0ZfIH1Eif+ItDW3tX7JFcFpKnKMjGbbtfmSQJeaTSnZ+7u5fbO+dUcbYKDsIOYxaag7P6YQMQDKdUsGxROhL91gDbseCJIZFAgQnxCzwJO/oS2K3zm5Ut83F5xQ75M/IQIVah0Uoo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780550858; c=relaxed/simple; bh=3XPM5GTfEWus5e7nz7aKCY0rPQs4qFX+m9ud6edOuUo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ebzrlt4GEzRw0szTa2IHwKph4mr+pKRE2KPldomJpT2bH904Zc+ff0djQjni098TRmQ3anKgucn3A8EKOLm5Kg5TGYDn/RXteWYGgZOT0iCGF9v6VXX6s5SaowUbDN8hB6MnE4T2Dp8aZIKfboRyXxze6fIv7KtLUVM6ZDxL4b4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=WYNjxrI0; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=HJKcdeyG; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="WYNjxrI0"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="HJKcdeyG" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 653N0H0w1476852 for ; Thu, 4 Jun 2026 05:27:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= L/xsy2u+YlnkV58dJ2Zzap4FwbISqgE32SWxOXPVdM4=; b=WYNjxrI0Gc+ekDf/ gdHC6iiEP14XnhLrkytRon7paS7BsuziPxkkjLVG+3k3JWomdDHM+0CJDBit7Sjd Uc5sbn3PjpOyyfxX84XmdBvqqlKv2VeXQ+oPPGjaVIe5OpAMlow+vrSVkdrcr+ea 7VL/MVbl6sxhhme/bATSZpv5lRDXFFSTezxSmvIDJ1FZ6huKjkf/YvpxoXzrgUyZ L6KlGbIrfHXVntTpwB4ppwlGWJaht5uGPtamglhkSGlsoYAPuYeRKdSPDxvJGaTd hOfF1Vfcn4U+URMycvHAVfXBA1H93H4Uz6FPMgJlfuplUK55U7FvLSCfCbpIVcxi JRGG9g== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ejp6nu4pr-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 04 Jun 2026 05:27:36 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-8424aac207eso321826b3a.0 for ; Wed, 03 Jun 2026 22:27:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1780550856; x=1781155656; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=L/xsy2u+YlnkV58dJ2Zzap4FwbISqgE32SWxOXPVdM4=; b=HJKcdeyGJlXvu5pRKb/OAp5zqmQPVVBSykw+X/0W2nsuwvfz3J/3scBPukjjxxOaCr 2p9cXHiUNDD9LEABuRvs8P4BgpWaS/m90yW56EflzvHRMtK2fKoDF1CqwSig8nHHUSdi Pm6pnbshVvLQqYF+fHHzl9xYTHkF5P65dpjLfZrKI+dC12TTFHepb9tN56Do8UZXVclE 8RyIQmpcn3y2sRebA0io6EhwwCMCA/dEnJjxYRcafFCpmNMEk8+S8efbdNZCpif7A4rU AUgTOkJslkSODsGnuWLIaDOvJIVMVrtLPnk4H7WPbylfKruH+efZ0HvgkbeYFVIQhoNt LfZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780550856; x=1781155656; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=L/xsy2u+YlnkV58dJ2Zzap4FwbISqgE32SWxOXPVdM4=; b=mmcXbVgV/VgvA2dEtOuSR7fZGLntqHmwC1V3Gs0bB2znQOKeeTx+56oolu43UM/Ebo ctnzNk/gHhmPQPiOXYcde77L/tG+R390R+Q1265p8HL0TOAbS5iYNuZpFHLAq+eu1AEG 66K6BNh2s29ieJiIn0MpILcZNzOsR83casdJTr8B0MHqAvSvelSrCaZhpInUL0sfdfOL 3DgnjwZD8aaZSM7JkdLr541Sw34dPp7gqpe8E48jCzb7+5idN0APRlq2nq1eKEDFbaIX fvU1IeFKX/pLQgCZBIn3nI4U85PTKRaWppbl2k1blIAzAMNkTFM7P/goH2jepkRRgxlU X2UA== X-Forwarded-Encrypted: i=1; AFNElJ8v7JyZHCmYTmdT1MBWzvImEdAAaNwkxlfM2xBJAknAgukOPsn4Hux1m/9dm+vGge32q1QxaFX0fYdFMU4=@vger.kernel.org X-Gm-Message-State: AOJu0YzFi9ZdiOzeozqL3TlzHGtwhznLwjGQOKer6o5rrs4UoiRlnW1c LljSHFyxqd3wm9A3vXgdv6atYKN5feqgZgaUhv1AAq+K3wqQ3+HcchkfB2lALnkOSGw/5sEcAZl ayg6NCVB3N8JrrcABHsu6x6b3mruW4/IbsoyadMEamzfm3bx+P3RyLwsdy2r/vs419Xg= X-Gm-Gg: Acq92OFcaO0pmR4IJbfMmRC0OXJi7WJwGbwUsdoQOTXLGWjKeFKg6YerIFvbguAwnpB weXpsfXsEFimlOTdfBgO8x2dkuuF5pWwrLNCEPiRyL3icn/4hGkq+R0Qx6DzXGcy/v1JgePE37E TIxAvqZty+TeD8bT7HSbOU4Ep40dS+1P32WY0RR9/lmeMjjQPb+wRzx2zYr7lmI3bziYVDTDfWY js5yfQ+rRLvRqrVnkslMWZXw9SexOekntbDq15n3y4VfmU4C9CmSa00EOprq8CsfPwJBAvuXLie q9Gz/hQEcc9lhAmkCOTrawT19zHFSEZxwG5NuzNl3VK3pyUazWI5HyFwvwZkQxfsbp7WFTKQW8l +fDojjSXqWS+C9ny2tqMmO9TjlmmPH+L6Flxy9+TlJUq1+57S1Nubt22v6pDZHwk= X-Received: by 2002:a05:6a00:ad09:b0:835:3f51:730e with SMTP id d2e1a72fcca58-84284e6ddb6mr6505549b3a.13.1780550855808; Wed, 03 Jun 2026 22:27:35 -0700 (PDT) X-Received: by 2002:a05:6a00:ad09:b0:835:3f51:730e with SMTP id d2e1a72fcca58-84284e6ddb6mr6505515b3a.13.1780550855371; Wed, 03 Jun 2026 22:27:35 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842820e8e6asm4493678b3a.0.2026.06.03.22.27.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 22:27:35 -0700 (PDT) From: Imran Shaik Date: Thu, 04 Jun 2026 10:56:19 +0530 Subject: [PATCH v4 13/13] arm64: dts: qcom: shikra: Add support for DISPCC/GPUCC nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260604-shikra-dispcc-gpucc-v4-13-8204f1029311@oss.qualcomm.com> References: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> In-Reply-To: <20260604-shikra-dispcc-gpucc-v4-0-8204f1029311@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Loic Poulain , Brian Masney Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-GUID: FN3mN5abR34wwtusQgDlpy-pQdPO9Oy0 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDA1MCBTYWx0ZWRfX+N5k2MzVSDDJ tkjs7uYfrlq+CIj+BdVDQ9maDZY9dgjpGSqPz2FYYqa1pNpkYLyHOUwE0hA7tPfCkAGSqFm8QSo EaXIcTM46z/Q7oCbnKWuOKjN4ikI3o0t+bddosh66kQyOl55/KeTH9oNFFcaQLbSPmF2XySFl/x PdsdMmD4LLP54TjNkK0TVtcuq7Ov1bUI1NgDr5JV1pvcuIVFcq2Rh9oYkWyXPEXLuX4kwfGSkAz kymUdpuH1SysUkcTHksfCj5rmlfXOfDQGz2iutqvoZWIhoHnEsMsnbMJ8rCSfLX2iV8KmX2xYHN BLi1tF9raQMv8NfAhl6gbxAgGFqwzKgSvAqyVJ9CsGN/GjKX3ngoh4H4i0K0x9HlWu0p52WRU5T Q8otX3pWNFCWLZKSMXZnFolb71YQlO2eqGbID1WQvODqPN6G0Is9r6f1yVaNcEH1H2BKxblNiSt bMOkOkk0gVPujtADfPA== X-Authority-Analysis: v=2.4 cv=DbcnbPtW c=1 sm=1 tr=0 ts=6a210cc8 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=KUIDwAxYdJFQKfevFyUA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-ORIG-GUID: FN3mN5abR34wwtusQgDlpy-pQdPO9Oy0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_02,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 adultscore=0 spamscore=0 phishscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040050 Add support for Display clock controller and GPU clock controller nodes on Qualcomm Shikra SoCs. Signed-off-by: Imran Shaik Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/shikra.dtsi | 41 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qco= m/shikra.dtsi index a4334d99c1f35ee851ca8266ec37d4a200a07ee5..1ccb0f1419aaa34d32f3c3eaabd= b8727a497b501 100644 --- a/arch/arm64/boot/dts/qcom/shikra.dtsi +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi @@ -3,6 +3,8 @@ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ =20 +#include +#include #include #include #include @@ -640,6 +642,45 @@ &clk_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>, }; }; =20 + gpucc: clock-controller@5990000 { + compatible =3D "qcom,shikra-gpucc"; + reg =3D <0x0 0x05990000 0x0 0x9000>; + clocks =3D <&gcc GCC_GPU_CFG_AHB_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + power-domains =3D <&rpmpd RPMPD_VDDCX>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; + }; + + dispcc: clock-controller@5f00000 { + compatible =3D "qcom,shikra-dispcc", "qcom,qcm2290-dispcc"; + reg =3D <0x0 0x05f00000 0x0 0x20000>; + clocks =3D <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&rpmcc RPM_SMD_XO_A_CLK_SRC>, + <&gcc GCC_DISP_GPLL0_CLK_SRC>, + <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>, + <0>, + <0>, + <0>, + <0>, + <&sleep_clk>; + clock-names =3D "bi_tcxo", + "bi_tcxo_ao", + "gcc_disp_gpll0_clk_src", + "gcc_disp_gpll0_div_clk_src", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "sleep_clk"; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; + }; + sram@c11e000 { compatible =3D "qcom,shikra-imem", "mmio-sram"; reg =3D <0x0 0x0c11e000 0x0 0x1000>; --=20 2.34.1