From nobody Mon Jun 8 09:49:58 2026 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08BB63D9039; Wed, 3 Jun 2026 23:19:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780528778; cv=pass; b=aqaX/xO2/aJ+ngSbZaG2TaObufG55QhPVvoSDZ/QEcTtaAG6UH+ENY4hccJ/CAMRAV5uwBIsLZfg91cigle84Z4E3KvmOx/BFhbyGim90Yq/J+4S+ZzfQrUr+VEFs1iouqSkqeYFJVJUw2zflaNGBDufAKclKLYvxHuVoNeO0Is= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780528778; c=relaxed/simple; bh=JRW3yM5b0Bc8CZNn9QITbrbszOsJjFMCOjZ1OyrLTEo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=Cth+4fqfifjSyy+vrCfjB2KYQhHrLeGvJrSKluzjxfHKWHYZe9t+9gTtPglmhtf9/PjNnuBFIaG43vKyIiPEbtUx9dLYJ0DvYowdFbi/e2aFPnQNHqHgTTziLo4JG/sh3Pcfz0w4zGA5FBg5/UgsE2iq6mQtmC/CgxhHKuvYrL4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=deborah.brouwer@collabora.com header.b=F0bhzAhZ; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=deborah.brouwer@collabora.com header.b="F0bhzAhZ" ARC-Seal: i=1; a=rsa-sha256; t=1780528760; cv=none; d=zohomail.com; s=zohoarc; b=J4kGOTEDDnPsHyM7Kh9Tm14KVYGI4yohOBInH9u83JBtTj5IUxGC/UWNcqU22uYHt4vt5tNsFn+dnurd818pJcUDzVRB7rVtQSdXlef4cGk5AIjQltQCannc5Azh9aBSR0h0yv/UG+N95j/F2wETNqAAZ/3kdz4aOjudSKboVEc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1780528760; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=B48BPaNiNgsQNhS0VcH5Lp6S14iMdPnq6gxBl8tiFJw=; b=arYXrMYDWkMlmb3Fw13kEsEBHZS5fSMMg00EJj6VxYlifBb04mbkmWZKHKcdB5Z+qs0v/nhq68aoY0qlP0dYnJgx2gMJ2LmWCOaN0/uipFY7f7/dawrWWUbqLIN1FWeNHFMpV8qYPyWhTyyP1KsvBTz6+xXVgaQfGNYZVh0nGWw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=deborah.brouwer@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1780528760; s=zohomail; d=collabora.com; i=deborah.brouwer@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:To:To:Cc:Cc:Reply-To; bh=B48BPaNiNgsQNhS0VcH5Lp6S14iMdPnq6gxBl8tiFJw=; b=F0bhzAhZRE9RHvPkwWGnSkte+mIBaOgnF4H0aFGO4CEvdv6JtU75SF4pqR8zYXWL gpJ/RcCt9j8L9wN1BSTgus+aplMH8Nr/8zRdUdubVaBI4EYVYQxZE49k0P2WsBGMxI4 CFV7BrRmjXG747H8tbKii4PuVOVR7wWGcryEvEnw= Received: by mx.zohomail.com with SMTPS id 1780528758938572.0046341443704; Wed, 3 Jun 2026 16:19:18 -0700 (PDT) From: Deborah Brouwer Date: Wed, 03 Jun 2026 16:19:13 -0700 Subject: [PATCH] drm/tyr: move probe resources into registration data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-use_tyr_reg_data-v1-1-97f64e951cf6@collabora.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x3MQQqAIBBA0avErBNsBIOuEiGWk82mYqwopLsnL d/i/wyJhClBV2UQujjxthY0dQXT4tdIikMxoEarrTbqTOSOR5xQdMEfXhlsUZO1I4YAJduFZr7 /ZT+87wfN5Mv0YgAAAA== X-Change-ID: 20260603-use_tyr_reg_data-32720e66b2dd To: Daniel Almeida , Alice Ryhl , Danilo Krummrich , David Airlie , Simona Vetter , Miguel Ojeda , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Trevor Gross Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org, laura.nao@collabora.com, boris.brezillon@collabora.com, samitolvanen@google.com, Deborah Brouwer X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=10951; i=deborah.brouwer@collabora.com; h=from:subject:message-id; bh=JRW3yM5b0Bc8CZNn9QITbrbszOsJjFMCOjZ1OyrLTEo=; b=owGbwMvMwCVWuULzOU9c7WvG02pJDFkK28puHj4bf/XmX5crbbNfzW4+0mYu7OPnYT3fetFab S7JhpuaHaUsDGJcDLJiiixn7Y16xKveG+nO/98MM4eVCWQIAxenAEykJYLhf71okfWh6PK3nWqZ Z5grVwh8KmE7+P8Wk8/TuxoTZrW5ODD805lcM8XrX/ucp0lHdx7WLn7/956pxpwH+gJiqy3Y274 eZQMA X-Developer-Key: i=deborah.brouwer@collabora.com; a=openpgp; fpr=CD3F328C177AEF322D9FFF8379A829E70C5E7DEB Introduce TyrDrmRegistrationData to hold resources that need to stay alive while the DRM device is registered. This moves the parent platform device, clocks, regulators, MMIO mapping, firmware state, and GPU info into data owned by the DRM registration. The registration data is tied to the platform device binding lifetime, so use Registration::new_with_lt() and store the returned Registration in the platform driver data. Add initial firmware and MMU stubs so the registration data can own the probe-time resources that firmware loading and GPU VM setup will need. Signed-off-by: Deborah Brouwer --- This patch applies on top of the drm lifetime series [1] and the full branch [2] [1] https://lore.kernel.org/rust-for-linux/20260603011711.2077361-1-dakr@ke= rnel.org/ [2] https://git.kernel.org/pub/scm/linux/kernel/git/dakr/linux.git/log/?h= =3Ddrm-lifetime --- drivers/gpu/drm/tyr/driver.rs | 51 +++++++++++++++++++++++++++----- drivers/gpu/drm/tyr/file.rs | 11 +++---- drivers/gpu/drm/tyr/fw.rs | 69 +++++++++++++++++++++++++++++++++++++++= ++++ drivers/gpu/drm/tyr/mmu.rs | 43 +++++++++++++++++++++++++++ drivers/gpu/drm/tyr/tyr.rs | 2 ++ 5 files changed, 164 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs index 819f64a7573d..acf5080a5467 100644 --- a/drivers/gpu/drm/tyr/driver.rs +++ b/drivers/gpu/drm/tyr/driver.rs @@ -29,6 +29,7 @@ sizes::SZ_2M, sync::{ aref::ARef, + Arc, Mutex, // }, time, @@ -37,9 +38,11 @@ =20 use crate::{ file::TyrDrmFileData, + fw::Firmware, gem::BoData, gpu, gpu::GpuInfo, + mmu::Mmu, regs::gpu_control::*, // }; =20 @@ -49,7 +52,6 @@ =20 /// Convenience type alias for the DRM device type for this driver. pub(crate) type TyrDrmDevice =3D drm::Device; - pub(crate) struct TyrPlatformDriver; =20 #[pin_data(PinnedDrop)] @@ -59,21 +61,36 @@ pub(crate) struct TyrPlatformDriverData<'bound> { } =20 #[pin_data] -pub(crate) struct TyrDrmDeviceData { +pub(crate) struct TyrDrmDeviceData; + +/// Resources kept alive by the DRM registration. +#[pin_data] +pub(crate) struct TyrDrmRegistrationData<'bound> { + /// Parent platform device. pub(crate) pdev: ARef, =20 + /// Firmware sections. + pub(crate) fw: Arc>, + #[pin] clks: Mutex, =20 #[pin] regulators: Mutex, =20 + /// GPU MMIO register mapping. + pub(crate) iomem: Arc>, + /// Some information on the GPU. /// /// This is mainly queried by userspace, i.e.: Mesa. pub(crate) gpu_info: GpuInfo, } =20 +impl ForLt for TyrDrmRegistrationData<'static> { + type Of<'bound> =3D TyrDrmRegistrationData<'bound>; +} + fn issue_soft_reset(dev: &Device, iomem: &IoMem<'_>) -> Result { iomem.write_reg(GPU_COMMAND::reset(ResetMode::SoftReset)); =20 @@ -119,7 +136,7 @@ fn probe<'bound>( let sram_regulator =3D Regulator::::get(pdev.a= s_ref(), c"sram")?; =20 let request =3D pdev.io_request_by_index(0).ok_or(ENODEV)?; - let iomem =3D request.iomap_sized::()?; + let iomem =3D Arc::new(request.iomap_sized::()?, GFP_KERNEL= )?; =20 issue_soft_reset(pdev.as_ref(), &iomem)?; gpu::l2_power_on(pdev.as_ref(), &iomem)?; @@ -137,8 +154,23 @@ fn probe<'bound>( =20 let platform: ARef =3D pdev.into(); =20 - let data =3D try_pin_init!(TyrDrmDeviceData { + let dev_data =3D try_pin_init!(TyrDrmDeviceData {}); + + let unreg_dev =3D drm::UnregisteredDevice::::new(pde= v, dev_data)?; + + let mmu =3D Mmu::new(iomem.as_arc_borrow(), &gpu_info)?; + + let firmware =3D Firmware::new( + pdev, + iomem.clone(), + &unreg_dev, + mmu.as_arc_borrow(), + &gpu_info, + )?; + + let reg_data =3D try_pin_init!(TyrDrmRegistrationData { pdev: platform.clone(), + fw: firmware, clks <- new_mutex!(Clocks { core: core_clk, stacks: stacks_clk, @@ -148,11 +180,16 @@ fn probe<'bound>( _mali: mali_regulator, _sram: sram_regulator, }), + iomem, gpu_info, }); =20 - let tdev =3D drm::UnregisteredDevice::::new(pdev, da= ta)?; - let reg =3D drm::Registration::new(pdev.as_ref(), tdev, (), 0)?; + // SAFETY: `reg` is stored in the platform driver data and is not = leaked or + // forgotten, so it is dropped before the `'bound` registration da= ta can become + // invalid. + let reg =3D unsafe { + drm::driver::Registration::new_with_lt(pdev.as_ref(), unreg_de= v, reg_data, 0)? + }; =20 let driver =3D TyrPlatformDriverData { _device: reg.device().into(), @@ -184,7 +221,7 @@ fn drop(self: Pin<&mut Self>) {} #[vtable] impl drm::Driver for TyrDrmDriver { type Data =3D TyrDrmDeviceData; - type RegistrationData =3D ForLt!(()); + type RegistrationData =3D TyrDrmRegistrationData<'static>; type File =3D TyrDrmFileData; type Object =3D drm::gem::shmem::Object; type ParentDevice =3D platform::Device; diff --git a/drivers/gpu/drm/tyr/file.rs b/drivers/gpu/drm/tyr/file.rs index 9f53da7633ab..9baec67febc9 100644 --- a/drivers/gpu/drm/tyr/file.rs +++ b/drivers/gpu/drm/tyr/file.rs @@ -11,7 +11,8 @@ =20 use crate::driver::{ TyrDrmDevice, - TyrDrmDriver, // + TyrDrmDriver, + TyrDrmRegistrationData, // }; =20 #[pin_data] @@ -30,16 +31,16 @@ fn open(_dev: &drm::Device) -> Result>> { =20 impl TyrDrmFileData { pub(crate) fn dev_query( - ddev: &TyrDrmDevice, + _ddev: &TyrDrmDevice, _pdev: &platform::Device, - _reg_data: &(), + reg_data: &TyrDrmRegistrationData<'_>, devquery: &mut uapi::drm_panthor_dev_query, _file: &TyrDrmFile, ) -> Result { if devquery.pointer =3D=3D 0 { match devquery.type_ { uapi::drm_panthor_dev_query_type_DRM_PANTHOR_DEV_QUERY_GPU= _INFO =3D> { - devquery.size =3D core::mem::size_of_val(&ddev.gpu_inf= o) as u32; + devquery.size =3D core::mem::size_of_val(®_data.gpu= _info) as u32; Ok(0) } _ =3D> Err(EINVAL), @@ -53,7 +54,7 @@ pub(crate) fn dev_query( ) .writer(); =20 - writer.write(&ddev.gpu_info)?; + writer.write(®_data.gpu_info)?; =20 Ok(0) } diff --git a/drivers/gpu/drm/tyr/fw.rs b/drivers/gpu/drm/tyr/fw.rs new file mode 100644 index 000000000000..4872e1a07c05 --- /dev/null +++ b/drivers/gpu/drm/tyr/fw.rs @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT + +//! Firmware loading and management for Mali CSF GPUs. +//! +//! This is currently only a lifetime/resource stub. The actual firmware p= arser, +//! section loading, MCU VM mapping, and boot sequence will be added later. +#![allow(dead_code)] + +use kernel::{ + device::Bound, + drm::Uninit, + platform, + prelude::*, + sync::{ + aref::ARef, + Arc, + ArcBorrow, // + }, // +}; + +use crate::{ + driver::{ + IoMem, + TyrDrmDevice, // + }, + gpu::GpuInfo, + mmu::Mmu, // +}; + +/// Firmware state for a bound Tyr device. +/// +/// For now this only keeps the device resources alive. Later this will ow= n the +/// loaded firmware sections, MCU VM mappings, and boot state. +pub(crate) struct Firmware<'bound> { + /// Parent platform device. + _pdev: ARef, + + /// MMIO mapping used for firmware/MCU register access. + _iomem: Arc>, +} + +impl<'bound> Firmware<'bound> { + /// Create firmware state for this device. + /// + /// This stub only records the resources that future firmware loading = code + /// will need. + pub(crate) fn new( + pdev: &'bound platform::Device, + iomem: Arc>, + _ddev: &TyrDrmDevice, + _mmu: ArcBorrow<'_, Mmu<'bound>>, + _gpu_info: &GpuInfo, + ) -> Result>> { + Ok(Arc::new( + Self { + _pdev: pdev.into(), + _iomem: iomem, + }, + GFP_KERNEL, + )?) + } + + /// Boot the firmware. + /// + /// This is a placeholder until the MCU boot sequence is implemented. + pub(crate) fn boot(&self) -> Result { + todo!() + } +} diff --git a/drivers/gpu/drm/tyr/mmu.rs b/drivers/gpu/drm/tyr/mmu.rs new file mode 100644 index 000000000000..7cbfbe39a290 --- /dev/null +++ b/drivers/gpu/drm/tyr/mmu.rs @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 or MIT + +//! Memory Management Unit (MMU) driver for the Tyr GPU. +//! +//! This is currently only a lifetime/resource stub. +//! The actual MMU initialization, page table management, and GPU VM mappi= ng will be added later. + +use core::marker::PhantomData; + +use kernel::{ + prelude::*, + sync::{ + Arc, // + ArcBorrow, + }, +}; + +use crate::{ + driver::IoMem, + gpu::GpuInfo, + regs::gpu_control::AS_PRESENT, // +}; + +pub(super) struct Mmu<'bound> { + _bound: PhantomData<&'bound ()>, +} + +impl<'bound> Mmu<'bound> { + pub(super) fn new( + _iomem: ArcBorrow<'_, IoMem<'bound>>, + gpu_info: &GpuInfo, + ) -> Result>> { + let present =3D AS_PRESENT::from_raw(gpu_info.as_present).present(= ).get(); + let slot_count: usize =3D present.count_ones().try_into()?; + pr_info!("MMU: {} address space slots present", slot_count); + Ok(Arc::new( + Mmu { + _bound: PhantomData, + }, + GFP_KERNEL, + )?) + } +} diff --git a/drivers/gpu/drm/tyr/tyr.rs b/drivers/gpu/drm/tyr/tyr.rs index 95cda7b0962f..d4c2a474b712 100644 --- a/drivers/gpu/drm/tyr/tyr.rs +++ b/drivers/gpu/drm/tyr/tyr.rs @@ -9,8 +9,10 @@ =20 mod driver; mod file; +mod fw; mod gem; mod gpu; +mod mmu; mod regs; =20 kernel::module_platform_driver! { --- base-commit: 0fb675787f89bb4a9c820fc8e9ad5ab13ea3adb7 change-id: 20260603-use_tyr_reg_data-32720e66b2dd Best regards, --=20 Deborah Brouwer