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Wed, 03 Jun 2026 04:57:49 -0700 (PDT) Received: from [192.168.1.4] ([2401:4900:881d:447d:455f:e104:1ee9:e49d]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84282221470sm3132067b3a.6.2026.06.03.04.57.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jun 2026 04:57:48 -0700 (PDT) From: Bhargav Joshi Date: Wed, 03 Jun 2026 17:27:39 +0530 Subject: [PATCH] dt-bindings: arm: omap: ti,omap-dmm: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-ti-omap-dmm-v1-1-ef491c4699d9@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDU2MD3ZJM3fzcxALdlNxc3WRzEzMzyzQDg+Q0IyWgjoKi1LTMCrBp0bE QfnFpUlZqcgnICKXaWgCIp2NRbwAAAA== X-Change-ID: 20260530-ti-omap-dmm-c74669f00cf2 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780487865; l=3673; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=DjUT5aBftEoRVGB+npU3/j0yKiFQnkBpVVQvAeO5wKo=; b=91zrxjqErYzbjHVg/nfgNCPicq0FT0Z6dYt/V702pgmCu3YfH51KxJeCMDSUAhJoSkIPSWTbN XjBd/wCaP+4AVBH4/hikcIPkn2iRGsG/jnPDO6Q56xORaBlIlAhWmay X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert the TI OMAP Dynamic Memory Manager (DMM) dt binding from text format to DT schema. During conversion following changes were made: - Make the 'ti,hwmods' property optional and mark it deprecated as it is no longer used, it is kept to support legacy dtbs. - Add the missing required property 'interrupts' to example node. Signed-off-by: Bhargav Joshi --- Documentation/devicetree/bindings/arm/omap/dmm.txt | 22 --------- .../devicetree/bindings/arm/omap/ti,omap-dmm.yaml | 53 ++++++++++++++++++= ++++ 2 files changed, 53 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt b/Documenta= tion/devicetree/bindings/arm/omap/dmm.txt deleted file mode 100644 index 8bd6d0a238a8..000000000000 --- a/Documentation/devicetree/bindings/arm/omap/dmm.txt +++ /dev/null @@ -1,22 +0,0 @@ -OMAP Dynamic Memory Manager (DMM) bindings - -The dynamic memory manager (DMM) is a module located immediately in front = of the -SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of m= emory -accesses such as priority generation amongst initiators, configuration of = SDRAM -interleaving, optimizing transfer of 2D block objects, and provide MMU-lik= e page -translation for initiators which need contiguous dma bus addresses. - -Required properties: -- compatible: Should contain "ti,omap4-dmm" for OMAP4 family - Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family -- reg: Contains DMM register address range (base address and length) -- interrupts: Should contain an interrupt-specifier for DMM_IRQ. -- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm" - -Example: - -dmm@4e000000 { - compatible =3D "ti,omap4-dmm"; - reg =3D <0x4e000000 0x800>; - ti,hwmods =3D "dmm"; -}; diff --git a/Documentation/devicetree/bindings/arm/omap/ti,omap-dmm.yaml b/= Documentation/devicetree/bindings/arm/omap/ti,omap-dmm.yaml new file mode 100644 index 000000000000..0b375385a7ee --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/ti,omap-dmm.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/omap/ti,omap-dmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP Dynamic Memory Manager (DMM) + +maintainers: + - Bhargav Joshi + +description: + The dynamic memory manager (DMM) is a module located immediately in fron= t of + the SDRAM controllers (called EMIFs on OMAP). DMM manages various aspect= s of + memory accesses such as priority generation amongst initiators, configur= ation + of SDRAM interleaving, optimizing transfer of 2D block objects, and prov= ide + MMU-like page translation for initiators which need contiguous dma bus + addresses. + +properties: + compatible: + enum: + - ti,omap4-dmm + - ti,omap5-dmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ti,hwmods: + $ref: /schemas/types.yaml#/definitions/string + description: Name of the hwmod associated to DMM, which is typically "= dmm" + deprecated: true + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + dmm@4e000000 { + compatible =3D "ti,omap4-dmm"; + reg =3D <0x4e000000 0x800>; + interrupts =3D ; + ti,hwmods =3D "dmm"; + }; --- base-commit: 8fde5d1d47f69db6082dfa34500c27f8485389a5 change-id: 20260530-ti-omap-dmm-c74669f00cf2 Best regards, -- =20 Bhargav