From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 407A92BEFEE; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=ap2MScmCys9oIJZemXZNJ+PMZpsrVJaWL4P1aviC37UswliTCQUINTHzqUxXYqc2kHNRe+LWNGi7mF+sVSFhXZJ59S9iJSkb2dy+tZZHqqhBBHYcnRxa/ylfgBHQ32GDYPH+fuxeQuINkY8oHugUm1VG6Y2RhWOCoN5MF6exDMM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=1Vh82qJGGC1Heb5rOQYS8il+RuoY07KZwVTHU9an9fA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gKgTxzveh37HT1iXWKFfdTw7CptBp3ngLzWDL569c3+seDsNmFTai8nzHcRy7ojMAqSD+oW4mYDZxcfJnpFspdWhd7Pk55yEvIpPOAqbYkjK20GDFF5mGHx1FH4qxAHE+q08M3uiDP9ZjhpJGDgadQtbStTDYF5JgBSfvPqUZ0A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=T9466c/6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="T9466c/6" Received: by smtp.kernel.org (Postfix) with ESMTPS id E48F9C2BCF4; Tue, 2 Jun 2026 23:30:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=1Vh82qJGGC1Heb5rOQYS8il+RuoY07KZwVTHU9an9fA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=T9466c/6A6xUMQf1Gq5okxGICntUYRLuu2cawGJQmrDxE2LAQkObGCTgguOIHUaBz zdZcDpfyjw5E2qWDtQFf+5vJR8Ki/V0AwDRD9zTFk73DJvFAQq9jdI8PO5xi392wSJ 39JyhG49HBCNk3CItuLaQjzQWnH0yrhGs/BpZ8RIRXfatjY2X4WxF2zRQ6HRoC8two wKWdvP+HKgjTwpH9oLznnzjdimbG1jGR4peEPB/ljPHGzDnEm7/Zeg+UuKUsr8CcSU 6cFGYw5xXH2Zcg0y4bsA3CHQUTF8RNJDreo+ThjfR+4iHczwpUGrIddd9VZ5JPrE+i UmzvCqzhiWeeg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE564CD6E5D; Tue, 2 Jun 2026 23:30:52 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:39 +0200 Subject: [PATCH v6 1/8] media: qcom: camss: csiphy: Introduce PHY configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-1-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2386; i=david@ixit.cz; h=from:subject:message-id; bh=KqK7CczWYX/iIrUS5Nv8VtWWkWE2d7OmmtIR810fNRE=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqIY7n1nYt0dC+7KaI6/rvWxHbk90teL16L FoElXc/9iuJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg cqr6D/0UyrGMxN8RIkODM7OEU3BX1HeqrVc+JAqk+QGldd6wy9xOFU/c/Gz/r7NqtKrnClDOcbI 8kNaOSWQDX0BqcKEBm5XUDbuA2TkNyvxQa14B3JYwHKz4heijzwhdktrwA6Feu3rRnHRtmY4irb bCV51YZmrisDh/Xnjp2JyFVDA7vo+ZLY7WRGaARbmhr0hZde3ITLReVnYa0jWkm5Voc3eNp4NpM jAZXWcSQunJuTeg/Yz7mmJJsvD4RLm2M3VTT7beqHjVtr1XeCXhvBzlPU8bLb6JuiC3Z0wWXT+q /iTTO2TLxmYPGF/U9aPIyu7K6Aq8cEE2KLDTb3JCuCYph8Q1qV6cFSQTnV6+jTYXGnQCUFM3pvE BYFl6XICOTH6un+DQhlKUV/nNL0kZ+8/sHoiVkFECPr+EQYL+Ra6uW2e5BcrPr/LIvoIso0CbVI HwNSYlWC6WKIF1+8l+j3/FH2Yte9+b4GPR8V/lIn1CLyv9eAcCxJHvUwlzLLJGZoF0BAicF02sY z5zP7tk8ayL6FaJay6Y86vlQ4yJB+FC9PlAQ+5ZHBaTU704k8bMB/vV+3dE/9dSYGGmYoHlcUyc vU1LGbaoAtzQ9J4R8OwDPAA6mdzla1BfB9j4thYecShQT+pcAYfUBfTq0r3nzQIlpL9Oa6fVPim t3wxbakRiryAFLw== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Read PHY configuration from the device-tree bus-type and save it into the csiphy structure for later use. For C-PHY, skip clock line configuration, as there is none. Acked-by: Cory Keitz Reviewed-by: Bryan O'Donoghue Signed-off-by: David Heidelberg Reviewed-by: Frank Li --- drivers/media/platform/qcom/camss/camss-csiphy.h | 2 ++ drivers/media/platform/qcom/camss/camss.c | 8 ++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/med= ia/platform/qcom/camss/camss-csiphy.h index 9d9657b82f748..2ebb307be18ba 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.h +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h @@ -25,21 +25,23 @@ =20 struct csiphy_lane { u8 pos; u8 pol; }; =20 /** * struct csiphy_lanes_cfg - CSIPHY lanes configuration + * @phy_cfg: interface selection (C-PHY or D-PHY) * @num_data: number of data lanes * @data: data lanes configuration * @clk: clock lane configuration (only for D-PHY) */ struct csiphy_lanes_cfg { + enum v4l2_mbus_type phy_cfg; int num_data; struct csiphy_lane *data; struct csiphy_lane clk; }; =20 struct csiphy_csi2_cfg { struct csiphy_lanes_cfg lane_cfg; }; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 2123f6388e3d7..072c428e25166 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -4761,19 +4761,23 @@ static int camss_parse_endpoint_node(struct device = *dev, if (vep.bus_type !=3D V4L2_MBUS_CSI2_DPHY) { dev_err(dev, "Unsupported bus type %d\n", vep.bus_type); return -EINVAL; } =20 csd->interface.csiphy_id =3D vep.base.port; =20 mipi_csi2 =3D &vep.bus.mipi_csi2; - lncfg->clk.pos =3D mipi_csi2->clock_lane; - lncfg->clk.pol =3D mipi_csi2->lane_polarities[0]; lncfg->num_data =3D mipi_csi2->num_data_lanes; + lncfg->phy_cfg =3D vep.bus_type; + + if (lncfg->phy_cfg !=3D V4L2_MBUS_CSI2_CPHY) { + lncfg->clk.pos =3D mipi_csi2->clock_lane; + lncfg->clk.pol =3D mipi_csi2->lane_polarities[0]; + } =20 lncfg->data =3D devm_kcalloc(dev, lncfg->num_data, sizeof(*lncfg->data), GFP_KERNEL); if (!lncfg->data) return -ENOMEM; =20 for (i =3D 0; i < lncfg->num_data; i++) { --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4081F2F7478; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=XFSaxX+9wZymNLB74gO9rom8tyyc49ZZzgJEd7+1iGaboQS7DiMpDwZzuhAnmEug2xKONbGQ6Lga25zRDFb/BN1PBzGr24TcT5X1/PoqBg6krFzStMV8yrle5H7+3dwNKbWl4BIwx3gjVF5HJOiHFC6n5R8EUQXxSHzOCepg+uI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=0D8g4AImFTFvs5lsTS1IIcx/jjYEz1vDl3v4NBhoG1Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OcyZd0Bu0tB0vD8eKBpYjLJ40k4E3Nb++v5XXItppIhLkPzp7PEt3eifMZLGPDB5uirs6kNsXUr5kG5EMnoPSh/Tj16A4nEbfXrin5VHh6O8pN7mDCtbEM0Tg+A3s/IFcTMKs5Yz2UxY3znZaEl+iD0HFwJ4mKkl27s4M8BDJNk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Pf4hzHaI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Pf4hzHaI" Received: by smtp.kernel.org (Postfix) with ESMTPS id 017BBC2BCF5; Tue, 2 Jun 2026 23:30:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=0D8g4AImFTFvs5lsTS1IIcx/jjYEz1vDl3v4NBhoG1Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Pf4hzHaIP+IEKI7gTpVQQfQ+qsbhzxxq8y23A3D0Dcy+YdgBPUG3gUAIivAz57mtM 8vMDWK8dHjkUYoGSEphzZCT9pSXhVePYkW8gmWVv/YapcnvTOGnnJnrGJTMGLqk7WJ Rsi4nmhcsSfIeamVqvg7jXS2Dix1Y+ruHfHePIxXYjgo6CTF0fw30rc2/yihoByM2i DSGMdIG/iHFOq44imF+anQyzcYh92K+9BDzgNVbTRsaKby5MaJo++1XIQptmwP+/9J 3m2DFCrFn+ZonVsMj+fFBYkKFWggOFbbMr8IjMY2VHdJtHttgEmaoFydMH6i8sCYkj xAV7uOUAVOy0Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEC40CD6E64; Tue, 2 Jun 2026 23:30:52 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:40 +0200 Subject: [PATCH v6 2/8] media: qcom: camss: csiphy-3ph: Use odd bits for configuring C-PHY lanes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-2-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3582; i=david@ixit.cz; h=from:subject:message-id; bh=2iwXEDgsMZxXz7yxAHZuSfLV4jh0Xg07CX8XjfBaN+4=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqzAg3D+4xv7/TiJT9BmF7mT4LRN59s3VjO lrOMm6H402JAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg ctyzD/4ipYEqsPBUfgonbaz2EJKf5OvTAeYOqpgq8whhJs98wHaX9GIzCE9hvdI5oZodg+mx0gd pNlbHXKgra3z2sNPKraoDNE9e5iY+eqpX+QwtU6JS7K7E2e5m2CWs9MEowMEmDrZbbnaTGIKQti FqXOPYyS6JMzXEnA8g7bVPo4SQCUVEhMfrsuWV6cxh1u2FQS2b8l96J9/6NLTEb1kLnJA1MY5f2 wqcDAbn6OTu7mywLaOtin0k9c0qTL/pZ8wdvN7LDvsgmEMsIBX1zxGLnT/f8XviTpQmPMS253HB KXllsI/oy5bJ+jWVBYSuoYzaPJTPU6dPxTnbVsPjesbX7wwz8k1MlbbK5N1LXCb0w0+ccW5W5i4 OBrTEZTiaZIu6JGtqYmJzeVqMVN6nplADe70/dWtM+fGKXhJXfDiqit7a7QgNUFRxLL8kB1Pqxn FDDxhJOXCd835HxSQSFoqMiZHdWz7XEDyTwEW1MQ6dRDNfsY3kZTSlXh24FUQ9cZ+SumSKIdH16 PUeQX6LqsLiIz23cov0uRo6GjAe/Bjpfy263Z3mDrqObisHZsOZEeMGvvWXui/y72tIO9Bc1zmL 4jGtoyl+GiUCT1caSg+mFd1iNeadH7c8EEFurqat3keEUfAMIb3FmOy/N3PnHY5KgfH70Vg32cN O23vZV9IVznw0cQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg So far, only D-PHY mode was supported, which uses even bits when enabling or masking lanes. For C-PHY configuration, the hardware instead requires using the odd bits. Since there can be unrecognized configuration allow returning failure. Reviewed-by: Bryan O'Donoghue Acked-by: Cory Keitz Reviewed-by: Bryan O'Donoghue Signed-off-by: David Heidelberg --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 39 +++++++++++++++++-= ---- 1 file changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index dac8d2ecf7995..15876eb973718 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -9,16 +9,17 @@ */ =20 #include "camss.h" #include "camss-csiphy.h" =20 #include #include #include +#include =20 #define CSIPHY_3PH_LNn_CFG1(n) (0x000 + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG (BIT(7) | BIT(6)) #define CSIPHY_3PH_LNn_CFG2(n) (0x004 + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG2_LP_REC_EN_INT BIT(3) #define CSIPHY_3PH_LNn_CFG3(n) (0x008 + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG4(n) (0x00c + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS 0xa4 @@ -1108,23 +1109,32 @@ static void csiphy_gen2_config_lanes(struct csiphy_= device *csiphy, writel_relaxed(val, csiphy->base + r->reg_addr); if (r->delay_us) udelay(r->delay_us); } } =20 static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg) { - u8 lane_mask; - int i; + u8 lane_mask =3D 0; =20 - lane_mask =3D CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; + switch (lane_cfg->phy_cfg) { + case V4L2_MBUS_CSI2_CPHY: + for (int i =3D 0; i < lane_cfg->num_data; i++) + lane_mask |=3D BIT(lane_cfg->data[i].pos + 1); + break; + case V4L2_MBUS_CSI2_DPHY: + lane_mask =3D CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; =20 - for (i =3D 0; i < lane_cfg->num_data; i++) - lane_mask |=3D 1 << lane_cfg->data[i].pos; + for (int i =3D 0; i < lane_cfg->num_data; i++) + lane_mask |=3D BIT(lane_cfg->data[i].pos); + break; + default: + break; + } =20 return lane_mask; } =20 static bool csiphy_is_gen2(u32 version) { bool ret =3D false; =20 @@ -1155,19 +1165,32 @@ static void csiphy_lanes_enable(struct csiphy_devic= e *csiphy, struct csiphy_lanes_cfg *c =3D &cfg->csi2->lane_cfg; struct csiphy_device_regs *regs =3D csiphy->regs; u8 settle_cnt; u8 val; int i; =20 settle_cnt =3D csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); =20 - val =3D CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; - for (i =3D 0; i < c->num_data; i++) - val |=3D BIT(c->data[i].pos * 2); + val =3D 0; + + switch (c->phy_cfg) { + case V4L2_MBUS_CSI2_CPHY: + for (i =3D 0; i < c->num_data; i++) + val |=3D BIT((c->data[i].pos * 2) + 1); + break; + case V4L2_MBUS_CSI2_DPHY: + val =3D CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; + + for (i =3D 0; i < c->num_data; i++) + val |=3D BIT(c->data[i].pos * 2); + break; + default: + WARN_ONCE(1, "Unsupported bus type %d!\n", c->phy_cfg); + } =20 writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 5)); =20 val =3D CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B; writel_relaxed(val, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(regs->offset, 6)); =20 --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 406DE280CE5; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=kbmgc+g3DL2BKD8cnvMPqxywhgBNHKEwLcbtC5psnK5/vO6yFoqkXdjNRmzGXQKyH0XMQtOSBVtd3hbNQjsJcef0fTbsSZUIhr+zCbwJJTCQlByGc5h4D+O+XxeRoVR5atavuKp1QTcliha5Nj3gK77RBAPvX5WGbg4j0ooDPbE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=CjfCagTQLI8bBi6i3IWnIyNxNKAECGht+E/xZ9ED7So=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dkyPbjxCan7nH+6w8yn8YORMR349JEL9bnhoxs4qRkXpMi540PGvKWC5nqvqzX4GMms/D1C+yycNgGo8ZbuxuNKrbZU1A+36MeUOkaGPG9HkX9MTVUdQ1H1zkHgY5PEFwZFhPOgjeYJ7bcq3xDJKh/sQPZFtwcUXi9eOZsmxbcs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GASBQfPr; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GASBQfPr" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0D05FC2BCF6; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=CjfCagTQLI8bBi6i3IWnIyNxNKAECGht+E/xZ9ED7So=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GASBQfPrkQRwc51MZGFbUzqZk6jA1NmWR1zCBEUyCEvLgOMi0qa3T1u0p0H6PVqeq PrQFPALYSb1xTSjyikhN6vi9S+twn8bdWkbfEOch6QdSbfaSQALXf6PdfLF2qpU4vn 5DLvUGQVKwPBGe6NcB334iMXbuBd73JblfaUrwG8WMTX7wb0ivmJbyTZmK8J2epSqS Bm8E1C1QJh+yCbbXFUpajqx4ib11Tu/0ZmxS2QDsYXeH37DmmmS/ujBXEJOHyMuzey mK/zVRnEc/U6l+i/9Uov/C6FWeOG6k+JeXxc+5owHzINvz6WLvzwESAhnv9J32GErL KswkRQ3P3ZnSA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED9DFCD6E6A; Tue, 2 Jun 2026 23:30:52 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:41 +0200 Subject: [PATCH v6 3/8] media: qcom: camss: Prepare CSID for C-PHY support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-3-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3063; i=david@ixit.cz; h=from:subject:message-id; bh=S/NCEpJ9Qg9rdkYHEby0/Ggz1JWYH66XExTkL5xCQFM=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqmiThGqOenOAQV/pT5wh7aaQ+uc23W6WCc W45LO893pqJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg cusYD/95uE6PTfjvRU0xvq+WTCLJjA3pdhBhpXuNoZB5+KoawdkbIRN9lOyDY3Ks+dW+z6Tqom8 kIKKPySLiBR9dOXzeMLP4soTk0J0eKUZa0dSXc0XCkVOWgKEPD70GvE3X9aE+Lp13UzVu07+KHJ gYRdy0oYb98OaBaJEDLIuu67eNNjGaRUrv/g12dTbbJgxj9g88nW0omvb/kw1aCNKvDqxNzj1Kf BqQrQm5Qi3b9Blal/huvec1tkx/9chP3oNSIB2PKWC/xy8LuExpE1JllMlclSQQOOSfwDVrInXw KfoS4oEcHAjDzTdd53UouVhurniU1q6ocqHfqQ4RppgVGWzkZyFz+X57yq9G5sh712y45gsLS5X 7Vbku/+G7QiL98WQOudmk1NYQjPhFdRQHUptC0IY8K9z3UX3I4WpYK2PEV3ctyypG8AoZ07TlyT cFAxvOBeaTPKPCDeuw5ZDRKrWYFVM/Y5hH0Unpm+9lNtvXUbjmOLI67AvFkShve7zKLrTVD/fIY ofIQBZsA68sCtjRiZIT4/TU2bCy0YWTBh0b5e7CO/Mpwl1PwI1y22MrRLUT7madBlg11elX5yyK /fzZ6eEsSw3lRQTCQ8vRwUa4shzVihIjdLcVlc60xNWd36zo+90lzlgF05D5uYg3dC8prU2JXiF r19/OgJHHk/Od6w== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Inherit C-PHY information from CSIPHY, so we can configure CSID properly. CSI2_RX_CFG0_PHY_TYPE_SEL must be set to 1, when C-PHY mode is used. Reviewed-by: Bryan O'Donoghue Acked-by: Cory Keitz Signed-off-by: David Heidelberg --- drivers/media/platform/qcom/camss/camss-csid-gen2.c | 1 + drivers/media/platform/qcom/camss/camss-csid.c | 1 + drivers/media/platform/qcom/camss/camss-csid.h | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.c b/drivers/= media/platform/qcom/camss/camss-csid-gen2.c index eadcb2f7e3aaa..52ef730b10553 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-gen2.c +++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.c @@ -178,16 +178,17 @@ static void __csid_configure_rx(struct csid_device *c= sid, int val; =20 if (!lane_cnt) lane_cnt =3D 4; =20 val =3D (lane_cnt - 1) << CSI2_RX_CFG0_NUM_ACTIVE_LANES; val |=3D phy->lane_assign << CSI2_RX_CFG0_DL0_INPUT_SEL; val |=3D phy->csiphy_id << CSI2_RX_CFG0_PHY_NUM_SEL; + val |=3D csid->phy.cphy << CSI2_RX_CFG0_PHY_TYPE_SEL; writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG0); =20 val =3D 1 << CSI2_RX_CFG1_PACKET_ECC_CORRECTION_EN; if (vc > 3) val |=3D 1 << CSI2_RX_CFG1_VC_MODE; val |=3D 1 << CSI2_RX_CFG1_MISR_EN; writel_relaxed(val, csid->base + CSID_CSI2_RX_CFG1); } diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media= /platform/qcom/camss/camss-csid.c index 48459b46a981b..8d5c872f84ed5 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -1286,16 +1286,17 @@ static int csid_link_setup(struct media_entity *ent= ity, /* do no allow a link from CSIPHY to CSID */ if (!csiphy->cfg.csi2) return -EPERM; =20 csid->phy.csiphy_id =3D csiphy->id; =20 lane_cfg =3D &csiphy->cfg.csi2->lane_cfg; csid->phy.lane_cnt =3D lane_cfg->num_data; + csid->phy.cphy =3D (lane_cfg->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY); csid->phy.lane_assign =3D csid_get_lane_assign(lane_cfg, lane_cfg->num_= data); csid->tpg_linked =3D false; } } /* Decide which virtual channels to enable based on which source pads are= enabled */ if (local->flags & MEDIA_PAD_FL_SOURCE) { struct v4l2_subdev *sd =3D media_entity_to_v4l2_subdev(entity); struct csid_device *csid =3D v4l2_get_subdevdata(sd); diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media= /platform/qcom/camss/camss-csid.h index 5296b10f6bac8..00e2669db64c9 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h @@ -65,16 +65,17 @@ struct csid_testgen_config { }; =20 struct csid_phy_config { u8 csiphy_id; u8 lane_cnt; u32 lane_assign; u32 en_vc; u8 need_vc_update; + bool cphy; }; =20 struct csid_device; =20 struct csid_hw_ops { /* * configure_stream - Configures and starts CSID input stream * @csid: CSID device --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4066B1A3172; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=XP1UqXdF6ZzPDjFKRswG2DS75gawxwgNyGWpNfrC+mQJ0L3UpIM51gLrgl0Gw2MKMIChD9yruEhqItswPOBQubrt4YUd1NeTvReJzeVQe3W8rLfdwG6aY8Zz1SpkFpQneaWZBAObxXc8rsVASLaN4VEM5qADpy7tsRkRUw6fcxA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=nJddC/Z7OwZ/rap+GYxNeDDYb1mE12SYEhchPrea2PM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=T8RMGsBd6dSOojwSDF5wHzMpLT9gRIC3a/AmNhK9rBRfAkyKkeZ8fFkUrGcc5k3DRvQE1UPckxARJqN6p/78AoJ5UhclrjpRPDCVxWC8qh/XcqiYUH/aef6Sp7e0+oSf2xGOzPT3AqrlKuLrLwm/nfq9P5LhmTkZfXREjaAz4CY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NEtYC2mZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NEtYC2mZ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 118CDC4AF0E; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=nJddC/Z7OwZ/rap+GYxNeDDYb1mE12SYEhchPrea2PM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NEtYC2mZNDo6ofIWMfTFOCEoN/W/2OTIHPerOsmgKNUvNrvSDbcHD2acwF6RBQSuy ysmvIoGiKsjnCnbjdFAX0wgRfqQAxCxBDhDZapWYflQBkLWqiIBdDdvpNedal4ZmO/ tj3rwDTTx9cgfhyjBE+UV8St/aLpBsJuUe+RE21/UMgB5eKUNQxs8REJO6dnuadbQX dDNQMan2PrnBLW1y8yefCScxhEuzZKwfQAgHqO60+j9Cn6I3XQWr+zp+8pYZH4pIou vHOPUVoP3JMavomKL7gk2fW6i6GXlh6BqXWCtrTa5sOCzrb8w2gxiStUEDUt14aNPk 98Byodyhs8i1A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09611CD6E6B; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:42 +0200 Subject: [PATCH v6 4/8] media: qcom: camss: Initialize lanes after lane configuration is available Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-4-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6018; i=david@ixit.cz; h=from:subject:message-id; bh=24+txQXjEyB9lC+2OldI9aNjjI7Fi2LvMIIxQ/zF9IE=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqV6s+ZIBkjJMtGsSxiXMyVQzmZymYkan53 CRj2Fqfs3eJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg cqQMD/9tWrRrtxvqY5hT09PzCfQoBLlREfROuh5xiJ1Pwecu2GsgJw6X7YPQ5fwX23s8FozgxiS qy/XWqvJskGj2DBNWcmaEHkM8gz957wwMYOAB2Bt1plGWzpPpT5k5wuutsay3IqVjrRF4dsrIQu X885kgPlbIaIjcgeOgrX+Oqg6CrB99ig5mzEW36rwZOFJSOI9PydDkNoky6WIIVKekshhCVAM4f loiXeKyOub80/KVyl49X02nCl0qMWZ8thWA5dpIT4mg8ho++EWltNDa6v8Pz5D34Cn/rO8uGQ4M vjuanjjNeCuJpBHVD0DAMqebJ0AM6GHn3K66gFQ05WACyog8KRRfSiGP7c2qnK7wgBlSawGgkDO OrhqJ+UIQVPcclfCqlOQ22cq4toY+YSvCvqtUEwI5yeOexXfCBuNIo/TNdyFkUc8jqjYBtp9h0v m5REvffY7EoIpRFcW7I+itnQshaDS/OH9M01BJ12InEmhAYsQbWXkK9j6hga55wOMXpFteBaTS2 N6a26YSLJBX/gFZ71FywwtUmD9L0jOSDcYRQ+GA1FV0BF1ye+FlUxBtkU1ria57kliN0I51hx8n skL4WcdBtZsoGiSvsgVRJm3Y2+qCIVX1W/bGMkdTDUp953t/9j1m9+x/y9qosbVijVWGLMss5Dn GrWnn1rBtQsOjfQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg The lanes must not be initialized before the driver has access to the lane configuration, as it depends on whether D-PHY or C-PHY mode is in use. Move the lane initialization to csiphy_lanes_enable which is called when the configuration structures are available. Co-developed-by: Petr Hodina Signed-off-by: Petr Hodina Reviewed-by: Bryan O'Donoghue Acked-by: Cory Keitz Signed-off-by: David Heidelberg Reviewed-by: Frank Li --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 131 +++++++++++++++--= ---- 1 file changed, 93 insertions(+), 38 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 15876eb973718..938c365eb352f 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -1163,16 +1163,108 @@ static void csiphy_lanes_enable(struct csiphy_devi= ce *csiphy, s64 link_freq, u8 lane_mask) { struct csiphy_lanes_cfg *c =3D &cfg->csi2->lane_cfg; struct csiphy_device_regs *regs =3D csiphy->regs; u8 settle_cnt; u8 val; int i; =20 + switch (csiphy->camss->res->version) { + case CAMSS_845: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sdm845[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sdm845); + } + break; + case CAMSS_2290: + case CAMSS_6150: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_qcm2290[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_qcm2290); + } + break; + case CAMSS_6350: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sm6350[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm6350); + } + break; + case CAMSS_7280: + case CAMSS_8250: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sm8250[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8250); + } + break; + case CAMSS_8280XP: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sc8280xp[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sc8280xp); + } + break; + case CAMSS_X1E80100: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_x1e80100[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_x1e80100); + } + break; + case CAMSS_8550: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sm8550[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8550); + } + break; + case CAMSS_8650: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sm8650[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8650); + } + break; + case CAMSS_8300: + case CAMSS_8775P: + if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { + regs->lane_regs =3D NULL; + regs->lane_array_size =3D 0; + } else { + regs->lane_regs =3D &lane_regs_sa8775p[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sa8775p); + } + break; + default: + break; + } + + if (!regs->lane_regs && c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) + WARN_ONCE(1, "Missing lane_regs definition for C-PHY!\n"); + settle_cnt =3D csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); =20 val =3D 0; =20 switch (c->phy_cfg) { case V4L2_MBUS_CSI2_CPHY: for (i =3D 0; i < c->num_data; i++) val |=3D BIT((c->data[i].pos * 2) + 1); @@ -1231,63 +1323,26 @@ static int csiphy_init(struct csiphy_device *csiphy) struct device *dev =3D csiphy->camss->dev; struct csiphy_device_regs *regs; =20 regs =3D devm_kmalloc(dev, sizeof(*regs), GFP_KERNEL); if (!regs) return -ENOMEM; =20 csiphy->regs =3D regs; - regs->offset =3D 0x800; regs->common_status_offset =3D 0xb0; =20 switch (csiphy->camss->res->version) { - case CAMSS_845: - regs->lane_regs =3D &lane_regs_sdm845[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sdm845); - break; - case CAMSS_2290: - case CAMSS_6150: - regs->lane_regs =3D &lane_regs_qcm2290[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_qcm2290); - break; - case CAMSS_6350: - regs->lane_regs =3D &lane_regs_sm6350[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm6350); - break; - case CAMSS_7280: - case CAMSS_8250: - regs->lane_regs =3D &lane_regs_sm8250[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8250); - break; - case CAMSS_8280XP: - regs->lane_regs =3D &lane_regs_sc8280xp[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sc8280xp); - break; case CAMSS_X1E80100: - regs->lane_regs =3D &lane_regs_x1e80100[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_x1e80100); - regs->offset =3D 0x1000; - break; case CAMSS_8550: - regs->lane_regs =3D &lane_regs_sm8550[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8550); - regs->offset =3D 0x1000; - break; case CAMSS_8650: - regs->lane_regs =3D &lane_regs_sm8650[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sm8650); regs->offset =3D 0x1000; break; - case CAMSS_8300: - case CAMSS_8775P: - regs->lane_regs =3D &lane_regs_sa8775p[0]; - regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sa8775p); - break; default: + regs->offset =3D 0x800; break; } =20 return 0; } =20 const struct csiphy_hw_ops csiphy_ops_3ph_1_0 =3D { .get_lane_mask =3D csiphy_get_lane_mask, --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BBA737DE96; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=o/NuFW794PFeZGHifQSVAdtSptrPnOHXY7PgqH1MJYjY4NCqvfPXAllcnImJ6rvw8pBDcC8WEkn1qO7owTSrfPhK/xoJ+fZ7DdpEaSXkTk3vske0skXYRVoS0dYOclcwgYaiyOXoSoL9WVC+7yEM7vJaALbHsmNvqYGyyl+F0sE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=voBQEvGMSCcFq+nsAH8piuLw0PyINkRvi2NkG7Ubc/U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u+ZSu8s7BHNr3h9UjCdCVXl8qAu81X5KKweWa75NeOLx0Bk2tOtcV0DBDZolxDPRtCHDKJe783f6ARqPOmdxB9LCN5LuTFl26XhwyPX9C7UlbyqrO8IEXh/z/TJSYW4dOLSd5TaIXTsxCD9UnOUtleZlcrdDTnN0DCMfbkM2IcE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=npZKNSiV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="npZKNSiV" Received: by smtp.kernel.org (Postfix) with ESMTPS id 21D6BC4AF0F; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=voBQEvGMSCcFq+nsAH8piuLw0PyINkRvi2NkG7Ubc/U=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=npZKNSiVNfw6eCYISjiRcVNbXaaXPTNt/wBH3MeEsqRaz/OjONQ2jsiEpouIW1rBo Zz16lPk2Jz6B6SSq9orMM8mhS8RFt5mo9MMksLHST+wIYMcTlI99eBaAZQ5IKXDdJ9 SnidGT9Vq+tHtX0orhpKPq2Xd8f88B+o/WeOX/rx9+gb7sYjHRcRkoKgy9VNuTiYDL 1FvlPHn7HpnmvQIsU2jNFOkjI+bqndYFE8NexcHxPSPze5LEV7mefH983Z+sdfu6pT iZLYmTr/ri60XfuJ6mecXUsZE4NPXnujk9wourw8c8ctsA/ccOWS3mBJvBz3HVpM4s A0fLpHt00kSMw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18E3FCD6E69; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:43 +0200 Subject: [PATCH v6 5/8] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 MIPI CSI-2 C-PHY init Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-5-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=8190; i=david@ixit.cz; h=from:subject:message-id; bh=daqmaNCEFUy7ixI5pSnmTPQ0SLKH+Du3zxRuqo8O5aw=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqQasVHGRaBlMUMItVrZ7Na4QaT7LOf3Rim D/4xErr70iJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg cjngEACYSdzTsYhJN1vOKB1nyuqx89mqXWIz+DOos8pMhBPGSkz0oa0/UFRtZaNfCS7FPruhszW /zvtsoC15PvKMrJfEDaz3oqssF1sjrfbqut98IugY4gqDZICT2bviKXHS5iyIRTc2Zl1+HTx4ZX wy66aDa3+b8oCheWtVBDOBBaclhkptTk9p2inznBD5nJ2ASLS1VywWl+ohPkZNzlGc0tu0FYIbv Sy1aqUToN4J6pl3ys/DjNWxaJsqw05G64e5mOrZXUkhC0x5S/E1eoQHlV7Jp1dgF1KV9ZKBcAAc a0ZEhTSW69zpoTwOJsJr6Plk+AR0/CPb9Cf5eUlfMkdwv1Gmj7frk4HBdVCFhYxixct62mg7MU7 HmZ901BQsjdUw10wm+inRGuFcMDdL9K6TQz9tSwqsua0RaUjdPn0AgZ51FC7iqKrF6bij+PoVHV aLYipIKHUctdLhrhQzlzhsgLrZSmFho9ia743aaj+l9sz22fcArEJpo1blubzwv1x/endahTjJb z1cQiNjyqMSqiFcMBRmUAl1iHQbVEv/Yl01tDUwYGJLjoq2eusHqVWdXZufmJxZBQc8S8lM+3a9 Y+0GcpwWhZZ8OgorptlB118RcYsvlb7jC9oOLJEF6Ar9Fln84ssgixPBzZO672sRJVMMe1M/Egp 9ZoxdAiDiStxlPg== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Add a PHY configuration sequence for the sdm845 which uses a Qualcomm Gen 2 version 1.1 CSI-2 PHY. The PHY can be configured as two phase or three phase in C-PHY or D-PHY mode. This configuration supports three-phase C-PHY mode. Signed-off-by: David Heidelberg --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 78 ++++++++++++++++++= +++- 1 file changed, 76 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 938c365eb352f..13d7372bd225d 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -45,16 +45,23 @@ =20 #define CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(offset, n) ((offset) + 0x4 * (n)) #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE BIT(7) #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_COMMON_PWRDN_B BIT(0) #define CSIPHY_3PH_CMN_CSI_COMMON_CTRL6_SHOW_REV_ID BIT(1) #define CSIPHY_3PH_CMN_CSI_COMMON_STATUSn(offset, common_status_offset, n)= \ ((offset) + (common_status_offset) + 0x4 * (n)) =20 +#define CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(n) \ + (0x0100 + ((n) * 0x4)) +#define CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(n) \ + (0x0300 + ((n) * 0x4)) +#define CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(n) \ + (0x0500 + ((n) * 0x4)) + #define CSIPHY_DEFAULT_PARAMS 0 #define CSIPHY_LANE_ENABLE 1 #define CSIPHY_SETTLE_CNT_LOWER_BYTE 2 #define CSIPHY_SETTLE_CNT_HIGHER_BYTE 3 #define CSIPHY_DNP_PARAMS 4 #define CSIPHY_2PH_REGS 5 #define CSIPHY_3PH_REGS 6 #define CSIPHY_SKEW_CAL 7 @@ -141,16 +148,17 @@ csiphy_lane_regs lane_regs_sa8775p[] =3D { {0x0460, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0xFD, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, }; =20 /* GEN2 1.0 2PH */ +/* 5 entries: clock + 4 lanes */ static const struct csiphy_lane_regs lane_regs_sdm845[] =3D { {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS}, @@ -215,16 +223,82 @@ csiphy_lane_regs lane_regs_sdm845[] =3D { {0x0608, 0x00, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS}, {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, }; =20 +/* GEN2 1.0 3PH */ +/* 3 entries: 3 lanes (C-PHY) */ +static const struct +csiphy_lane_regs lane_regs_sdm845_3ph[] =3D { + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(9), 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(9), 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(9), 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, + +}; + /* GEN2 1.1 2PH */ static const struct csiphy_lane_regs lane_regs_sc8280xp[] =3D { {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, @@ -1166,18 +1240,18 @@ static void csiphy_lanes_enable(struct csiphy_devic= e *csiphy, struct csiphy_device_regs *regs =3D csiphy->regs; u8 settle_cnt; u8 val; int i; =20 switch (csiphy->camss->res->version) { case CAMSS_845: if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { - regs->lane_regs =3D NULL; - regs->lane_array_size =3D 0; + regs->lane_regs =3D &lane_regs_sdm845_3ph[0]; + regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sdm845_3ph); } else { regs->lane_regs =3D &lane_regs_sdm845[0]; regs->lane_array_size =3D ARRAY_SIZE(lane_regs_sdm845); } break; case CAMSS_2290: case CAMSS_6150: if (c->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY) { --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BD6B3803E5; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=IeNBho5HNGJR6IqnzXHOMRKWc08hY29wIG0GSqwGVQlWWFvdJCpJ+9XyvYYn19o86SU3sSZwzxGOP+CwxvCWjOcGzNxgGjrzyiDtUL3KcW9/GafZgMl71An1juaj/8wHvfl5GwBizo1NfhgA5Z9fQ58woUspsPzuYqzpL8QTZj8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=HTNtOvb3rkzBVVhUrnJp4mfZAtoPLyHxQWxt6btkzSk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E3Fb7A1RMtjmEzZVTNpWX5U2xR8Q9MXLr+kRY9Mi8hKuyFbycxfgIAekDIrQUL913RPOTe9eFmwkM82+Qzez0pCiOJTKJd9QKMDhySympgL07lJSK02hNddjxUI/Mow5iL9G3lXa/6bEN/bcdVMSNr6PryHcyDGDhL5NfYYoroo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Je9HHssQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Je9HHssQ" Received: by smtp.kernel.org (Postfix) with ESMTPS id 3176CC2BCFD; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=HTNtOvb3rkzBVVhUrnJp4mfZAtoPLyHxQWxt6btkzSk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Je9HHssQTbdR1dYC8WS73EuhdrhEku2VAYO1ylgW79nlQJC+oykqt5dcTY/UOeyas 8PPBPvyAWzdPw75myuRW4qOt8n4sKnTSKmVDCN/xVR4KQZpOtGIwaTlLqGIkoU+0vR pSuYcqH4lI+lNpLGfWnXgKgfk4CFwsI/eTEKhHTXza2uwj6eQ7H4phWxD6I0osszKz rr8gkD1k7M2Z+8o1uzRqyEX6w1Ezy3BRcpIK87Qme6+VBITWOfYXO8MQ1Q5oKDFOS0 L7BHuDoxGt0RAgVD14ta20aAcp9nwLc5VW4wCKuKKaERcSHcO8zqxembyrO1K0I3V4 8qagqnzdqSflQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28674CD6E57; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:44 +0200 Subject: [PATCH v6 6/8] media: qcom: camss: csiphy-3ph: Update Gen2 v1.1 MIPI CSI-2 C-PHY init Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-6-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6215; i=david@ixit.cz; h=from:subject:message-id; bh=lAagj4EHBXPn6edHZgo820FSpzF/DZVst5jKpYa1zSY=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2eqMWOgB9tfLDZM8/Lc5QRdB3RRFRoq8NUxQ aWOMLLL1naJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqgAKCRBgAj/E00kg chUyD/9ByPN+f/sF99KXXXNRH5QbogI3/pBxhB6fCFab8OeWuaY+L/zI3p6Z3LK/rUcuepNLrae aTx2xCw8wpioKurhV30jiGE5s+7QU1HNvXylURnnGF5lfFOkLX/Hti53Zta6iLy2b+zXopfALS3 0Ac/s1LhiwIjVIq1uIfHqbX5F7r2GWotJgUWLyD9Yu4qI8JWA4Sw/M43ofte679jDHEpwcmYGa1 OkcZ4jHdCmPBCd5OfQAQon80vopQCUw/xFs8s2LjLz4htWxXZOstSRw0ARl6deognCqzjADMUHG KIYqJZKxpiFww7GbwL687dyvdQB50iSrYHjEqEubd/hCIGZb/nhd9ZYjadwKTGX/WApRXfekcDv dSKN7aMRlyBKPn7bOGv7x8BfQFZZILgphYVGeRLsxQqDutChdeCzR9TyLzsoP20ivhtqsizy+2d KUcvfHjp77JDzfoRENPE4CNhbdUpIYo9IOMytopOx+bqwgIRWREzZ+ICBvv25W5NtYwc7PykZUi g6tW6qHMGRjXZPRBkFiGZ/BVRS4c6d8g3qVlXEWpoz5J/vOomge3v9kTgy8R/KTS6FTIrVaWEwk tPb3DF0Yg8PQ8IPA7mRoczGjGT99YG9WP39k4bfhixC+TTSNtBEIGtTSFnoZNzprEv7HaHmhOg2 XxCiJx7ymaEkE8g== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg These values should improve C-PHY behaviour. Should match most recent Qualcomm code. Acked-by: Cory Keitz Suggested-by: Konrad Dybcio Signed-off-by: David Heidelberg --- .../media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 19 +++++++++------= ---- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/dri= vers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index 13d7372bd225d..0e33faa648f8e 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -227,19 +227,19 @@ csiphy_lane_regs lane_regs_sdm845[] =3D { {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, }; =20 /* GEN2 1.0 3PH */ /* 3 entries: 3 lanes (C-PHY) */ static const struct csiphy_lane_regs lane_regs_sdm845_3ph[] =3D { - {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(23), 0x63, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(26), 0xac, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(27), 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, @@ -247,19 +247,19 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] =3D { {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN1_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, =20 - {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(23), 0x63, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(26), 0xac, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(27), 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, @@ -267,36 +267,35 @@ csiphy_lane_regs lane_regs_sdm845_3ph[] =3D { {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN3_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, =20 - {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(23), 0x43, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(26), 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS}, - {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(27), 0x25, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(23), 0x63, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(26), 0xac, 0x00, CSIPHY_DEFAULT_PARAMS}, + {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(27), 0xa5, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(1), 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(3), 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_B= YTE}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(2), 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_= BYTE}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(5), 0x20, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(20), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(6), 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(7), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(8), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(9), 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(10), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(11), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(17), 0x12, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(24), 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(51), 0x41, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(25), 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {CSIPHY_LN5_CSI_3PH_CTRLn_ADDR(55), 0x51, 0x00, CSIPHY_DEFAULT_PARAMS}, - }; =20 /* GEN2 1.1 2PH */ static const struct csiphy_lane_regs lane_regs_sc8280xp[] =3D { {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS}, --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 692D937C0F6; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=U5UHNS/WFirgRaKuKTaTPxAV4IHSJRCo3acfJjSSH7O9tzBYP0qHgwzQAAQrQWnnq1fPCegrNLlizu8vjnYd5FrKOyVtbAIvrWU4z3X5z95cY0fYpINKTuh/kB2lvSSNaed2SrYOx9zigzSOwkQjqzKes32MdKoqyY4rnR6N19Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=x34V6028WCIrBja/M0diJW68/ZAgOsQSDlSG4qUjtmw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WResBR/yfxO5SXuGuEtHbibMEvXeHOFXts6PRuzuc5sMC2NyjTSRtTQpV2vSK176vI4zzqf+aQ/kaYYjZaJxt4a11AI47cSz4j/WRmkuXEi0WFZ2FnrtSVo3EtOYIuKoUh5pjifV60DeJNPIcG1+TcxrwUHk7UYnkT5KGN+xzQs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tC13Z4Mk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tC13Z4Mk" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4210DC2BCC7; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=x34V6028WCIrBja/M0diJW68/ZAgOsQSDlSG4qUjtmw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=tC13Z4MkEH5XrVcbz6C6PUu3yL+ZHZWxDwBcDmGSYuVzztVbiAANcKYanEHQyFYN7 YvbJwKj7mgKJAPml0hqa13CbPoMTH5r5BH6+sr7yKbnqj8ED5JG1N+r2HHc59/xYd0 cs0oFnY2iG0Avy4XFCxIkqA8x965L7UktjVgZpCJ5ycuFMIFPEq4Y5G/b+5ugVSaI+ nydkZiEFJVIfyib0vR+lqk4pI330XrLhu5Px23hv+E2G3kD9m2w2cVJkeCo1kw5vG7 OwOF7UF4uDsj25Ew2v60BwYRe1nQjswxHCmgJtDbhPFqAW1dxcfeBKAbv4p2/Jcsb+ fJQFXH2uSubJg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3874ECD6E5D; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:45 +0200 Subject: [PATCH v6 7/8] media: qcom: camss: Account for C-PHY when calculating link frequency Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-7-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=7531; i=david@ixit.cz; h=from:subject:message-id; bh=XWpP665UVAOVGgSeSabqqYJqOyEqb1Fz4nUNtU0nD7I=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2erL5thC+tbl+E9HmemVZnKxn3gAHiR5sXiG svWbw92ETGJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqwAKCRBgAj/E00kg ckqJEADLvrhlANOvvzj2y2zXpckctdRhYBSBPR+ZICIDGYnZM9TnqRdj4fhptvoiDu5R9botspM /U0WEiFChJFPklZOFjA3IKvFdt1Cq/iZ4paHV6j6ixE5DNhdRM8to6lnhNWXPh81bu/OfCC1Vg3 NiKRn+VdyikTZPKZOJjXl5TMDzvBLFBDKcyRW9mLNkBzRWGBYgIsPKu+zzLTBWsNgOpwabuNiz1 CunpsecNUaa5Y6TmWLuO1vxLIlJ2Ug9O2PwLOLy68wgwmpELskLs0jMG/pkkqhCAuURTKYdt0Lu hYciovfX3yKUhAaZz1+6Rt6AXyUAVGtruL3D9MscWc1r/qU8JKf1AYBdizwmzsjsbEHTdTNnWB2 dznIBJRQZbMzURhUPercWdYJQ3rfO6Q+H7/XHXFZPahOufuYmHNHNrC/oR9tOdyqwU2ZSliKNtF 5nhmmBrryhTNgJmf0GwFz4t9kIJiRsm/uxzEPCbytD3hsG1ygl9cW7Z0CQFq/tBKpNRtB96L/ag hAAVB4YG2mN2khh3oDRlAoxrQRkywS3PjTEEJmVn2XpobKYZD+RgNC1SzHTyxs8anO8bllGsfBe f8MZ1bCMetmOqI6BiICOAvmVu2ZbvXPN6U/yg8n2J8Sb5OIm/5zhC0y4g6ofHzMlknCz9RgTNmU Gs24wnv0dAG1CCQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Ensure that the link frequency divider correctly accounts for C-PHY operation. The divider differs between D-PHY and C-PHY, as described in the MIPI CSI-2 specification. For more details, see: https://docs.kernel.org/driver-api/media/tx-rx.html#pixel-rate Suggested-by: Sakari Ailus Acked-by: Cory Keitz Tested-by: Cory Keitz Reviewed-by: Bryan O'Donoghue Link: https://docs.kernel.org/driver-api/media/tx-rx.html#pixel-rate Signed-off-by: David Heidelberg --- drivers/media/platform/qcom/camss/camss-csid.c | 7 +++++-- drivers/media/platform/qcom/camss/camss-csiphy.c | 6 ++---- drivers/media/platform/qcom/camss/camss.c | 18 +++++++++++++++--- drivers/media/platform/qcom/camss/camss.h | 2 +- 4 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media= /platform/qcom/camss/camss-csid.c index 8d5c872f84ed5..594f280a455ed 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -534,25 +534,28 @@ const struct csid_format_info *csid_get_fmt_entry(con= st struct csid_format_info =20 /* * csid_set_clock_rates - Calculate and set clock rates on CSID module * @csiphy: CSID device */ static int csid_set_clock_rates(struct csid_device *csid) { struct device *dev =3D csid->camss->dev; + struct csiphy_device *csiphy =3D &csid->camss->csiphy[csid->phy.csiphy_id= ]; + struct csiphy_lanes_cfg *lane_cfg =3D &csiphy->cfg.csi2->lane_cfg; const struct csid_format_info *fmt; + s64 link_freq; int i, j; int ret; =20 fmt =3D csid_get_fmt_entry(csid->res->formats->formats, csid->res->format= s->nformats, csid->fmt[MSM_CSIPHY_PAD_SINK].code); - link_freq =3D camss_get_link_freq(&csid->subdev.entity, fmt->bpp, - csid->phy.lane_cnt); + + link_freq =3D camss_get_link_freq(&csid->subdev.entity, fmt->bpp, lane_cf= g); if (link_freq < 0) link_freq =3D 0; =20 for (i =3D 0; i < csid->nclocks; i++) { struct camss_clock *clock =3D &csid->clock[i]; =20 if (!strcmp(clock->name, "csi0") || !strcmp(clock->name, "csi1") || diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/med= ia/platform/qcom/camss/camss-csiphy.c index 539ac4888b608..f9b1ed79e15de 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -138,19 +138,18 @@ static int csiphy_set_clock_rates(struct csiphy_devic= e *csiphy) { struct device *dev =3D csiphy->camss->dev; s64 link_freq; int i, j; int ret; =20 u8 bpp =3D csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->for= mats->nformats, csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); - u8 num_lanes =3D csiphy->cfg.csi2->lane_cfg.num_data; =20 - link_freq =3D camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + link_freq =3D camss_get_link_freq(&csiphy->subdev.entity, bpp, &csiphy->c= fg.csi2->lane_cfg); if (link_freq < 0) link_freq =3D 0; =20 for (i =3D 0; i < csiphy->nclocks; i++) { struct camss_clock *clock =3D &csiphy->clock[i]; =20 if (csiphy->rate_set[i]) { u64 min_rate =3D link_freq / 4; @@ -264,20 +263,19 @@ static int csiphy_set_power(struct v4l2_subdev *sd, i= nt on) */ static int csiphy_stream_on(struct csiphy_device *csiphy) { struct csiphy_config *cfg =3D &csiphy->cfg; s64 link_freq; u8 lane_mask =3D csiphy->res->hw_ops->get_lane_mask(&cfg->csi2->lane_cfg); u8 bpp =3D csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->for= mats->nformats, csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); - u8 num_lanes =3D csiphy->cfg.csi2->lane_cfg.num_data; u8 val; =20 - link_freq =3D camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes); + link_freq =3D camss_get_link_freq(&csiphy->subdev.entity, bpp, &csiphy->c= fg.csi2->lane_cfg); =20 if (link_freq < 0) { dev_err(csiphy->camss->dev, "Cannot get CSI2 transmitter's link frequency\n"); return -EINVAL; } =20 if (csiphy->base_clk_mux) { diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 072c428e25166..db4e14a84a95f 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -27,16 +27,24 @@ #include #include =20 #include "camss.h" =20 #define CAMSS_CLOCK_MARGIN_NUMERATOR 105 #define CAMSS_CLOCK_MARGIN_DENOMINATOR 100 =20 +/* + * C-PHY encodes data by 16/7 ~ 2.28 bits/symbol + * D-PHY doesn't encode data, thus 16/16 =3D 1 b/s + */ +#define CAMSS_COMMON_PHY_DIVIDENT 16 +#define CAMSS_CPHY_DIVISOR 7 +#define CAMSS_DPHY_DIVISOR 16 + static const struct parent_dev_ops vfe_parent_dev_ops; =20 static const struct camss_subdev_resources csiphy_res_8x16[] =3D { /* CSIPHY0 */ { .regulators =3D {}, .clock =3D { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, .clock_rate =3D { { 0 }, @@ -4618,30 +4626,34 @@ struct media_pad *camss_find_sensor_pad(struct medi= a_entity *entity) return pad; } } =20 /** * camss_get_link_freq - Get link frequency from sensor * @entity: Media entity in the current pipeline * @bpp: Number of bits per pixel for the current format - * @lanes: Number of lanes in the link to the sensor + * @lane_cfg: CSI2 lane configuration * * Return link frequency on success or a negative error code otherwise */ s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, - unsigned int lanes) + struct csiphy_lanes_cfg *lane_cfg) { struct media_pad *sensor_pad; + u8 num_lanes =3D lane_cfg->num_data; + bool cphy =3D lane_cfg->phy_cfg =3D=3D V4L2_MBUS_CSI2_CPHY; + unsigned int div =3D num_lanes * 2 * (cphy ? CAMSS_CPHY_DIVISOR : + CAMSS_DPHY_DIVISOR); =20 sensor_pad =3D camss_find_sensor_pad(entity); if (!sensor_pad) return -ENODEV; =20 - return v4l2_get_link_freq(sensor_pad, bpp, 2 * lanes); + return v4l2_get_link_freq(sensor_pad, CAMSS_COMMON_PHY_DIVIDENT * bpp, di= v); } =20 /* * camss_get_pixel_clock - Get pixel clock rate from sensor * @entity: Media entity in the current pipeline * @pixel_clock: Received pixel clock value * * Return 0 on success or a negative error code otherwise diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/plat= form/qcom/camss/camss.h index 93d691c8ac63b..d65a9b62f7e66 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -164,17 +164,17 @@ struct parent_dev_ops { }; =20 void camss_add_clock_margin(u64 *rate); int camss_enable_clocks(int nclocks, struct camss_clock *clock, struct device *dev); void camss_disable_clocks(int nclocks, struct camss_clock *clock); struct media_pad *camss_find_sensor_pad(struct media_entity *entity); s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp, - unsigned int lanes); + struct csiphy_lanes_cfg *lane_cfg); int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); int camss_pm_domain_on(struct camss *camss, int id); void camss_pm_domain_off(struct camss *camss, int id); int camss_vfe_get(struct camss *camss, int id); void camss_vfe_put(struct camss *camss, int id); void camss_delete(struct camss *camss); void camss_buf_done(struct camss *camss, int hw_id, int port_id); void camss_reg_update(struct camss *camss, int hw_id, --=20 2.53.0 From nobody Mon Jun 8 05:25:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FCF13815C2; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; cv=none; b=Yi05v0HfXWA7ZvX41pS/PrHNO9LSnrkRI1pLZ5UZ7lT6XIlWS2S6lSSxCeE6F8OQVlPae0QKlDvfRv62GmaE1zRmsBozuAVTzga4/8OvrwRg3v+UPsUdfh0Hk6Tu3D4NzbAOdYrKGYCXKaeiyCEMQeJEmflxwNCZ1p2Qt/URm1Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780443053; c=relaxed/simple; bh=yJk1wbL1jqLZ7xqEvSc5MqxvJ8W6C4e/ugOsmSZ4iIA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rtqTa0eoeS3tVP5XE1SqU0/WK1NfXzdzNSFmaIOO5QmH2bKqgT9BgycEd/YVm/u21DxDxvsuxYzhl2NLSJ611nDy6AviRWQLmJ9TORTbkByTG4JSKcKP6m6NSyrUORQ/+2oU8V/mi3Gr6mG91BxMZpMSDF5lPb19Ob3We6YOksM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eKyL8IcL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eKyL8IcL" Received: by smtp.kernel.org (Postfix) with ESMTPS id 50B37C2BCFC; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780443053; bh=yJk1wbL1jqLZ7xqEvSc5MqxvJ8W6C4e/ugOsmSZ4iIA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=eKyL8IcLC6P90WRBBGqtbovDIMdp9iXpbN9UFlUHlpHOy+ADO/ZoY7kpLKKzodq27 +fPZdrvuuNHq6301aHRts+31BLuOZj5sUqiM1IKeCMlHrV/40eSVLhG9JeDBtgy6EF t2K7qcCH93cRc9Sga3kqmwfT4jD8vrDWfJu0AHJXPxGPaGEJLqdwCZYQm/fe7X/aSL 7zrHDFIp69SbDCPDvpNk90wp+e4GQiCkh2tyWnSPmvf/buYd1PKivaWcCmlpNJQ31X XsTqqvJVRJU/DOH1WJ5MIiQYitq4JjH6HgH60k77eH+zwfn/D8YMdtcrFwbXmzwRGy v67JuTGEz3oBA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46D9ECD6E6A; Tue, 2 Jun 2026 23:30:53 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Wed, 03 Jun 2026 01:30:46 +0200 Subject: [PATCH v6 8/8] media: qcom: camss: Enable C-PHY where available Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260603-qcom-cphy-v6-8-e50de0b557a8@ixit.cz> References: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> In-Reply-To: <20260603-qcom-cphy-v6-0-e50de0b557a8@ixit.cz> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Luca Weiss , Petr Hodina , "Dr. Git" , Cory Keitz , Loic Poulain Cc: Konrad Dybcio , Kieran Bingham , Sakari Ailus , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1350; i=david@ixit.cz; h=from:subject:message-id; bh=WQAK+dTWd4zgEWrjdRbxx4I2y2Bah8Upe6SOIj07erk=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBqH2erjuxOKIAR+9NWPxdxKUDCuTfi2NbYCikRQ COb0d9Bi+GJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCah9nqwAKCRBgAj/E00kg cmjDD/4n7DVvh3LREds6dJWlxq9B/BDPRCKUbwEadOF1zpoety9Rv7X7b9Q1/tRyATv2fY+FLoE I7YrJMxuc7keo/YjNMsSM7SJe9AtE1g3r3capal4EELqIShe2NFX/9JXx0u7xKAkhDP2Cr9zhRr N7h4Fy+IFTc56UTy/cdz/+ps8ClZe2cQ++HFfbjmLRZpdmrpQXP5Nlb5NRBZVnkApD6KYEV3/do sI9o/6Cdskjv2mh/lL0epIkmCpeyoaJ4FdJ6Bj/R+uHexyAQcB+EmkiS/DbOVGPbpCtGj9yadrr +2dTC9UTvuaQiUBUPdE8HjTlL8XlplYo/uJL9zAM2eYECTkejcYqEyZYGFoVWrNBkTiQmpv/ops DTy8SsDCN/+B4ge2ZVX9cejnhITI9IQ2Trxj8FAAKAR1as/6BXeYvPzXHW5whcMOiJmi9ikG+/N 0FgbcUy6nLaIaWaCHVRqwtbW4lFXKB7gkRh3/Xkao3MAdckELKLJSEyY2t9l+asEH7DE62Esexh nMsUEFC1BE4yJgJStdPgSRxPvIG3kjXuD0P/rqIv8wh+xPu9//CM/L3tH93b/DF/GQDEe6RkTyp yJ7P0/Lz2uCdoPmJ/+kA1FJlqmZ19OX1RT+poq1oudavVnWfn02GqocUfBZOYFrHd9bqUG2my8a xA+28VPx5AFYHQg== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg After all the changes done we can now safely enable C-PHY for a SoC where it's available. Acked-by: Cory Keitz Reviewed-by: Bryan O'Donoghue Signed-off-by: David Heidelberg Reviewed-by: Frank Li --- drivers/media/platform/qcom/camss/camss.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index db4e14a84a95f..555c53343a1e9 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -4761,21 +4761,21 @@ static int camss_parse_endpoint_node(struct device = *dev, struct v4l2_fwnode_endpoint vep =3D { { 0 } }; unsigned int i; int ret; =20 ret =3D v4l2_fwnode_endpoint_parse(ep, &vep); if (ret) return ret; =20 - /* - * Most SoCs support both D-PHY and C-PHY standards, but currently only - * D-PHY is supported in the driver. - */ - if (vep.bus_type !=3D V4L2_MBUS_CSI2_DPHY) { + switch (vep.bus_type) { + case V4L2_MBUS_CSI2_CPHY: + case V4L2_MBUS_CSI2_DPHY: + break; + default: dev_err(dev, "Unsupported bus type %d\n", vep.bus_type); return -EINVAL; } =20 csd->interface.csiphy_id =3D vep.base.port; =20 mipi_csi2 =3D &vep.bus.mipi_csi2; lncfg->num_data =3D mipi_csi2->num_data_lanes; --=20 2.53.0