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Tue, 02 Jun 2026 03:32:37 -0700 (PDT) Received: from archterra ([219.91.178.240]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8422a63537bsm9258941b3a.37.2026.06.02.03.32.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jun 2026 03:32:37 -0700 (PDT) From: Arihan Bhor To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, Arihan Bhor Subject: [PATCH] staging: axis-fifo: remove driver Date: Tue, 2 Jun 2026 16:01:53 +0530 Message-ID: <20260602103208.15799-1-dogestad24@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Signed-off-by: Arihan Bhor --- drivers/staging/Kconfig | 2 - drivers/staging/Makefile | 1 - drivers/staging/axis-fifo/Kconfig | 12 - drivers/staging/axis-fifo/Makefile | 2 - drivers/staging/axis-fifo/README | 0 drivers/staging/axis-fifo/axis-fifo.c | 542 ------------------------ drivers/staging/axis-fifo/axis-fifo.txt | 96 ----- 7 files changed, 655 deletions(-) delete mode 100644 drivers/staging/axis-fifo/Kconfig delete mode 100644 drivers/staging/axis-fifo/Makefile delete mode 100644 drivers/staging/axis-fifo/README delete mode 100644 drivers/staging/axis-fifo/axis-fifo.c delete mode 100644 drivers/staging/axis-fifo/axis-fifo.txt diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 2f92cd698..ad085c190 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -44,8 +44,6 @@ source "drivers/staging/greybus/Kconfig" =20 source "drivers/staging/vc04_services/Kconfig" =20 -source "drivers/staging/axis-fifo/Kconfig" - source "drivers/staging/vme_user/Kconfig" =20 endif # STAGING diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index f5b8876aa..20757e140 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -12,4 +12,3 @@ obj-$(CONFIG_FB_TFT) +=3D fbtft/ obj-$(CONFIG_MOST) +=3D most/ obj-$(CONFIG_GREYBUS) +=3D greybus/ obj-$(CONFIG_BCM2835_VCHIQ) +=3D vc04_services/ -obj-$(CONFIG_XIL_AXIS_FIFO) +=3D axis-fifo/ diff --git a/drivers/staging/axis-fifo/Kconfig b/drivers/staging/axis-fifo/= Kconfig deleted file mode 100644 index f180a8e9f..000000000 --- a/drivers/staging/axis-fifo/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# "Xilinx AXI-Stream FIFO IP core driver" -# -config XIL_AXIS_FIFO - tristate "Xilinx AXI-Stream FIFO IP core driver" - depends on OF && HAS_IOMEM - help - This adds support for the Xilinx AXI-Stream FIFO IP core driver. - The AXI Streaming FIFO allows memory mapped access to a AXI Streaming - interface. The Xilinx AXI-Stream FIFO IP core can be used to interface - to the AXI Ethernet without the need to use DMA. diff --git a/drivers/staging/axis-fifo/Makefile b/drivers/staging/axis-fifo= /Makefile deleted file mode 100644 index c626005c9..000000000 --- a/drivers/staging/axis-fifo/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_XIL_AXIS_FIFO) +=3D axis-fifo.o diff --git a/drivers/staging/axis-fifo/README b/drivers/staging/axis-fifo/R= EADME deleted file mode 100644 index e69de29bb..000000000 diff --git a/drivers/staging/axis-fifo/axis-fifo.c b/drivers/staging/axis-f= ifo/axis-fifo.c deleted file mode 100644 index 3aa2aa870..000000000 --- a/drivers/staging/axis-fifo/axis-fifo.c +++ /dev/null @@ -1,542 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Xilinx AXIS FIFO: interface to the Xilinx AXI-Stream FIFO IP core - * - * Copyright (C) 2018 Jacob Feder - * - * Authors: Jacob Feder - * - * See Xilinx PG080 document for IP details - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRIVER_NAME "axis_fifo" - -#define READ_BUF_SIZE 128U /* read buffer length in words */ - -#define AXIS_FIFO_DEBUG_REG_NAME_MAX_LEN 4 - -#define XLLF_ISR_OFFSET 0x00 /* Interrupt Status */ -#define XLLF_IER_OFFSET 0x04 /* Interrupt Enable */ -#define XLLF_TDFR_OFFSET 0x08 /* Transmit Reset */ -#define XLLF_TDFV_OFFSET 0x0c /* Transmit Vacancy */ -#define XLLF_TDFD_OFFSET 0x10 /* Transmit Data */ -#define XLLF_TLR_OFFSET 0x14 /* Transmit Length */ -#define XLLF_RDFR_OFFSET 0x18 /* Receive Reset */ -#define XLLF_RDFO_OFFSET 0x1c /* Receive Occupancy */ -#define XLLF_RDFD_OFFSET 0x20 /* Receive Data */ -#define XLLF_RLR_OFFSET 0x24 /* Receive Length */ -#define XLLF_SRR_OFFSET 0x28 /* Local Link Reset */ -#define XLLF_TDR_OFFSET 0x2C /* Transmit Destination */ -#define XLLF_RDR_OFFSET 0x30 /* Receive Destination */ - -#define XLLF_RDFR_RESET_MASK 0xa5 /* Receive reset value */ -#define XLLF_TDFR_RESET_MASK 0xa5 /* Transmit reset value */ -#define XLLF_SRR_RESET_MASK 0xa5 /* Local Link reset value */ - -#define XLLF_INT_RPURE_MASK BIT(31) /* Receive under-read */ -#define XLLF_INT_RPORE_MASK BIT(30) /* Receive over-read */ -#define XLLF_INT_RPUE_MASK BIT(29) /* Receive underrun (empty) */ -#define XLLF_INT_TPOE_MASK BIT(28) /* Transmit overrun */ -#define XLLF_INT_TC_MASK BIT(27) /* Transmit complete */ -#define XLLF_INT_RC_MASK BIT(26) /* Receive complete */ -#define XLLF_INT_TSE_MASK BIT(25) /* Transmit length mismatch */ - -#define XLLF_INT_CLEAR_ALL GENMASK(31, 0) - -static DEFINE_IDA(axis_fifo_ida); - -struct axis_fifo { - int id; - void __iomem *base_addr; - - unsigned int rx_fifo_depth; - unsigned int tx_fifo_depth; - u32 has_rx_fifo; - u32 has_tx_fifo; - - wait_queue_head_t read_queue; - struct mutex read_lock; /* lock for reading */ - wait_queue_head_t write_queue; - struct mutex write_lock; /* lock for writing */ - - struct device *dt_device; - struct miscdevice miscdev; - - struct dentry *debugfs_dir; -}; - -struct axis_fifo_debug_reg { - const char * const name; - unsigned int offset; -}; - -static void reset_ip_core(struct axis_fifo *fifo) -{ - iowrite32(XLLF_SRR_RESET_MASK, fifo->base_addr + XLLF_SRR_OFFSET); - iowrite32(XLLF_TDFR_RESET_MASK, fifo->base_addr + XLLF_TDFR_OFFSET); - iowrite32(XLLF_RDFR_RESET_MASK, fifo->base_addr + XLLF_RDFR_OFFSET); - iowrite32(XLLF_INT_TC_MASK | XLLF_INT_RC_MASK | XLLF_INT_RPURE_MASK | - XLLF_INT_RPORE_MASK | XLLF_INT_RPUE_MASK | - XLLF_INT_TPOE_MASK | XLLF_INT_TSE_MASK, - fifo->base_addr + XLLF_IER_OFFSET); - iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET); -} - -/** - * axis_fifo_read() - Read a packet from AXIS-FIFO character device. - * @f: Open file. - * @buf: User space buffer to read to. - * @len: User space buffer length. - * @off: Buffer offset. - * - * As defined by the device's documentation, we need to check the device's - * occupancy before reading the length register and then the data. All the= se - * operations must be executed atomically, in order and one after the other - * without missing any. - * - * Returns the number of bytes read from the device or negative error code - * on failure. - */ -static ssize_t axis_fifo_read(struct file *f, char __user *buf, - size_t len, loff_t *off) -{ - struct axis_fifo *fifo =3D f->private_data; - size_t bytes_available; - unsigned int words_available; - unsigned int copied; - unsigned int copy; - unsigned int i; - int ret; - u32 tmp_buf[READ_BUF_SIZE]; - - if (f->f_flags & O_NONBLOCK) { - if (!mutex_trylock(&fifo->read_lock)) - return -EAGAIN; - - if (!ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) { - ret =3D -EAGAIN; - goto end_unlock; - } - } else { - mutex_lock(&fifo->read_lock); - - ret =3D wait_event_interruptible(fifo->read_queue, - ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)); - if (ret) - goto end_unlock; - } - - bytes_available =3D ioread32(fifo->base_addr + XLLF_RLR_OFFSET); - words_available =3D bytes_available / sizeof(u32); - - if (bytes_available > len) { - ret =3D -EINVAL; - goto err_flush_rx; - } - - if (bytes_available % sizeof(u32)) { - /* this probably can't happen unless IP - * registers were previously mishandled - */ - dev_err(fifo->dt_device, "received a packet that isn't word-aligned\n"); - ret =3D -EIO; - goto err_flush_rx; - } - - copied =3D 0; - while (words_available > 0) { - copy =3D min(words_available, READ_BUF_SIZE); - - for (i =3D 0; i < copy; i++) { - tmp_buf[i] =3D ioread32(fifo->base_addr + - XLLF_RDFD_OFFSET); - } - words_available -=3D copy; - - if (copy_to_user(buf + copied * sizeof(u32), tmp_buf, - copy * sizeof(u32))) { - ret =3D -EFAULT; - goto err_flush_rx; - } - - copied +=3D copy; - } - mutex_unlock(&fifo->read_lock); - - return bytes_available; - -err_flush_rx: - while (words_available--) - ioread32(fifo->base_addr + XLLF_RDFD_OFFSET); - -end_unlock: - mutex_unlock(&fifo->read_lock); - - return ret; -} - -/** - * axis_fifo_write() - Write buffer to AXIS-FIFO character device. - * @f: Open file. - * @buf: User space buffer to write to the device. - * @len: User space buffer length. - * @off: Buffer offset. - * - * As defined by the device's documentation, we need to write to the devic= e's - * data buffer then to the device's packet length register atomically. Als= o, - * we need to lock before checking if the device has available space to av= oid - * any concurrency issue. - * - * Returns the number of bytes written to the device or negative error code - * on failure. - */ -static ssize_t axis_fifo_write(struct file *f, const char __user *buf, - size_t len, loff_t *off) -{ - struct axis_fifo *fifo =3D f->private_data; - unsigned int words_to_write; - u32 *txbuf; - int ret; - - words_to_write =3D len / sizeof(u32); - - /* - * In 'Store-and-Forward' mode, the maximum packet that can be - * transmitted is limited by the size of the FIFO, which is - * (C_TX_FIFO_DEPTH=E2=80=934)*(data interface width/8) bytes. - * - * Do not attempt to send a packet larger than 'tx_fifo_depth - 4', - * otherwise a 'Transmit Packet Overrun Error' interrupt will be - * raised, which requires a reset of the TX circuit to recover. - */ - if (!words_to_write || (len % sizeof(u32)) || - (words_to_write > (fifo->tx_fifo_depth - 4))) - return -EINVAL; - - if (f->f_flags & O_NONBLOCK) { - if (!mutex_trylock(&fifo->write_lock)) - return -EAGAIN; - - if (words_to_write > ioread32(fifo->base_addr + - XLLF_TDFV_OFFSET)) { - ret =3D -EAGAIN; - goto end_unlock; - } - } else { - mutex_lock(&fifo->write_lock); - - ret =3D wait_event_interruptible(fifo->write_queue, - ioread32(fifo->base_addr + XLLF_TDFV_OFFSET) >=3D words_to_write); - if (ret) - goto end_unlock; - } - - txbuf =3D vmemdup_user(buf, len); - if (IS_ERR(txbuf)) { - ret =3D PTR_ERR(txbuf); - goto end_unlock; - } - - for (int i =3D 0; i < words_to_write; ++i) - iowrite32(txbuf[i], fifo->base_addr + XLLF_TDFD_OFFSET); - - iowrite32(len, fifo->base_addr + XLLF_TLR_OFFSET); - - ret =3D len; - kvfree(txbuf); -end_unlock: - mutex_unlock(&fifo->write_lock); - - return ret; -} - -static __poll_t axis_fifo_poll(struct file *f, poll_table *wait) -{ - struct axis_fifo *fifo =3D f->private_data; - __poll_t mask =3D 0; - - if (fifo->has_rx_fifo) { - poll_wait(f, &fifo->read_queue, wait); - - if (ioread32(fifo->base_addr + XLLF_RDFO_OFFSET)) - mask |=3D EPOLLIN | EPOLLRDNORM; - } - - if (fifo->has_tx_fifo) { - poll_wait(f, &fifo->write_queue, wait); - - if (ioread32(fifo->base_addr + XLLF_TDFV_OFFSET)) - mask |=3D EPOLLOUT | EPOLLWRNORM; - } - - return mask; -} - -static irqreturn_t axis_fifo_irq(int irq, void *dw) -{ - struct axis_fifo *fifo =3D dw; - u32 isr, ier, intr; - - ier =3D ioread32(fifo->base_addr + XLLF_IER_OFFSET); - isr =3D ioread32(fifo->base_addr + XLLF_ISR_OFFSET); - intr =3D ier & isr; - - if (intr & XLLF_INT_RC_MASK) - wake_up(&fifo->read_queue); - - if (intr & XLLF_INT_TC_MASK) - wake_up(&fifo->write_queue); - - if (intr & XLLF_INT_RPURE_MASK) - dev_err(fifo->dt_device, "receive under-read interrupt\n"); - - if (intr & XLLF_INT_RPORE_MASK) - dev_err(fifo->dt_device, "receive over-read interrupt\n"); - - if (intr & XLLF_INT_RPUE_MASK) - dev_err(fifo->dt_device, "receive underrun error interrupt\n"); - - if (intr & XLLF_INT_TPOE_MASK) - dev_err(fifo->dt_device, "transmit overrun error interrupt\n"); - - if (intr & XLLF_INT_TSE_MASK) - dev_err(fifo->dt_device, - "transmit length mismatch error interrupt\n"); - - iowrite32(XLLF_INT_CLEAR_ALL, fifo->base_addr + XLLF_ISR_OFFSET); - - return IRQ_HANDLED; -} - -static int axis_fifo_open(struct inode *inod, struct file *f) -{ - struct axis_fifo *fifo =3D container_of(f->private_data, - struct axis_fifo, miscdev); - unsigned int flags =3D f->f_flags & O_ACCMODE; - - f->private_data =3D fifo; - - if ((flags =3D=3D O_WRONLY || flags =3D=3D O_RDWR) && !fifo->has_tx_fifo) - return -EPERM; - - if ((flags =3D=3D O_RDONLY || flags =3D=3D O_RDWR) && !fifo->has_rx_fifo) - return -EPERM; - - return 0; -} - -static const struct file_operations fops =3D { - .owner =3D THIS_MODULE, - .open =3D axis_fifo_open, - .read =3D axis_fifo_read, - .write =3D axis_fifo_write, - .poll =3D axis_fifo_poll, -}; - -static int axis_fifo_debugfs_regs_show(struct seq_file *m, void *p) -{ - static const struct axis_fifo_debug_reg regs[] =3D { - {"isr", XLLF_ISR_OFFSET}, - {"ier", XLLF_IER_OFFSET}, - {"tdfv", XLLF_TDFV_OFFSET}, - {"rdfo", XLLF_RDFO_OFFSET}, - { /* Sentinel */ }, - }; - const struct axis_fifo_debug_reg *reg; - struct axis_fifo *fifo =3D m->private; - - for (reg =3D regs; reg->name; ++reg) { - u32 val =3D ioread32(fifo->base_addr + reg->offset); - - seq_printf(m, "%*s: 0x%08x\n", AXIS_FIFO_DEBUG_REG_NAME_MAX_LEN, - reg->name, val); - } - - return 0; -} -DEFINE_SHOW_ATTRIBUTE(axis_fifo_debugfs_regs); - -static void axis_fifo_debugfs_init(struct axis_fifo *fifo) -{ - fifo->debugfs_dir =3D debugfs_create_dir(dev_name(fifo->dt_device), NULL); - - debugfs_create_file("regs", 0444, fifo->debugfs_dir, fifo, - &axis_fifo_debugfs_regs_fops); -} - -static int axis_fifo_parse_dt(struct axis_fifo *fifo) -{ - int ret; - unsigned int value; - struct device_node *node =3D fifo->dt_device->of_node; - - ret =3D of_property_read_u32(node, "xlnx,axi-str-rxd-tdata-width", - &value); - if (ret) - return ret; - if (value !=3D 32) - return -EINVAL; - - ret =3D of_property_read_u32(node, "xlnx,axi-str-txd-tdata-width", - &value); - if (ret) - return ret; - if (value !=3D 32) - return -EINVAL; - - ret =3D of_property_read_u32(node, "xlnx,rx-fifo-depth", - &fifo->rx_fifo_depth); - if (ret) - return ret; - - ret =3D of_property_read_u32(node, "xlnx,tx-fifo-depth", - &fifo->tx_fifo_depth); - if (ret) - return ret; - - ret =3D of_property_read_u32(node, "xlnx,use-rx-data", - &fifo->has_rx_fifo); - if (ret) - return ret; - - ret =3D of_property_read_u32(node, "xlnx,use-tx-data", - &fifo->has_tx_fifo); - if (ret) - return ret; - - return 0; -} - -static int axis_fifo_probe(struct platform_device *pdev) -{ - struct resource *r_mem; - struct device *dev =3D &pdev->dev; - struct axis_fifo *fifo =3D NULL; - int rc =3D 0; /* error return value */ - int irq; - - fifo =3D devm_kzalloc(dev, sizeof(*fifo), GFP_KERNEL); - if (!fifo) - return -ENOMEM; - - dev_set_drvdata(dev, fifo); - fifo->dt_device =3D dev; - - init_waitqueue_head(&fifo->read_queue); - init_waitqueue_head(&fifo->write_queue); - - mutex_init(&fifo->read_lock); - mutex_init(&fifo->write_lock); - - fifo->base_addr =3D devm_platform_get_and_ioremap_resource(pdev, 0, &r_me= m); - if (IS_ERR(fifo->base_addr)) - return PTR_ERR(fifo->base_addr); - - rc =3D axis_fifo_parse_dt(fifo); - if (rc) - return rc; - - reset_ip_core(fifo); - - irq =3D platform_get_irq(pdev, 0); - if (irq < 0) - return irq; - - rc =3D devm_request_irq(fifo->dt_device, irq, &axis_fifo_irq, 0, - DRIVER_NAME, fifo); - if (rc) { - dev_err(fifo->dt_device, "couldn't allocate interrupt %i\n", - irq); - return rc; - } - - fifo->id =3D ida_alloc(&axis_fifo_ida, GFP_KERNEL); - if (fifo->id < 0) - return fifo->id; - - fifo->miscdev.fops =3D &fops; - fifo->miscdev.minor =3D MISC_DYNAMIC_MINOR; - fifo->miscdev.parent =3D dev; - fifo->miscdev.name =3D devm_kasprintf(dev, GFP_KERNEL, "%s%d", - DRIVER_NAME, fifo->id); - if (!fifo->miscdev.name) { - ida_free(&axis_fifo_ida, fifo->id); - return -ENOMEM; - } - - rc =3D misc_register(&fifo->miscdev); - if (rc < 0) { - ida_free(&axis_fifo_ida, fifo->id); - return rc; - } - - axis_fifo_debugfs_init(fifo); - - return 0; -} - -static void axis_fifo_remove(struct platform_device *pdev) -{ - struct device *dev =3D &pdev->dev; - struct axis_fifo *fifo =3D dev_get_drvdata(dev); - - debugfs_remove(fifo->debugfs_dir); - misc_deregister(&fifo->miscdev); - ida_free(&axis_fifo_ida, fifo->id); -} - -static const struct of_device_id axis_fifo_of_match[] =3D { - { .compatible =3D "xlnx,axi-fifo-mm-s-4.1", }, - { .compatible =3D "xlnx,axi-fifo-mm-s-4.2", }, - { .compatible =3D "xlnx,axi-fifo-mm-s-4.3", }, - {}, -}; -MODULE_DEVICE_TABLE(of, axis_fifo_of_match); - -static struct platform_driver axis_fifo_driver =3D { - .driver =3D { - .name =3D DRIVER_NAME, - .of_match_table =3D axis_fifo_of_match, - }, - .probe =3D axis_fifo_probe, - .remove =3D axis_fifo_remove, -}; - -static int __init axis_fifo_init(void) -{ - return platform_driver_register(&axis_fifo_driver); -} - -module_init(axis_fifo_init); - -static void __exit axis_fifo_exit(void) -{ - platform_driver_unregister(&axis_fifo_driver); - ida_destroy(&axis_fifo_ida); -} - -module_exit(axis_fifo_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Jacob Feder "); -MODULE_DESCRIPTION("Xilinx AXI-Stream FIFO IP core driver"); diff --git a/drivers/staging/axis-fifo/axis-fifo.txt b/drivers/staging/axis= -fifo/axis-fifo.txt deleted file mode 100644 index 413b81a53..000000000 --- a/drivers/staging/axis-fifo/axis-fifo.txt +++ /dev/null @@ -1,96 +0,0 @@ -Xilinx AXI-Stream FIFO v4.1 IP core - -This IP core has read and write AXI-Stream FIFOs, the contents of which can -be accessed from the AXI4 memory-mapped interface. This is useful for -transferring data from a processor into the FPGA fabric. The driver creates -a character device that can be read/written to with standard -open/read/write/close. - -See Xilinx PG080 document for IP details. - -Currently supports only store-forward mode with a 32-bit -AXI4-Lite interface. DOES NOT support: - - cut-through mode - - AXI4 (non-lite) - -Required properties: -- compatible: Should be one of: - "xlnx,axi-fifo-mm-s-4.1" - "xlnx,axi-fifo-mm-s-4.2" - "xlnx,axi-fifo-mm-s-4.3" -- interrupt-names: Should be "interrupt" -- interrupt-parent: Should be <&intc> -- interrupts: Should contain interrupts lines. -- reg: Should contain registers location and length. -- xlnx,axi-str-rxd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA" -- xlnx,axi-str-rxd-tdata-width: Should be <0x20> -- xlnx,axi-str-txc-protocol: Should be "XIL_AXI_STREAM_ETH_CTRL" -- xlnx,axi-str-txc-tdata-width: Should be <0x20> -- xlnx,axi-str-txd-protocol: Should be "XIL_AXI_STREAM_ETH_DATA" -- xlnx,axi-str-txd-tdata-width: Should be <0x20> -- xlnx,axis-tdest-width: AXI-Stream TDEST width (ignored by the driver) -- xlnx,axis-tid-width: AXI-Stream TID width (ignored by the driver) -- xlnx,axis-tuser-width: AXI-Stream TUSER width (ignored by the driver) -- xlnx,data-interface-type: Should be <0x0> (ignored by the driver) -- xlnx,has-axis-tdest: Should be <0x0> (this feature isn't supported) -- xlnx,has-axis-tid: Should be <0x0> (this feature isn't supported) -- xlnx,has-axis-tkeep: Should be <0x0> (this feature isn't supported) -- xlnx,has-axis-tstrb: Should be <0x0> (this feature isn't supported) -- xlnx,has-axis-tuser: Should be <0x0> (this feature isn't supported) -- xlnx,rx-fifo-depth: Depth of RX FIFO in words -- xlnx,rx-fifo-pe-threshold: RX programmable empty interrupt threshold - (ignored by the driver) -- xlnx,rx-fifo-pf-threshold: RX programmable full interrupt threshold - (ignored by the driver) -- xlnx,s-axi-id-width: Should be <0x4> (ignored by the driver) -- xlnx,s-axi4-data-width: Should be <0x20> (ignored by the driver) -- xlnx,select-xpm: Should be <0x0> (ignored by the driver) -- xlnx,tx-fifo-depth: Depth of TX FIFO in words -- xlnx,tx-fifo-pe-threshold: TX programmable empty interrupt threshold - (ignored by the driver) -- xlnx,tx-fifo-pf-threshold: TX programmable full interrupt threshold - (ignored by the driver) -- xlnx,use-rx-cut-through: Should be <0x0> (this feature isn't supported) -- xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise -- xlnx,use-tx-ctrl: Should be <0x0> (this feature isn't supported) -- xlnx,use-tx-cut-through: Should be <0x0> (this feature isn't supported) -- xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise - -Example: - -axi_fifo_mm_s_0: axi_fifo_mm_s@43c00000 { - compatible =3D "xlnx,axi-fifo-mm-s-4.1"; - interrupt-names =3D "interrupt"; - interrupt-parent =3D <&intc>; - interrupts =3D <0 29 4>; - reg =3D <0x43c00000 0x10000>; - xlnx,axi-str-rxd-protocol =3D "XIL_AXI_STREAM_ETH_DATA"; - xlnx,axi-str-rxd-tdata-width =3D <0x20>; - xlnx,axi-str-txc-protocol =3D "XIL_AXI_STREAM_ETH_CTRL"; - xlnx,axi-str-txc-tdata-width =3D <0x20>; - xlnx,axi-str-txd-protocol =3D "XIL_AXI_STREAM_ETH_DATA"; - xlnx,axi-str-txd-tdata-width =3D <0x20>; - xlnx,axis-tdest-width =3D <0x4>; - xlnx,axis-tid-width =3D <0x4>; - xlnx,axis-tuser-width =3D <0x4>; - xlnx,data-interface-type =3D <0x0>; - xlnx,has-axis-tdest =3D <0x0>; - xlnx,has-axis-tid =3D <0x0>; - xlnx,has-axis-tkeep =3D <0x0>; - xlnx,has-axis-tstrb =3D <0x0>; - xlnx,has-axis-tuser =3D <0x0>; - xlnx,rx-fifo-depth =3D <0x200>; - xlnx,rx-fifo-pe-threshold =3D <0x2>; - xlnx,rx-fifo-pf-threshold =3D <0x1fb>; - xlnx,s-axi-id-width =3D <0x4>; - xlnx,s-axi4-data-width =3D <0x20>; - xlnx,select-xpm =3D <0x0>; - xlnx,tx-fifo-depth =3D <0x8000>; - xlnx,tx-fifo-pe-threshold =3D <0x200>; - xlnx,tx-fifo-pf-threshold =3D <0x7ffb>; - xlnx,use-rx-cut-through =3D <0x0>; - xlnx,use-rx-data =3D <0x0>; - xlnx,use-tx-ctrl =3D <0x0>; - xlnx,use-tx-cut-through =3D <0x0>; - xlnx,use-tx-data =3D <0x1>; -}; --=20 2.54.0