From nobody Mon Jun 8 04:25:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AAAD3B9D94; Tue, 2 Jun 2026 08:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780388748; cv=none; b=ZwRYtLPUjCrpHop8mWCvdg36XbgBBax4mlIEZCLfyVpdsHXzfB1cjhL4fmgq4GTTIo9+CEqDJDGOkjZ57bRlc/Q/7DnZ0hkTodhfotfKB75W3BGL05jVVxz6YxEp1t1Ouj3IB8enH7OMNoGDABv6UW+rgWlPYSTJR/H1ZPYLh7M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780388748; c=relaxed/simple; bh=hiYCo1RAIyJdbdh8LiTzMKE/mFUNtE1Yx9MFVzb3C/0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=inK831RMhfDTGMmtOnT6b9GPXzfz/OrRjrcyypk1XrVImw/NiTD1qhw/juy/IYJHhCbm2spI3F6iDkkJxyiirw8/HDyU9pUGm/2T66CK29lbG3j2xm5Ri1MrnCZNAcfWJqSANO//0PUtedaw/D/iafYdZEYWEYDxVW1E8OjjyBM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ADsZiljM; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ADsZiljM" Received: by smtp.kernel.org (Postfix) with ESMTPS id 12482C2BCC9; Tue, 2 Jun 2026 08:25:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780388748; bh=hiYCo1RAIyJdbdh8LiTzMKE/mFUNtE1Yx9MFVzb3C/0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ADsZiljMTQc1d18P5riFRWs4viVqpfcUNS2YoCueTzvDsAXqVgUkx0pMvj7edQoI9 6OwEi/EvoJezkdBB++NKf/uvhdsxEe70JqC+gciGL31ewqumS7V0O4p1I02DAULJ5i ZjUAORUWm+XeQy6f/gEx23KgcgJxJ5g2YC38PttUNkU7pVcqArtzJ3bf9BAXmLAi9+ Cpb/qAS7ADEP1NiP2kwG2SG4pOlvRdwF/w1KHrLS2DOGmZ39iACGpPgd6EpzK+8xb0 qSG6JP4SsTkToLu8UmuhMn1FdSG8QoxT09hgBMfbu8R6xROqrXnLomETJebefClT/d VgeKyu+5R3RoQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1BB0C5DF71; Tue, 2 Jun 2026 08:25:47 +0000 (UTC) From: Dimitri Fedrau via B4 Relay Date: Tue, 02 Jun 2026 10:25:37 +0200 Subject: [PATCH v6 1/2] dt-bindings: phy: add support for NXPs TJA1145 CAN transceiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-tja1145-support-v6-1-0e0ffc8ee63d@liebherr.com> References: <20260602-tja1145-support-v6-0-0e0ffc8ee63d@liebherr.com> In-Reply-To: <20260602-tja1145-support-v6-0-0e0ffc8ee63d@liebherr.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Dimitri Fedrau Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dimitri Fedrau , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780388746; l=2796; i=dimitri.fedrau@liebherr.com; s=20241202; h=from:subject:message-id; bh=6R2zkH37KN3+mbPNVHNxWLa5YGGzjVPerMq9Q6uHdOw=; b=4MrsGWbeXUda/cOoZIk5ySgRaWwtL6v0P0UxBFOoxr5tw1b5dx7hJDWEishY2lD2RfUiSPPI5 GvG1tJ+zvXLAVP8yvaeSXWZfAk/tyH77RuJSGt2Vi/5v18lyqc0FsBd X-Developer-Key: i=dimitri.fedrau@liebherr.com; a=ed25519; pk=rT653x09JSQvotxIqQl4/XiI4AOiBZrdOGvxDUbb5m8= X-Endpoint-Received: by B4 Relay for dimitri.fedrau@liebherr.com/20241202 with auth_id=290 X-Original-From: Dimitri Fedrau Reply-To: dimitri.fedrau@liebherr.com From: Dimitri Fedrau Adding documentation for NXPs TJA1145 CAN transceiver, which resides like the ti,tcan104x-can.yaml in the same directory as other generic PHY subsystem bindings. At the moment there is only support for simple PHYs by using regulator bindings in combination with can-transceiver.yaml or PHYs that implement the generic PHY subsystem like the NXP TJA1145. Reviewed-by: Conor Dooley Signed-off-by: Dimitri Fedrau --- .../devicetree/bindings/phy/nxp,tja1145.yaml | 86 ++++++++++++++++++= ++++ 1 file changed, 86 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/nxp,tja1145.yaml b/Docum= entation/devicetree/bindings/phy/nxp,tja1145.yaml new file mode 100644 index 0000000000000000000000000000000000000000..fb068f7d774f3c92dea7725416e= 9c3e038e06e2d --- /dev/null +++ b/Documentation/devicetree/bindings/phy/nxp,tja1145.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/nxp,tja1145.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TJA1145 CAN transceiver + +maintainers: + - Dimitri Fedrau + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: nxp,tja1145 + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + spi-cpha: true + + spi-max-frequency: + maximum: 4000000 + + spi-cs-setup-delay-ns: + minimum: 50 + default: 50 + + spi-cs-hold-delay-ns: + minimum: 50 + default: 50 + + spi-cs-inactive-delay-ns: + minimum: 250 + default: 250 + + vcc-supply: + description: + CAN transceiver supply voltage + + vio-supply: + description: + Supply voltage for I/O level adaptor + + vbat-supply: + description: + Battery supply voltage + +required: + - compatible + - reg + - "#phy-cells" + - spi-cpha + +additionalProperties: false + +examples: + - | + #include + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + can-phy@0 { + compatible =3D "nxp,tja1145"; + interrupt-parent =3D <&gpio0>; + interrupts =3D <31 IRQ_TYPE_LEVEL_LOW>; + reg =3D <0>; + #phy-cells =3D <0>; + spi-cpha; + spi-max-frequency =3D <4000000>; + spi-cs-setup-delay-ns =3D <50>; + spi-cs-hold-delay-ns =3D <50>; + spi-cs-inactive-delay-ns =3D <250>; + vcc-supply =3D <®_5v0>; + vio-supply =3D <®_3v3>; + vbat-supply =3D <®_24v0>; + }; + }; --=20 2.39.5 From nobody Mon Jun 8 04:25:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A9903B8D78; Tue, 2 Jun 2026 08:25:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780388748; cv=none; b=j2urwqHPGGrz2kIqFw56czXQA7xzrY9kZZIS8Uh86OYbteT6uK13uFMTAMR2bNBddtAuHbuT8bmqo0vYDtI/kO4pLQ6Ddq0iQJFSLJUFSd/NOxDWsvjS67i/NUh5zGy8G7MagzZAdZEJD2CzQYE8f+vK0wILOjy726i0L+s7gkg= ARC-Message-Signature: i=1; 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b=DpEelpDs3FgGxRvdtjX+qJZSRtaTRbUv6P6hp2QGKaloPtTAHFSXSXNcuHC6fN9Mf RHmFTPUS21xwfkvXb7QRx21uhyC5ump2WL9flE95DPiefjC+3AkutUees+d7TaTjbS EdZNIMzo/UBnPQklJYnFeO9W66GLgsE67DuKy6cwY+F5jzfxORKxfwkxDOsaCz9gWQ oSnkLLKAAiBGIMC2lgVzzN5/oLsZab5FMKwriuw54NxVvuw1sneD6erigw1/myvaZM uIe7aMZRUqiHkpuu0chSmQBBum0kg77QNkfwGOFvFNkSx6FKILjMfIl/4Pj/haMfFp AMKD3drTqAjnA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12DADCD6E57; Tue, 2 Jun 2026 08:25:48 +0000 (UTC) From: Dimitri Fedrau via B4 Relay Date: Tue, 02 Jun 2026 10:25:38 +0200 Subject: [PATCH v6 2/2] phy: add basic support for NXPs TJA1145 CAN transceiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-tja1145-support-v6-2-0e0ffc8ee63d@liebherr.com> References: <20260602-tja1145-support-v6-0-0e0ffc8ee63d@liebherr.com> In-Reply-To: <20260602-tja1145-support-v6-0-0e0ffc8ee63d@liebherr.com> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Dimitri Fedrau Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dimitri Fedrau , lee.lockhey@gmail.com, Marc Kleine-Budde X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780388746; l=7419; i=dimitri.fedrau@liebherr.com; s=20241202; h=from:subject:message-id; bh=cTwa7LJ4WYrfE9uhGBTMXWFXb7E3Zcyu/daqVib881Q=; b=Yz82mMFTB5TxVPWH+Mg/B3dArRXDIOaccHem8sjAnpdNTOHXQUXUQz2Cvfo8gAJbbXMr1bK6r XKtqS9OfXbvBMHF4Ow0H9N1xURiDym8SLviI05fqZ2Wj9Tv35cjJ+Ok X-Developer-Key: i=dimitri.fedrau@liebherr.com; a=ed25519; pk=rT653x09JSQvotxIqQl4/XiI4AOiBZrdOGvxDUbb5m8= X-Endpoint-Received: by B4 Relay for dimitri.fedrau@liebherr.com/20241202 with auth_id=290 X-Original-From: Dimitri Fedrau Reply-To: dimitri.fedrau@liebherr.com From: Dimitri Fedrau Add basic driver support for NXPs TJA1145 CAN transceiver which brings the PHY up/down by switching to normal/standby mode using SPI commands. Tested-by: Reviewed-by: Marc Kleine-Budde Signed-off-by: Dimitri Fedrau --- drivers/phy/Kconfig | 10 +++ drivers/phy/Makefile | 1 + drivers/phy/phy-nxp-tja1145.c | 184 ++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 195 insertions(+) diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index ab96ee5858c1a9dee2aea3a896c09b397cc30c7f..a3f9a05e222002e23d5080aa22b= 56f2a822a4b97 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -124,6 +124,16 @@ config PHY_NXP_PTN3222 schemes. It supports all three USB 2.0 data rates: Low Speed, Full Speed and High Speed. =20 +config PHY_NXP_TJA1145 + tristate "NXP TJA1145 CAN transceiver PHY" + select GENERIC_PHY + select REGMAP_SPI + depends on SPI + help + This option enables support for NXPs TJA1145 CAN transceiver as a PHY. + This driver provides function for putting the transceiver in various + functional modes using SPI commands. + config PHY_PISTACHIO_USB tristate "IMG Pistachio USB2.0 PHY driver" depends on MIPS || COMPILE_TEST diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index f31767745123773757e84b0b5fb85ec286c1d977..65ea9f0bc7f151378caa6e161f8= b8a5c6884d7e5 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_PHY_GOOGLE_USB) +=3D phy-google-usb.o obj-$(CONFIG_USB_LGM_PHY) +=3D phy-lgm-usb.o obj-$(CONFIG_PHY_LPC18XX_USB_OTG) +=3D phy-lpc18xx-usb-otg.o obj-$(CONFIG_PHY_NXP_PTN3222) +=3D phy-nxp-ptn3222.o +obj-$(CONFIG_PHY_NXP_TJA1145) +=3D phy-nxp-tja1145.o obj-$(CONFIG_PHY_PISTACHIO_USB) +=3D phy-pistachio-usb.o obj-$(CONFIG_PHY_SNPS_EUSB2) +=3D phy-snps-eusb2.o obj-$(CONFIG_PHY_XGENE) +=3D phy-xgene.o diff --git a/drivers/phy/phy-nxp-tja1145.c b/drivers/phy/phy-nxp-tja1145.c new file mode 100644 index 0000000000000000000000000000000000000000..1e8bd169743abfaeee6948d200e= 6ac320cd616ff --- /dev/null +++ b/drivers/phy/phy-nxp-tja1145.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 Liebherr-Electronics and Drives GmbH + */ +#include +#include + +#include +#include + +#define TJA1145_MODE_CTRL 0x01 +#define TJA1145_MODE_CTRL_MC GENMASK(2, 0) +#define TJA1145_MODE_CTRL_STBY BIT(2) +#define TJA1145_MODE_CTRL_NORMAL TJA1145_MODE_CTRL_MC + +#define TJA1145_CAN_CTRL 0x20 +#define TJA1145_CAN_CTRL_CMC GENMASK(1, 0) +#define TJA1145_CAN_CTRL_ACTIVE BIT(1) + +#define TJA1145_IDENT 0x7e +#define TJA1145_IDENT_TJA1145T 0x70 + +#define TJA1145_SPI_READ_BIT BIT(0) +#define TJA1145T_MAX_BITRATE 1000000 + +static int tja1145_phy_power_on(struct phy *phy) +{ + struct regmap *map =3D phy_get_drvdata(phy); + int ret; + + /* + * Switch operating mode to normal which is the active operating mode. + * In this mode, the device is fully operational. + */ + ret =3D regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC, + TJA1145_MODE_CTRL_NORMAL); + if (ret) + return ret; + + /* + * Switch to CAN operating mode active where the PHY can transmit and + * receive data. + */ + return regmap_update_bits(map, TJA1145_CAN_CTRL, TJA1145_CAN_CTRL_CMC, + TJA1145_CAN_CTRL_ACTIVE); +} + +static int tja1145_phy_power_off(struct phy *phy) +{ + struct regmap *map =3D phy_get_drvdata(phy); + + /* + * Switch to operating mode standby, the PHY is unable to transmit or + * receive data in standby mode. + */ + return regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC, + TJA1145_MODE_CTRL_STBY); +} + +static const struct phy_ops tja1145_phy_ops =3D { + .power_on =3D tja1145_phy_power_on, + .power_off =3D tja1145_phy_power_off, + .owner =3D THIS_MODULE, +}; + +static const struct regmap_range tja1145_wr_holes_ranges[] =3D { + regmap_reg_range(0x00, 0x00), + regmap_reg_range(0x02, 0x03), + regmap_reg_range(0x05, 0x05), + regmap_reg_range(0x0b, 0x1f), + regmap_reg_range(0x21, 0x22), + regmap_reg_range(0x24, 0x25), + regmap_reg_range(0x30, 0x4b), + regmap_reg_range(0x4d, 0x60), + regmap_reg_range(0x62, 0x62), + regmap_reg_range(0x65, 0x67), + regmap_reg_range(0x70, 0xff), +}; + +static const struct regmap_access_table tja1145_wr_table =3D { + .no_ranges =3D tja1145_wr_holes_ranges, + .n_no_ranges =3D ARRAY_SIZE(tja1145_wr_holes_ranges), +}; + +static const struct regmap_range tja1145_rd_holes_ranges[] =3D { + regmap_reg_range(0x00, 0x00), + regmap_reg_range(0x02, 0x02), + regmap_reg_range(0x05, 0x05), + regmap_reg_range(0x0b, 0x1f), + regmap_reg_range(0x21, 0x21), + regmap_reg_range(0x24, 0x25), + regmap_reg_range(0x30, 0x4a), + regmap_reg_range(0x4d, 0x5f), + regmap_reg_range(0x62, 0x62), + regmap_reg_range(0x65, 0x67), + regmap_reg_range(0x70, 0x7d), + regmap_reg_range(0x7f, 0xff), +}; + +static const struct regmap_access_table tja1145_rd_table =3D { + .no_ranges =3D tja1145_rd_holes_ranges, + .n_no_ranges =3D ARRAY_SIZE(tja1145_rd_holes_ranges), +}; + +static const struct regmap_config tja1145_regmap_config =3D { + .reg_bits =3D 8, + .reg_shift =3D -1, + .val_bits =3D 8, + .wr_table =3D &tja1145_wr_table, + .rd_table =3D &tja1145_rd_table, + .read_flag_mask =3D TJA1145_SPI_READ_BIT, + .max_register =3D TJA1145_IDENT, +}; + +static int tja1145_check_ident(struct device *dev, struct regmap *map) +{ + unsigned int val; + int ret; + + ret =3D regmap_read(map, TJA1145_IDENT, &val); + if (ret) + return ret; + + if (val !=3D TJA1145_IDENT_TJA1145T) { + dev_err(dev, "Expected device id: 0x%02x, got: 0x%02x\n", + TJA1145_IDENT_TJA1145T, val); + return -ENODEV; + } + + return 0; +} + +static int tja1145_probe(struct spi_device *spi) +{ + struct phy_provider *phy_provider; + struct device *dev =3D &spi->dev; + struct regmap *map; + struct phy *phy; + int ret; + + map =3D devm_regmap_init_spi(spi, &tja1145_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap\n"); + + ret =3D tja1145_check_ident(dev, map); + if (ret) + return dev_err_probe(dev, ret, "failed to identify device\n"); + + phy =3D devm_phy_create(dev, dev->of_node, &tja1145_phy_ops); + if (IS_ERR(phy)) + return dev_err_probe(dev, PTR_ERR(phy), "failed to create PHY\n"); + + phy->attrs.max_link_rate =3D TJA1145T_MAX_BITRATE; + phy_set_drvdata(phy, map); + phy_provider =3D devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct spi_device_id tja1145_spi_id[] =3D { + { "tja1145" }, + { } +}; +MODULE_DEVICE_TABLE(spi, tja1145_spi_id); + +static const struct of_device_id tja1145_of_match[] =3D { + { .compatible =3D "nxp,tja1145" }, + { } +}; +MODULE_DEVICE_TABLE(of, tja1145_of_match); + +static struct spi_driver tja1145_driver =3D { + .driver =3D { + .name =3D "tja1145", + .of_match_table =3D tja1145_of_match, + }, + .probe =3D tja1145_probe, + .id_table =3D tja1145_spi_id, +}; +module_spi_driver(tja1145_driver); + +MODULE_DESCRIPTION("NXP TJA1145 CAN transceiver PHY driver"); +MODULE_AUTHOR("Dimitri Fedrau "); +MODULE_LICENSE("GPL"); --=20 2.39.5