From nobody Mon Jun 8 04:27:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A95342571DA; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; cv=none; b=iGa+ZyXavPpar8VqjPRnUX3gQPA6Wfh7rf0fzgOY2l9p4Q4BWUlP6Ew/2H8IdQlCGpbHqT7dX3g2RrgEhk/qu+6M/zO87TI7xXQEmhzotbIw4lPiRASkXTTb+bAY381i/HC7wu7dveXKt7iCobW+lCH1IagUD5hm4ZEt0PFCEj8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; c=relaxed/simple; bh=SORcje6nNo4hyz3sdF5oThJ2NF9xcrhVqrTOFos5NAM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=j11fOvuLGqRiDA5mhqw91tZywtoOsPyKuszXzWeUSMQuBfHKGWm9lFNlj95uD08Er7rPXe27WheqO7j+jipmiCQoZaHi23rSKL80hKZCWVSEKajPDPepGi/uhqHLJwLscldHN2lMeoIqLdu0xKD5hfmsz+WoE8MuWGlIn9ZFEH0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HdUFOIL/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HdUFOIL/" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5C034C2BCF4; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780383047; bh=SORcje6nNo4hyz3sdF5oThJ2NF9xcrhVqrTOFos5NAM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=HdUFOIL/FCQWoKf1wiNtcHuCir/ZLNMjVfRwi5+9745zwzM+FyrGZ6XcgMVeXYUMW NyZW3FwWgNejXGnN+6gUzbsz2q4VOgEbFngtvysf/FhtxOtwJjFwmHJT1jOkBTUnFy 8fDI7IcD7q7eqVMSgmh6Ul+ktN2ptEf4Lzxs2kjimJUaYirMxHxJfm2isF8enKaA/4 etdqZJP0kQY1XPre2XjGqpiDCa6wHmHDxlB7agGKo1ulIYPmWsMYi5Vxzavj7wF2EF D79hINRfQNIVAYRJDfoofG10o4gLSwUpV8ycqjJUEScV9r/+9DHV8kEjEvBH/Mz0FN swMU8jaA+rGjg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 484CDC5DF71; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 02 Jun 2026 10:50:37 +0400 Subject: [PATCH v2 1/4] dt-bindings: net: ethernet-phy: move clocks property to invidivual PHY bindings Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-ipq5018-gephy-clocks-v2-1-65a1f1d881f3@outlook.com> References: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> In-Reply-To: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780383045; l=2564; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=JF+9D9ibIujy3R8OCamEf63tGtDhuH5LrP1BT4APw7g=; b=qmYr1njuSRFfbA8TCMCe9/wzVxkvnZ1e2EEziVPHMEjgm/0ygSsOwXmDxgPIyLpZtgeytdr6a szM4/13e3aHAdGZmNX96G2RXH4GxbYkH1Yme64KJh+r6Ip29QK6vCIs X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Move the clock property and restriction from the ethernet-phy.yaml file to the individual PHY binding files. This allows each PHY to manage its own clock requirements. Signed-off-by: George Moussalem --- Commit 350b7a258f20 introduced the clocks property with a restriction to maximum 1 to the main ethernet-phy.yaml binding for Realtek to add an optional external clock source. This is restrictive to all PHY bindings, as some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires 2 clocks (for RX and TX). There are three other PHY drivers that require clock management: - Micrel: requires 1 optional clock and the micrel.yaml file already accomodates for the clock property. - SMSC: requires an optional clock and the legacy bindings file (smsc-lan87xx.txt) already accomodates for the clock property. - BCM7xxx: requires an optional clock. I could not find a bindings file for this PHY family. --- Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ------ Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml | 6 ++++++ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Docu= mentation/devicetree/bindings/net/ethernet-phy.yaml index 21a1a63506f0..709ea976ef79 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -105,12 +105,6 @@ properties: 1BR-10 names. The PHY must be configured to operate in BroadR-Reach = mode by software. =20 - clocks: - maxItems: 1 - description: - External clock connected to the PHY. If not specified it is assumed - that the PHY uses a fixed crystal or an internal oscillator. - enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag description: diff --git a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml b/D= ocumentation/devicetree/bindings/net/realtek,rtl82xx.yaml index 45033c31a2d5..8a26f6941dc4 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml @@ -38,6 +38,12 @@ properties: - ethernet-phy-id001c.cad0 - ethernet-phy-id001c.cb00 =20 + clocks: + maxItems: 1 + description: + External clock connected to the PHY. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator. + leds: true =20 realtek,aldps-enable: --=20 2.53.0 From nobody Mon Jun 8 04:27:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A96523A05C2; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; cv=none; b=Fkkn+6pwthRSG1nwsga2ptG5lQzdLUoOZGZM2mC6UBL9DtWjpnmgaE+U7bCzmPe1vk2E7MFfLmfX9/HysLO4eGgqZV+pr5Jlczik9nAaqvJzPUpuyUWg5I5hJObmescurzYlIgYXGZQQNBuioFdb3kLneGA87o0jXQVn/dIFbeg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; c=relaxed/simple; bh=kIefg/1GFOBugtxjwANZjrxgWJw8zIE16yRu6PaEZ6I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DQNiK6FobdAXump1YCaefEVUnYdbAXM0APvdD3z980CxB+LJiywJhQ5DPIZz4nkeRVXgIiQaBheBkuj6MnJ7kSiDp1gsXeM7gG75vxKpyOARSYuO3ZxSs6eNMEaUkVFuMblRHqn/XW8laoHaYETB1EjoSNx9WwMpceDGEY0RRjk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ByfxNs6z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ByfxNs6z" Received: by smtp.kernel.org (Postfix) with ESMTPS id 688E6C2BCF6; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780383047; bh=kIefg/1GFOBugtxjwANZjrxgWJw8zIE16yRu6PaEZ6I=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ByfxNs6zvTKxwN2P1uUJZf/V2cfF0O3x5Gb4TWJU33UHKp5GlOMsFgUWR0g4cGAb8 WmrMAzHwFZ9YPdPYIY8OkTvtOstxvbHx7KU5sq/eJ6wrNOXUlCgKH7abbAWG+0dQfw 8yOBOLWoUVA/Il01Qh0/9NJoFXWBGU300mpL5MH/70Mpj2LAedyj2jBI3M8eqQs+ME CNGhupECmWGlXxwj7bMtCfg/a0/R+wgsQfTKXULxkTpVOsbz7GxeQii43eW/hvAfAL guaiHbY4DJ4ydJf+P6sUT5mhAjGMtZwQQrZYLr3pTf3yeud/+iUhInPBUk50ZXa4M6 4hj0KBgVG5/Vg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E3CBCD6E4A; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 02 Jun 2026 10:50:38 +0400 Subject: [PATCH v2 2/4] dt-bindings: net: qca,ar803x: Add clocks property for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-ipq5018-gephy-clocks-v2-2-65a1f1d881f3@outlook.com> References: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> In-Reply-To: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780383045; l=1550; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=rp75ghzSXcjDqIvT5opgDmpxqQkfyYFvfhT3Z1yNuHo=; b=Usttx2e8YKj6zXboagFAnbpDINjy3YqTzY2if/dIYtg3G4sMensrQbZYOGUT1lOykjyPhygM5 NY8rA1NJG3sDWI7ObRa3WovAWDWe/MKbUPmlyx/iCNx/zG72OMrrrd5 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. As such, add the clocks property to the schema. Signed-off-by: George Moussalem Acked-by: Conor Dooley --- Documentation/devicetree/bindings/net/qca,ar803x.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Docume= ntation/devicetree/bindings/net/qca,ar803x.yaml index 7ae5110e7aa2..07615640b0ed 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -28,6 +28,16 @@ allOf: reg: const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 = SoC =20 + clocks: + items: + - description: RX clock + - description: TX clock + + clock-names: + items: + - const: rx + - const: tx + resets: items: - description: @@ -162,6 +172,7 @@ examples: }; }; - | + #include #include =20 mdio { @@ -172,6 +183,9 @@ examples: compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 04:27:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B83CC3A6EFC; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; cv=none; b=XWp05nhhQYcLOmLAkHoNmTD/GYMJ4HVAq/5KXOdP5VcuDyMD2KVpYCNho6QNIMJclFit+Jgh1dYBBoAj6fTu1FYwUyhdbx9S0UEnAQS9AzCFhUIVFkVchIi587mmK8NwoT3S6xTUrrMPUH6NfvWL8TrCIKl1uY8c2yfEeGQ05c0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; c=relaxed/simple; bh=ShW9Ricl3pdsDQmWHAT9WtSifRMHSURnw6DOL8FJBD0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FMmrDt9vgowyjPap7FUkm2JgabOb4nQMC84LhUI/Ei8WaIXDotfigcAdHlIXYk6bDtZEeOoqfuEPTO6HhDGMbEsJroTBc2FanmPRHxm9JKL6ilIaOywVddbk2MTHHxbYZxNT+c/X8i2jE3fqerabZA7Br71vjL4JIf2XZSn3GLU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ks/0I1Qk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ks/0I1Qk" Received: by smtp.kernel.org (Postfix) with ESMTPS id 80243C2BCC4; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780383047; bh=ShW9Ricl3pdsDQmWHAT9WtSifRMHSURnw6DOL8FJBD0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ks/0I1QkCboBfPIu7jQzGBYk3u3jhbcrijgtmc+FG2uudMAbVZx6e65Pk9m3V3/QW dpshW/DZnXZwAa7Bna/OZlukGgiRICjgTGCawdEggwurc/eDOlOcAQUWQOqaK8E2t0 afVb9mOuhooUJBcRWeJwGxZWZ0ARDwjmDBgiYLfirHPnDChyJKCbTwUw+r7Y8NQ7JP 4t2OloccJiZy19sUK6wGveLfxjRCzwOxmUPLAqua/RGycjgl7PZLI50idIfoVmc845 wgbk1juWUVK61NL7tqIHkEifmxzd8wC8wGSHwasmeMS9rLkIYW2P+8hed8P0dtkT5W qpgH8c2cAekJA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F5FACD6E61; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 02 Jun 2026 10:50:39 +0400 Subject: [PATCH v2 3/4] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-ipq5018-gephy-clocks-v2-3-65a1f1d881f3@outlook.com> References: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> In-Reply-To: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780383045; l=821; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=ZUcDzKT3pAn1GyMp8FWZKORP9V8n09/s7Z10uOma/1w=; b=hYmsbMQ3fMK4DDwf3ak4gIISvaF2g/SUFPxa+jH6K/jRD+NdcwfZrCKIF2+fxWqVJc4XB2d5y yYpto1t9q0jBUCeVMlkeTguvV5chLRkX84lzcm7RqAD2dI/lHrWH9RR X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add RX and TX clocks for the IPQ5018 GEPHY to enable the datapath. Fixes: f5f2b835e316 ("arm64: dts: qcom: ipq5018: Add GE PHY to internal mdi= o bus") Signed-off-by: George Moussalem Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 6f8004a22a1f..60c27a6f2b10 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -229,6 +229,9 @@ ge_phy: ethernet-phy@7 { compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 04:27:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C43173A7193; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; cv=none; b=m/Gv2ysnFLeOe6ZB9unYkn2oekoPOyOCfrDF/B4p718ofZdV7c+v9xbQpmk3fwIUQHanEK1SclMRIXsE5767va0lkQKlItGiToXJHIX3ynDopLx3Bsfv27h78yN5mofSZx8MueDJTyIJ3++PyTLwsdq5VygMgF1EZi0cwhfrgWs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780383047; c=relaxed/simple; bh=QG4Z1lJud/2m0d4pUKcPCuFCd9HmCmJz7ekPrVHzQfQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mgcC/KyyBSpTepTiMca5YWrNop0nLabwPtD449eIKxJJqslQeAil5IQ6LYEVMhQ1VY1URYXbYUbgHzF045buElSeFl4QrSeDggijcwbiKOcZft3eHLsdYPRywJr89iiop+MKVHR0OmH66grxbQ6wwU++HorZObMsQObuM4lqHes= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=K3CKRjJS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="K3CKRjJS" Received: by smtp.kernel.org (Postfix) with ESMTPS id 96194C2BD01; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780383047; bh=QG4Z1lJud/2m0d4pUKcPCuFCd9HmCmJz7ekPrVHzQfQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=K3CKRjJSHdyaAxXOe8jBBMVkMwMzJ6wFfIA/xtQb+xxxDF5JQfbNAl+IJ/VZ4Ow1U r4nBLISRsoYVekuaYRSN8ybyaZYYMMJ31dT0igxUb6d62hOV1RTkcpvwXdOmNgZcXh GO2Ys1wuJ8ivTrGXCQLo47yLUVdWJpGbrxWWhyqQAfn0eltX6nbeAynVO8QDqu3OCK kPgiBua9e9QApHVN4kKzupgxVrWAoR73GEcnI+gKu1hOcmplC2egpDwHsozP0ruFdg IdxH2og12bZm4bqCnOvl6yMHR0ePDf2reaopW2/UkBd1Y6ApIhoQyKXZb2fCHVtjR1 lb3kc8L3zskVQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EDD2CD6E57; Tue, 2 Jun 2026 06:50:47 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 02 Jun 2026 10:50:40 +0400 Subject: [PATCH v2 4/4] net: phy: at803x: add RX and TX clock management for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260602-ipq5018-gephy-clocks-v2-4-65a1f1d881f3@outlook.com> References: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> In-Reply-To: <20260602-ipq5018-gephy-clocks-v2-0-65a1f1d881f3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780383045; l=2335; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=k3J1uSCRHsxM9xs2etq4AynajTAyY7ew0xbYTGGX5vo=; b=XC5MLpTjeARQV5btxnH3uknIg5JztVn3Er5vSILfOriN654qinR4wnWCSN1B5UZvEJ7YlWLqc 0iQjrlnoEJwC2KaGibXI3KCX9TFRvlgCfTjHcqt1nqkAfBJbc8wP2hi X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Acquire and enable the RX and TX clocks for the IPQ5018 PHY. These clocks are required for the PHY's datapath to function correctly. In addition, gate the clocks upon link state changes for improved power management. Fixes: d46502279a11 ("net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal= PHY support") Signed-off-by: George Moussalem --- drivers/net/phy/qcom/at803x.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c index 63726cf98cd4..b7361a14220d 100644 --- a/drivers/net/phy/qcom/at803x.c +++ b/drivers/net/phy/qcom/at803x.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -176,6 +177,8 @@ struct at803x_context { }; =20 struct ipq5018_priv { + struct clk *rx_clk; + struct clk *tx_clk; struct reset_control *rst; bool set_short_cable_dac; }; @@ -1062,6 +1065,16 @@ static int ipq5018_config_init(struct phy_device *ph= ydev) =20 static void ipq5018_link_change_notify(struct phy_device *phydev) { + struct ipq5018_priv *priv =3D phydev->priv; + + if (phydev->link) { + clk_enable(priv->rx_clk); + clk_enable(priv->tx_clk); + } else { + clk_disable(priv->rx_clk); + clk_disable(priv->tx_clk); + } + /* * Reset the FIFO buffer upon link disconnects to clear any residual data * which may cause issues with the FIFO which it cannot recover from. @@ -1084,6 +1097,16 @@ static int ipq5018_probe(struct phy_device *phydev) priv->set_short_cable_dac =3D of_property_read_bool(dev->of_node, "qcom,dac-preset-short-cable"); =20 + priv->rx_clk =3D devm_clk_get_enabled(dev, "rx"); + if (IS_ERR(priv->rx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->rx_clk), + "failed to get and enable RX clock\n"); + + priv->tx_clk =3D devm_clk_get_enabled(dev, "tx"); + if (IS_ERR(priv->tx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->tx_clk), + "failed to get and enable TX clock\n"); + priv->rst =3D devm_reset_control_array_get_exclusive(dev); if (IS_ERR(priv->rst)) return dev_err_probe(dev, PTR_ERR(priv->rst), --=20 2.53.0