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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 3005F3F7062; Sun, 31 May 2026 19:32:31 -0700 (PDT) From: Ratheesh Kannoth To: , , , CC: , , , , , Nithin Dabilpuram , Ratheesh Kannoth Subject: [PATCH net] octeontx2-af: npc: Fix CPT channel mask in npc_install_flow Date: Mon, 1 Jun 2026 08:02:21 +0530 Message-ID: <20260601023221.858168-1-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: mhEuTRg75Wc5LV3Wjs9bYmfjZTTSWpn- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjAxMDAyMyBTYWx0ZWRfX2gt8R0ZQR4Vu QBTvHbUB35MXmKNFAJNEpLD740FtjNr+L1uQBch2HUUkr/iCd2o+rKrPgeWm6qc81Cg8JMIjS2e +X5g1lOApdOIo58vjxjQRIQ56lS+ZDPSlpp4/I7+mcUgCpmieHHBTur+QFrYzAt6devKbI67r+1 pW+VsuqfmoCY+aLckTMFBKr5l/omyuFnUZ9ZMVuznf6icqrGEB4bQvtZ+oYNwZPbeV9b2EDFCfo 6cuiBHNa4DRkcxv0+MvssdWrl5fBvkEg+6HQosX/Emmj9ER2p10RPmPdNsyOn5bc+HLbz4oXLqI J/hFp02kYyqM2TBVPC51Ib6j2eDN8Ga1KNVZDOmvjuLP3TmutgQgvLwHdKu1ITRk1S/zXqNTIsy n02oeS3OB2zBA8l/wv5iieVRLzTeXY4gzh2sY+LWH6eHID07BJQB8THJrTQH/xo6wC3+R6gfuys rDuXHcCItRq4BTzbfsg== X-Proofpoint-GUID: mhEuTRg75Wc5LV3Wjs9bYmfjZTTSWpn- X-Authority-Analysis: v=2.4 cv=ON0XGyaB c=1 sm=1 tr=0 ts=6a1cef44 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=qit2iCtTFQkLgVSMPQTB:22 a=M5GUcnROAAAA:8 a=4LLoDVS4aI4iRlKlNUYA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-01_01,2026-05-28_03,2025-10-01_01 Content-Type: text/plain; charset="utf-8" From: Nithin Dabilpuram Use the CPT-aware NIX channel mask in the npc_install_flow path so that when the host PF installs steering rules in kernel for a VF used from userspace (e.g. DPDK), MCAM entries see the same channel mask semantics as other RX paths. Fixes: 56bcef528bd8 ("octeontx2-af: Use npc_install_flow API for promisc an= d broadcast entries") Cc: Naveen Mamindlapalli Signed-off-by: Nithin Dabilpuram Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/rvu.h | 1 + .../ethernet/marvell/octeontx2/af/rvu_npc.c | 24 +++++++++++-------- .../marvell/octeontx2/af/rvu_npc_fs.c | 2 +- 3 files changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/= ethernet/marvell/octeontx2/af/rvu.h index de3fbd3d15d6..65397daae4c2 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -1145,6 +1145,7 @@ int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc,= int blkaddr, int lf, int slot); int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc); int rvu_cpt_init(struct rvu *rvu); +u32 rvu_get_cpt_chan_mask(struct rvu *rvu); =20 #define NDC_AF_BANK_MASK GENMASK_ULL(7, 0) #define NDC_AF_BANK_LINE_MASK GENMASK_ULL(31, 16) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_npc.c index 607d0cf1a778..cb1ce4cc1948 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -701,6 +701,19 @@ void npc_set_mcam_action(struct rvu *rvu, struct npc_m= cam *mcam, return rvu_write64(rvu, blkaddr, reg, cfg); } =20 +u32 rvu_get_cpt_chan_mask(struct rvu *rvu) +{ + /* For cn10k the upper two bits of the channel number are + * cpt channel number. with masking out these bits in the + * mcam entry, same entry used for NIX will allow packets + * received from cpt for parsing. + */ + if (!is_rvu_otx2(rvu)) + return NIX_CHAN_CPT_X2P_MASK; + else + return 0xFFFu; +} + void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc, int nixlf, u64 chan, u8 *mac_addr) { @@ -1053,16 +1066,7 @@ void rvu_npc_install_allmulti_entry(struct rvu *rvu,= u16 pcifunc, int nixlf, ether_addr_copy(req.mask.dmac, mac_addr); req.features =3D BIT_ULL(NPC_DMAC); =20 - /* For cn10k the upper two bits of the channel number are - * cpt channel number. with masking out these bits in the - * mcam entry, same entry used for NIX will allow packets - * received from cpt for parsing. - */ - if (!is_rvu_otx2(rvu)) - req.chan_mask =3D NIX_CHAN_CPT_X2P_MASK; - else - req.chan_mask =3D 0xFFFU; - + req.chan_mask =3D rvu_get_cpt_chan_mask(rvu); req.channel =3D chan; req.intf =3D pfvf->nix_rx_intf; req.entry =3D index; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drive= rs/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 6ae9cdcb608b..34f1e066707b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -1820,7 +1820,7 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, =20 /* ignore chan_mask in case pf func is not AF, revisit later */ if (!is_pffunc_af(req->hdr.pcifunc)) - req->chan_mask =3D 0xFFF; + req->chan_mask =3D rvu_get_cpt_chan_mask(rvu); =20 err =3D npc_check_unsupported_flows(rvu, req->features, req->intf); if (err) { --=20 2.43.0