From nobody Mon Jun 8 05:28:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6403736F8E0; Mon, 1 Jun 2026 16:55:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780332950; cv=none; b=UnjIIiUkUkHQbj4n1I/H9Dno9YsqWv2IAJ/R7FT3mN0A1GZ+HGw/TScfVNTFHktM1UwDBpneuNGe6IX9FJ9Dt4RqrAjmKZSyq0/YnI2BEA0A9MNMclQL/bVLB93iLaQVD6xXvIF0kDXHrbV5RcJqFuB7iFxorKYpm+8Vv/gI9oM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780332950; c=relaxed/simple; bh=D7mea+sVvWgr4rVvw9qcM4R/RiRsHw1X+E3lNQDTdFs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mYlOkYS4WkA9/nnZSsKQHCPU8Tm+/wPq1pIkm0nq7gi21TCmJcuC7Vigw5JYo6Pjimn6CVAb6/UTdHzGGCpBzhug8KBZcj3Y2Dlg9BtcA34oPO3nO1iszdZwChl+wBmGbCYYn1dGUgjxB4ae8sHEOzWBA2nF9aXCAotAT6lSFMc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oq9ifSA/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oq9ifSA/" Received: by smtp.kernel.org (Postfix) with ESMTPS id 17A80C2BCF4; Mon, 1 Jun 2026 16:55:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780332950; bh=D7mea+sVvWgr4rVvw9qcM4R/RiRsHw1X+E3lNQDTdFs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oq9ifSA/ATTGlLJPoQ0r1NhC6pA5rwFHI3NWhD8a2ARAedYKAlqmNarLd2v/p2Uoi NI/eXIoBwwOPWNezyRn/ugHKGR8xhWNvIjsVs9m/ozfe2iwIgDZPTi37CpsPEMeGqY WKbolmUqKuW+i3ilKsDiPJAZqT/Nm+AcEJPAy69EYWud9T0wOyUFDGg5rV+ABbObRL V1yQtJhhRIuKUgBRxhzCmhD6MiG9Te1epK/8JfC8kfDb63xlij1bYxWgtc6JyxIC6U rDzo7u12LwMrVcdwYVZc4ayvbfZUkx1sk5RlzzLKX6cQU60vOcJo7Gs2FPb8AIZopi as6of0Tb2B0Qg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10974CD5BD1; Mon, 1 Jun 2026 16:55:50 +0000 (UTC) From: =?utf-8?q?Pablo_Correa_G=C3=B3mez_via_B4_Relay?= Date: Mon, 01 Jun 2026 18:55:36 +0200 Subject: [PATCH v4 1/3] arm64: dts: qcom: sdm670: add default uart pinctrl nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-1-c5d51dd96ca0@postmarketos.org> References: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> In-Reply-To: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Acayan , ~postmarketos/upstreaming@lists.sr.ht, =?utf-8?q?Pablo_Correa_G=C3=B3mez?= X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4680; i=pabloyoyoista@postmarketos.org; h=from:subject:message-id; bh=MsvdWsmedbXe2xM8qbb5uDnLO53eFeUuF5Xokz2VAkA=; b=owEBbQKS/ZANAwAKAXo0JWX/Y195AcsmYgBqHbmUf03GeJ/3yIuv3nvPczLqp7UK/MvxOYmaU YLAC4o9WieJAjMEAAEKAB0WIQS9CheUSi6o/ykTCaJ6NCVl/2NfeQUCah25lAAKCRB6NCVl/2Nf edSlEACHmBAsFUqll2MWoo+6IyaxmTYoo6KMEeAG0o/TnqkMK98buvx+igWtzeRHmwdgnkS6vSo mIsTtDfvUPjEZmGhtZxc/aWJ0Y0xgemD5PRN+0ipi+gdHjf0v0yJiiG3fPs4FLAjkpHi9z8Woht eiiqUya3wA7cfcbbsXJzBFR3qGPyAPfPpGO/ijzNfHsoaai/zIK+Su9FKYO9WoluCtGbtFvRWM3 eVhrRof/lxJfHWK7w3yLUdouIpOUo2mu0cco/nMp7Q0eYnrO8uOqGcKLAlpSJl9CIHtYbSS5t0r bnKOOeF22laWHIgsjYtlcXkzrVmIf7VJ2o4a5Gl2579LpLMt08RKJ139gCUG44/t3uzykmF9a1F pzVAg5SMZg4DMLB8JSLRVxjrQ8Qp3BKm8brO1MATgthzav1u0J2GgZ1Ug35UwDGMvvI7F0aPzH3 RVDGnjJPTDR7QqbHzzo+lHiFFh/vCcN7R32gpnz/lb/o3Dv7VK/6phS3aQk/qyLOlx4M0W48jWT UiLhubJJhywu6GxWFfWiYIcdxeAYltcq8BEkpq+DNn7hxZuPVnyP7RJYKkoDRpAEc9q64xIv5f5 ng7SYioulwjHw7MEOJ//M0jrcfxhNdZyaPXGdExX1qP5CYdGNNycwcn9L7PvFcdvheSNFqMwsWj k31NdlNqYZ27Wdg== X-Developer-Key: i=pabloyoyoista@postmarketos.org; a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez This is a pre-requisite to enable UART in sargo and bonito. Values for the pins have been taken from sdm845, and cross-checking dowstream, where available. Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 192 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 192 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index 30844b150c80..1c6c18a913a0 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1343,6 +1343,198 @@ qup_i2c15_default: qup-i2c15-default-state { function =3D "qup15"; }; =20 + qup_uart0_default: qup-uart0-default-state { + qup_uart0_tx: tx-pins { + pins =3D "gpio2"; + function =3D "qup0"; + }; + + qup_uart0_rx: rx-pins { + pins =3D "gpio3"; + function =3D "qup0"; + }; + }; + + qup_uart1_default: qup-uart1-default-state { + qup_uart1_tx: tx-pins { + pins =3D "gpio19"; + function =3D "qup1"; + }; + + qup_uart1_rx: rx-pins { + pins =3D "gpio20"; + function =3D "qup1"; + }; + }; + + qup_uart2_default: qup-uart2-default-state { + qup_uart2_tx: tx-pins { + pins =3D "gpio29"; + function =3D "qup2"; + }; + + qup_uart2_rx: rx-pins { + pins =3D "gpio30"; + function =3D "qup2"; + }; + }; + + qup_uart3_default: qup-uart3-default-state { + qup_uart3_tx: tx-pins { + pins =3D "gpio43"; + function =3D "qup3"; + }; + + qup_uart3_rx: rx-pins { + pins =3D "gpio44"; + function =3D "qup3"; + }; + }; + + qup_uart4_default: qup-uart4-default-state { + qup_uart4_tx: tx-pins { + pins =3D "gpio91"; + function =3D "qup4"; + }; + + qup_uart4_rx: rx-pins { + pins =3D "gpio92"; + function =3D "qup4"; + }; + }; + + qup_uart5_default: qup-uart5-default-state { + qup_uart5_tx: tx-pins { + pins =3D "gpio87"; + function =3D "qup5"; + }; + + qup_uart5_rx: rx-pins { + pins =3D "gpio88"; + function =3D "qup5"; + }; + }; + + qup_uart6_default: qup-uart6-default-state { + qup_uart6_tx: tx-pins { + pins =3D "gpio47"; + function =3D "qup6"; + }; + + qup_uart6_rx: rx-pins { + pins =3D "gpio48"; + function =3D "qup6"; + }; + }; + + qup_uart7_default: qup-uart7-default-state { + qup_uart7_tx: tx-pins { + pins =3D "gpio95"; + function =3D "qup7"; + }; + + qup_uart7_rx: rx-pins { + pins =3D "gpio96"; + function =3D "qup7"; + }; + }; + + qup_uart8_default: qup-uart8-default-state { + qup_uart8_tx: tx-pins { + pins =3D "gpio67"; + function =3D "qup8"; + }; + + qup_uart8_rx: rx-pins { + pins =3D "gpio68"; + function =3D "qup8"; + }; + }; + + qup_uart9_default: qup-uart9-default-state { + qup_uart9_tx: tx-pins { + pins =3D "gpio4"; + function =3D "qup9"; + }; + + qup_uart9_rx: rx-pins { + pins =3D "gpio5"; + function =3D "qup9"; + }; + }; + + qup_uart10_default: qup-uart10-default-state { + qup_uart10_tx: tx-pins { + pins =3D "gpio53"; + function =3D "qup10"; + }; + + qup_uart10_rx: rx-pins { + pins =3D "gpio54"; + function =3D "qup10"; + }; + }; + + qup_uart11_default: qup-uart11-default-state { + qup_uart11_tx: tx-pins { + pins =3D "gpio33"; + function =3D "qup11"; + }; + + qup_uart11_rx: rx-pins { + pins =3D "gpio34"; + function =3D "qup11"; + }; + }; + + qup_uart12_default: qup-uart12-default-state { + qup_uart12_tx: tx-pins { + pins =3D "gpio51"; + function =3D "qup12"; + }; + + qup_uart12_rx: rx-pins { + pins =3D "gpio52"; + function =3D "qup12"; + }; + }; + + qup_uart13_default: qup-uart13-default-state { + qup_uart13_tx: tx-pins { + pins =3D "gpio107"; + function =3D "qup13"; + }; + + qup_uart13_rx: rx-pins { + pins =3D "gpio108"; + function =3D "qup13"; + }; + }; + + qup_uart14_default: qup-uart14-default-state { + qup_uart14_tx: tx-pins { + pins =3D "gpio31"; + function =3D "qup14"; + }; + + qup_uart14_rx: rx-pins { + pins =3D "gpio32"; + function =3D "qup14"; + }; + }; + + qup_uart15_default: qup-uart15-default-state { + qup_uart15_tx: tx-pins { + pins =3D "gpio83"; + function =3D "qup15"; + }; + + qup_uart15_rx: rx-pins { + pins =3D "gpio84"; + function =3D "qup15"; + }; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins =3D "sdc1_clk"; --=20 2.54.0 From nobody Mon Jun 8 05:28:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C74232BF51; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-2-c5d51dd96ca0@postmarketos.org> References: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> In-Reply-To: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Acayan , ~postmarketos/upstreaming@lists.sr.ht, =?utf-8?q?Pablo_Correa_G=C3=B3mez?= , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1353; i=pabloyoyoista@postmarketos.org; h=from:subject:message-id; bh=PKWUit6YaDLgMvBcmHsB+WvICXOjhQdpimwGRlG8xpo=; b=owEBbQKS/ZANAwAKAXo0JWX/Y195AcsmYgBqHbmUCLYggOFkMCTXQ0wYBdLc819CRcZPTqLgY 7oHxZINky+JAjMEAAEKAB0WIQS9CheUSi6o/ykTCaJ6NCVl/2NfeQUCah25lAAKCRB6NCVl/2Nf eVsQEACrECCW94nloXYFpEm0NV4xmamMUONm1jvXlEEfxC1Ro87zxy0zbGEblDhJAxzKhm7fGxC 1QnFURUtywGdLlGlm3E5TUAv+dDmtLO/Cv5+QypEl9j35oalN7KxdZqwVAJS9OCLKM2bzRpnS3F hjOd404yIgcmJvymEqEk5bU82Wz1rQQQBd1ql8c+N99tWA+6U5/db8ySZm/RpXg+5EUlfDPeSk2 OOmtptzVR576LPfyhgzrfPvpbktEji13Mha8kQO4I1qMuWk3Q8yCyeTUJtM00+aPruzH3vQWDyR YGXESUhuDJe9q6e0XvCE/tidBUVT6qPwhj5TmoPPi7VTFUKTkDK2IjnCzI6AQ5XsXkB+a8TlTZ0 PhKDEpccAjXaaLL2lXyH/R4BU+jGSnBgjBFCmMqK4VIqqm2Nldqp3CHCZkaCJbez7c92qS8Eufk jtB/vK6huGTEYb+vVpOpVRfWVIYjMfoIHRcbgeksH0B5uRotvlQGuW1fg7aJdl6BEvBaLpOqroN PrFvR6amliX0a9fzD2ZmVXZNCNRfEXlQ+YQHxRAzK67wFIs6+Nfj5AYplPUq0fDfJ/gyE3dY/y0 1+iROmh9WFK8fl1Cq4iH6ChtYihOapj8NX/b9tN8x0oU1GOObEk7NaKPQocYnvSnCi94NrZsGJz vlV5HJLD9HQ2uEw== X-Developer-Key: i=pabloyoyoista@postmarketos.org; a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez Values are taken from the other geni nodes Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index 1c6c18a913a0..400d5d8ef9fa 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1060,6 +1060,21 @@ i2c12: i2c@a90000 { status =3D "disabled"; }; =20 + uart12: serial@a90000 { + compatible =3D "qcom,geni-debug-uart"; + reg =3D <0 0x00a90000 0 0x4000>; + clock-names =3D "se"; + clocks =3D <&gcc GCC_QUPV3_WRAP1_S4_CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&qup_uart12_default>; + interrupts =3D ; + power-domains =3D <&rpmhpd SDM670_CX>; + interconnects =3D <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_= 2 0>, + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>; + interconnect-names =3D "qup-core", "qup-config"; + status =3D "disabled"; + }; + i2c13: i2c@a94000 { compatible =3D "qcom,geni-i2c"; reg =3D <0 0x00a94000 0 0x4000>; --=20 2.54.0 From nobody Mon Jun 8 05:28:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63FAF36A023; Mon, 1 Jun 2026 16:55:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780332950; cv=none; b=TV76HftRF5jXZaKBEK77aMp5VsdYll48+lfWcB8h1yXIB1JkbHknGbw2dxziCeuVJVBhqDH0xpWA0rtjEN1jWcQrJAFRzoA91+7K17CUxrPVk6NdV0LvhHX7W7sfCfSUz8wNXdLhfr337PK4cZyagNdlHv4aaOfmfvMEG25fY4Y= ARC-Message-Signature: i=1; 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b=PUQxRjRUbtKJEFEtB6XHk5ZdpFNUU8CMFl9pHFec9+UhFp064Nq/NkfPb0SZTRsau w5seO8DS/mpYv5fpYslZAKRT5yVk58ofTDDkuMGLT2KZelcFAV+tgrBF6h2bmB6DbC LyMoltDsm0KPsuU4fRSm2Inros3q+RzG/j66uGICWRbmcJT7LXP5ACRlB8Eurg9r4M JYAM1fWWC7u8AhvNnyYSeJe8VaEotkT5zNecaHrA9OtudjHCkOkjaIBQqXo0o6klOy pxfeXV1tlg8xvE66z4xcHKeNy241yrOtyDE/+eytG1p7HmY+W6k6RkgD+OQ+KevdBb OgrEOkHElScNw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E18ECD6E5D; Mon, 1 Jun 2026 16:55:50 +0000 (UTC) From: =?utf-8?q?Pablo_Correa_G=C3=B3mez_via_B4_Relay?= Date: Mon, 01 Jun 2026 18:55:38 +0200 Subject: [PATCH v4 3/3] arm64: dts: qcom: sdm670-google-common: enable debug uart Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-3-c5d51dd96ca0@postmarketos.org> References: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> In-Reply-To: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v4-0-c5d51dd96ca0@postmarketos.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Acayan , ~postmarketos/upstreaming@lists.sr.ht, =?utf-8?q?Pablo_Correa_G=C3=B3mez?= , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; 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a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez This has been tested on the Pixel 3a with USB Cereal board Depends on https://lore.kernel.org/all/20260310002606.16413-5-mailingradian@gmail.com/ Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sdm670-google-common.dtsi index 0f57b915186b..711664c83b5f 100644 --- a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi @@ -26,7 +26,9 @@ /delete-node/ &gpu_mem; =20 / { - aliases { }; + aliases { + serial0 =3D &uart12; + }; =20 battery: battery { compatible =3D "simple-battery"; @@ -622,6 +624,16 @@ &qupv3_id_1 { status =3D "okay"; }; =20 +&qup_uart12_rx { + drive-strength =3D <2>; + bias-pull-up; +}; + +&qup_uart12_tx { + drive-strength =3D <2>; + bias-disable; +}; + &sdhc_1 { supports-cqe; mmc-hs200-1_8v; @@ -688,6 +700,10 @@ ts-switch-pins { }; }; =20 +&uart12 { + status =3D "okay"; +}; + &usb_1_hsphy { vdd-supply =3D <&vreg_l1b_0p925>; vdda-pll-supply =3D <&vreg_l10a_1p8>; --=20 2.54.0