From nobody Mon Jun 8 05:28:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FD4E3803E5; Mon, 1 Jun 2026 16:54:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780332854; cv=none; b=LEdAIoa1vNQhQh0SAQF7UnKQoN3bc5hZ86DmFxM1xoh1ioXNlVwvttQzsD1JXU0Q+rc79omjDjZknna0vJ2SA4o7S7K0d3ia+cmZ5f0gBRi7vEo24qBVLdcmWepdfvBEYFynplVfT3gkFeLSol0KKMsetMhrdhhUftOmwUqUk5c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780332854; c=relaxed/simple; bh=D7mea+sVvWgr4rVvw9qcM4R/RiRsHw1X+E3lNQDTdFs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YQgMyWi0/Z8wA6FdDzCfwlfY0yKvXPuMr/1yGkWCIFigBX/oOoDCbgzJsRlrhUp7BRO9axpO0vep2vFfx+RgIppK/OBrztTwFJufJURGwD8AOMQckbPnj2RRL2qLL0xH2tcjmLhXUPAMb563jHXV6g/40mMrgY2/mQHfS8J/5qE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=o1WB9YAz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="o1WB9YAz" Received: by smtp.kernel.org (Postfix) with ESMTPS id B894DC2BCC6; Mon, 1 Jun 2026 16:54:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780332853; bh=D7mea+sVvWgr4rVvw9qcM4R/RiRsHw1X+E3lNQDTdFs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=o1WB9YAzEN2QCGHCjv0/vNd1Unv2Vav/rNyQ3NrBriR+aCaJFfeYmpJQib3DrU3i5 CtyUwbSCevQsVSiYof+/PwYFc7pv/yyB2duuZJDM1nS2JUkCvShFFZKygVuNl67lrC jCR3Nw3QvCm0Vnb+30v3A7vMSQst6IJZYVY19Eg2pxd2V/VwfDYYe90BzgQUxAr3HY CoQZS/0UPUBCLIF0It4t8eGqmTsHkubTvnwPDpNSYfQ9/ypwpfw0vhqCYcmwSxaG/B P7zucbgCdgcemgstJiP5lSGsBaKQLQK/iY7WrsS+PSPhkWIUpKbw8rKtmxieBrGkF1 uVaJRD8eDa7ZA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B6E1CD6E55; Mon, 1 Jun 2026 16:54:13 +0000 (UTC) From: =?utf-8?q?Pablo_Correa_G=C3=B3mez_via_B4_Relay?= Date: Mon, 01 Jun 2026 18:54:00 +0200 Subject: [PATCH v3 1/3] arm64: dts: qcom: sdm670: add default uart pinctrl nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-1-6fdcd669364e@postmarketos.org> References: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-0-6fdcd669364e@postmarketos.org> In-Reply-To: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-0-6fdcd669364e@postmarketos.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Acayan , ~postmarketos/upstreaming@lists.sr.ht, =?utf-8?q?Pablo_Correa_G=C3=B3mez?= X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4680; i=pabloyoyoista@postmarketos.org; h=from:subject:message-id; bh=MsvdWsmedbXe2xM8qbb5uDnLO53eFeUuF5Xokz2VAkA=; b=owEBbQKS/ZANAwAKAXo0JWX/Y195AcsmYgBqHbk0YjoQjyloymB/7fvnJy2jVIYCAJCbI70oi MK5KEPlN+uJAjMEAAEKAB0WIQS9CheUSi6o/ykTCaJ6NCVl/2NfeQUCah25NAAKCRB6NCVl/2Nf eUOUEACowkYCM3+NfDA2qf4y5iiRoa2EFQVSsyqEfMHw0G5gB6CoqvpOZ4RTyQxizcoQ5BszWca Yd2WnJ1nF08mFd3FeLl8fuBVfac/+O0lmbWNw3KsHhflzRhK8E4HxUe0vq60xuYDE/uTjIcOIFU wqwyqKlhyRNrAT2XQsOq0gt6Ut6unbODFZHqBAnducdnroVLzVku97FtOKKqEMvFdqedxKc3LMZ XVmOcF5gAefJd6aVlHsLWtfrvOVGRF2x50vzSJC/RDQjLxcriaNr6va5KtdrmgAazv41pDYd0rW rSrbJoS7SUmJRxzAP5bR6HWbQUQXmEYC3mT8Can1E+kFbTEmqGH6evQPc2YBD39rermS13uRQUG 8ASw4KVQIQUhi93m5SpcwgRmL075enTcuNHNtiQLT0lca1RCT/5NVlmOLkh3zSCBxVn2wtn3ehR 3+yiTg/nj2lD+rMkG+keK7EFbYVIPHOBOnqcX/agcTANG2dQXWgXPP3jTtRmAttAC58t3i8w2oF 0vXbzohx/34fvPgnQwcvh3S1QcfODtjNjE61iAgXSi1ypYQwk+xZJEPECi03xMghBn5RC64C5Nj xzkLD/s8KoZ/lFkyhxcnbJPIfjpYMToz6hXfJIrCwy+56RDlDF3ECMg0N2Xp7K1RkQTK3TOAgXQ ItYqezi2KoXA2Jg== X-Developer-Key: i=pabloyoyoista@postmarketos.org; a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez This is a pre-requisite to enable UART in sargo and bonito. Values for the pins have been taken from sdm845, and cross-checking dowstream, where available. Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 192 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 192 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index 30844b150c80..1c6c18a913a0 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1343,6 +1343,198 @@ qup_i2c15_default: qup-i2c15-default-state { function =3D "qup15"; }; =20 + qup_uart0_default: qup-uart0-default-state { + qup_uart0_tx: tx-pins { + pins =3D "gpio2"; + function =3D "qup0"; + }; + + qup_uart0_rx: rx-pins { + pins =3D "gpio3"; + function =3D "qup0"; + }; + }; + + qup_uart1_default: qup-uart1-default-state { + qup_uart1_tx: tx-pins { + pins =3D "gpio19"; + function =3D "qup1"; + }; + + qup_uart1_rx: rx-pins { + pins =3D "gpio20"; + function =3D "qup1"; + }; + }; + + qup_uart2_default: qup-uart2-default-state { + qup_uart2_tx: tx-pins { + pins =3D "gpio29"; + function =3D "qup2"; + }; + + qup_uart2_rx: rx-pins { + pins =3D "gpio30"; + function =3D "qup2"; + }; + }; + + qup_uart3_default: qup-uart3-default-state { + qup_uart3_tx: tx-pins { + pins =3D "gpio43"; + function =3D "qup3"; + }; + + qup_uart3_rx: rx-pins { + pins =3D "gpio44"; + function =3D "qup3"; + }; + }; + + qup_uart4_default: qup-uart4-default-state { + qup_uart4_tx: tx-pins { + pins =3D "gpio91"; + function =3D "qup4"; + }; + + qup_uart4_rx: rx-pins { + pins =3D "gpio92"; + function =3D "qup4"; + }; + }; + + qup_uart5_default: qup-uart5-default-state { + qup_uart5_tx: tx-pins { + pins =3D "gpio87"; + function =3D "qup5"; + }; + + qup_uart5_rx: rx-pins { + pins =3D "gpio88"; + function =3D "qup5"; + }; + }; + + qup_uart6_default: qup-uart6-default-state { + qup_uart6_tx: tx-pins { + pins =3D "gpio47"; + function =3D "qup6"; + }; + + qup_uart6_rx: rx-pins { + pins =3D "gpio48"; + function =3D "qup6"; + }; + }; + + qup_uart7_default: qup-uart7-default-state { + qup_uart7_tx: tx-pins { + pins =3D "gpio95"; + function =3D "qup7"; + }; + + qup_uart7_rx: rx-pins { + pins =3D "gpio96"; + function =3D "qup7"; + }; + }; + + qup_uart8_default: qup-uart8-default-state { + qup_uart8_tx: tx-pins { + pins =3D "gpio67"; + function =3D "qup8"; + }; + + qup_uart8_rx: rx-pins { + pins =3D "gpio68"; + function =3D "qup8"; + }; + }; + + qup_uart9_default: qup-uart9-default-state { + qup_uart9_tx: tx-pins { + pins =3D "gpio4"; + function =3D "qup9"; + }; + + qup_uart9_rx: rx-pins { + pins =3D "gpio5"; + function =3D "qup9"; + }; + }; + + qup_uart10_default: qup-uart10-default-state { + qup_uart10_tx: tx-pins { + pins =3D "gpio53"; + function =3D "qup10"; + }; + + qup_uart10_rx: rx-pins { + pins =3D "gpio54"; + function =3D "qup10"; + }; + }; + + qup_uart11_default: qup-uart11-default-state { + qup_uart11_tx: tx-pins { + pins =3D "gpio33"; + function =3D "qup11"; + }; + + qup_uart11_rx: rx-pins { + pins =3D "gpio34"; + function =3D "qup11"; + }; + }; + + qup_uart12_default: qup-uart12-default-state { + qup_uart12_tx: tx-pins { + pins =3D "gpio51"; + function =3D "qup12"; + }; + + qup_uart12_rx: rx-pins { + pins =3D "gpio52"; + function =3D "qup12"; + }; + }; + + qup_uart13_default: qup-uart13-default-state { + qup_uart13_tx: tx-pins { + pins =3D "gpio107"; + function =3D "qup13"; + }; + + qup_uart13_rx: rx-pins { + pins =3D "gpio108"; + function =3D "qup13"; + }; + }; + + qup_uart14_default: qup-uart14-default-state { + qup_uart14_tx: tx-pins { + pins =3D "gpio31"; + function =3D "qup14"; + }; + + qup_uart14_rx: rx-pins { + pins =3D "gpio32"; + function =3D "qup14"; + }; + }; + + qup_uart15_default: qup-uart15-default-state { + qup_uart15_tx: tx-pins { + pins =3D "gpio83"; + function =3D "qup15"; + }; + + qup_uart15_rx: rx-pins { + pins =3D "gpio84"; + function =3D "qup15"; + }; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins =3D "sdc1_clk"; --=20 2.54.0 From nobody Mon Jun 8 05:28:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FC9D342CB3; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-2-6fdcd669364e@postmarketos.org> References: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-0-6fdcd669364e@postmarketos.org> In-Reply-To: <20260601-pabloyoyoista-debug-uart-on-rdacayan-next-v3-0-6fdcd669364e@postmarketos.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Acayan , ~postmarketos/upstreaming@lists.sr.ht, =?utf-8?q?Pablo_Correa_G=C3=B3mez?= X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1225; i=pabloyoyoista@postmarketos.org; h=from:subject:message-id; bh=JzKTYUEefOAcoUIPc27fvI4pDnEWLK8q2Pnup39DT4k=; b=owEBbQKS/ZANAwAKAXo0JWX/Y195AcsmYgBqHbk0idKve1dNITkXnG8/S7YicfHiY4hXiJlpn nnCE8/uvICJAjMEAAEKAB0WIQS9CheUSi6o/ykTCaJ6NCVl/2NfeQUCah25NAAKCRB6NCVl/2Nf ea7VD/9VKktIUQVqXohpZHaa8Nz7vFEow8oRae4KquiUJ+MvpBoitZ1fHJ2Y2kxGk5T0CuFwkFB dwkWN8rN2Mv54BFUE6oxb/rjTso6O0zyvIhJXL9R8zsONtjJM5540FpHs7bvNPHyLyxJnw+uMSe 1abq2ZICiyDJ2VzxF6yxzhmpmQt9HHVmVUBfoe0fsAzafVQAJeSRkSq2y+kR9x7I2EyjWMXQZKp L5FUw1PXBnB8h3VdN+tKbXhIyyrZYpzT9WCAFXxxtRwbOvKYHqGgBZUNk2Ywni+3rL/kzNfCooR 1xMyD26ZqCgMS2DaejyfvXr4FCL0H6SvTl/qUEx8vw0fGn1DfdU74Qb21JP+aDC8pJ6Uap8UdWQ XnQf7kDJ0Zs6zffYATgbDffTdTN8XIVHfVr5HvoZEk39sMbJs6BJO6JaZYSet+TzDFGlFlnp2vi mX1RThQd4kLjzzYhHLUsPaWoa3wT0MlFeTmpehhkqvO8taASD0UPvzLYvhHkpFxnARmTjyiWqu/ 9QBUjFoXvX6rcxNTW/krVRzQWrErMYYJpb66AXFxHNa4m0Ztk7k8dGETu+oUzWrRDpyoigCNECW CaZognqqtg5UvKf0mgUdPpztRoOctExGbdhmkC6RAJDKscRqIegh2Vci4rpr5fxdC8wJUBLwiyu gVCfK9YAb6v4Bgw== X-Developer-Key: i=pabloyoyoista@postmarketos.org; a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez Values are taken from the other geni nodes Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index 1c6c18a913a0..400d5d8ef9fa 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1060,6 +1060,21 @@ i2c12: i2c@a90000 { status =3D "disabled"; }; =20 + uart12: serial@a90000 { + compatible =3D "qcom,geni-debug-uart"; + reg =3D <0 0x00a90000 0 0x4000>; + clock-names =3D "se"; + clocks =3D <&gcc GCC_QUPV3_WRAP1_S4_CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&qup_uart12_default>; + interrupts =3D ; + power-domains =3D <&rpmhpd SDM670_CX>; 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a=openpgp; fpr=BD0A17944A2EA8FF291309A27A342565FF635F79 X-Endpoint-Received: by B4 Relay for pabloyoyoista@postmarketos.org/default with auth_id=698 X-Original-From: =?utf-8?q?Pablo_Correa_G=C3=B3mez?= Reply-To: pabloyoyoista@postmarketos.org From: Pablo Correa G=C3=B3mez This has been tested on the Pixel 3a with USB Cereal board Depends on https://lore.kernel.org/all/20260310002606.16413-5-mailingradian@gmail.com/ Signed-off-by: Pablo Correa G=C3=B3mez --- arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sdm670-google-common.dtsi index 0f57b915186b..711664c83b5f 100644 --- a/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi @@ -26,7 +26,9 @@ /delete-node/ &gpu_mem; =20 / { - aliases { }; + aliases { + serial0 =3D &uart12; + }; =20 battery: battery { compatible =3D "simple-battery"; @@ -622,6 +624,16 @@ &qupv3_id_1 { status =3D "okay"; }; =20 +&qup_uart12_rx { + drive-strength =3D <2>; + bias-pull-up; +}; + +&qup_uart12_tx { + drive-strength =3D <2>; + bias-disable; +}; + &sdhc_1 { supports-cqe; mmc-hs200-1_8v; @@ -688,6 +700,10 @@ ts-switch-pins { }; }; =20 +&uart12 { + status =3D "okay"; +}; + &usb_1_hsphy { vdd-supply =3D <&vreg_l1b_0p925>; vdda-pll-supply =3D <&vreg_l10a_1p8>; --=20 2.54.0