From nobody Mon Jun 8 06:38:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C1F036165E; Mon, 1 Jun 2026 13:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780319953; cv=none; b=ipwvmk3bPbJdifAJFoDgF9Jvl4IkYxOkfvxatpNKmaBmfR/S3Ba1HiPhvdupSzc9/pea3eAbKhPi/j6Maat/6JyejL5/ad1KDv4dUIzEa2EQAkW4jyk+sOimA2y3c/hsjqXTEwnjodKWriH9ydYzJKSGHNYyXMmc7FBUO72wiiE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780319953; c=relaxed/simple; bh=xmmXh5VfQ03Uq105T8eVuLJq94x7v2GCR2zR/xJLGgs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iPMUTChhxGPhXOkWz7SFMNNqd4JWdrB0riDeIY1gpu1AochFMUa8qS9HlVWXcMznmCp1gUD3P4oHe5mQAHCcfJFoyqWDqL9i9W+j6o+IRXaLsHVCXA17CKWauwxicVJ3rpP8Y+edStE4GQZ/z9UA9wQ6w5Yp4lTV3q+HY9VWsR8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=smBOMuy4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="smBOMuy4" Received: by smtp.kernel.org (Postfix) with ESMTPS id E025AC2BCC6; Mon, 1 Jun 2026 13:19:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780319953; bh=xmmXh5VfQ03Uq105T8eVuLJq94x7v2GCR2zR/xJLGgs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=smBOMuy4q7WXgh4FSqbZnETpAV9FUCBQNuLhbrSrjddK+FAjCe5KM3oNYmEoDo3t1 VBffP6eUoyssbRwsSdEBbEXdh0xVjv469LPstwJK/Ckb7Zl8NLpBD8wtHkfEGGLk4t f5B253PZ9QTaNtkR01MGr3NvzNuU24aSG0M/muW5OR04KSxDUAIqPEO+CI1h0jTuf8 o6z3kTFpUIQoH6pZ4wl6IyeDSjdhWMizC36JwJ6GxeXn1qI91b7K/qVkF1yltJR+s3 kXilCMleLyZotxRG1UrlUTpF0oIqoI97FfxNPMxVes1IyfroaR3dQ+H5pZjdxd9MFM 1jw218qIvA2wQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4D40CD6E57; Mon, 1 Jun 2026 13:19:12 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 01 Jun 2026 17:19:08 +0400 Subject: [PATCH 1/3] dt-bindings: net: qca,ipq5018: Split IPQ5018 PHY bindings from ar803x Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-ipq5018-gephy-clocks-v1-1-2df8287712c3@outlook.com> References: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> In-Reply-To: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780319950; l=4946; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=zsshv5XwQ6s+2bhZxuItk5jzaYFbE1IDzznh2Ip/hvg=; b=l/HtaEnkoaMuqY27S6XK3iW/CtF8Y5Lumxm6quNMv57kyg72AeNvJssVOdckwf8TZ//qPOpPg Gn8NB0CNlcaAQ/G/6m2dgIUeOTeHsdvwjsTLLT3rghcKnQIOF4OHipd X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Move the definition for the Qualcomm IPQ5018 Internal PHY out of the qca,ar803x.yaml binding file and isolate them in a dedicated qca,ipq5018.yaml file. This is necessary due to the restriction of max one clock in ethernet-phy.yaml which ar803x references as further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. Signed-off-by: George Moussalem --- .../devicetree/bindings/net/qca,ar803x.yaml | 43 ------------- .../devicetree/bindings/net/qca,ipq5018.yaml | 75 ++++++++++++++++++= ++++ 2 files changed, 75 insertions(+), 43 deletions(-) diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Docume= ntation/devicetree/bindings/net/qca,ar803x.yaml index 7ae5110e7aa2..3acd09f0da86 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -16,37 +16,8 @@ description: | =20 allOf: - $ref: ethernet-phy.yaml# - - if: - properties: - compatible: - contains: - enum: - - ethernet-phy-id004d.d0c0 - - then: - properties: - reg: - const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 = SoC - - resets: - items: - - description: - GE PHY MISC reset which triggers a reset across MDC, DSP, = RX, and TX lines. - - qcom,dac-preset-short-cable: - description: - Set if this phy is connected to another phy to adjust the valu= es for - MDAC and EDAC to adjust amplitude, bias current settings, and = error - detection and correction algorithm to accommodate for short ca= ble length. - If not set, DAC values are not modified and it is assumed the = MDI output pins - of this PHY are directly connected to an RJ45 connector. - type: boolean =20 properties: - compatible: - enum: - - ethernet-phy-id004d.d0c0 - qca,clk-out-frequency: description: Clock output frequency in Hertz. $ref: /schemas/types.yaml#/definitions/uint32 @@ -161,17 +132,3 @@ examples: }; }; }; - - | - #include - - mdio { - #address-cells =3D <1>; - #size-cells =3D <0>; - - ge_phy: ethernet-phy@7 { - compatible =3D "ethernet-phy-id004d.d0c0"; - reg =3D <7>; - - resets =3D <&gcc GCC_GEPHY_MISC_ARES>; - }; - }; diff --git a/Documentation/devicetree/bindings/net/qca,ipq5018.yaml b/Docum= entation/devicetree/bindings/net/qca,ipq5018.yaml new file mode 100644 index 000000000000..7cdc96f6d389 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qca,ipq5018.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qca,ipq5018.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Atheros IPQ5018 Internal PHY + +maintainers: + - George Moussalem + +description: | + The IPQ5018 PHY is part of the IPQ5018 SoC and is always wired to GMAC0. + The PHY supports 10/100/1000 mbps link modes, CDT, auto-negotiation and + 802.3az EEE. + +properties: + compatible: + const: ethernet-phy-id004d.d0c0 + + reg: + const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC + + clocks: + items: + - description: RX clock + - description: TX clock + + clock-names: + items: + - const: rx + - const: tx + + resets: + items: + - description: + GE PHY MISC reset which triggers a reset across MDC, DSP, RX, an= d TX lines. + + qcom,dac-preset-short-cable: + description: | + Set if this phy is connected to another phy to adjust the values for + MDAC and EDAC to adjust amplitude, bias current settings, and error + detection and correction algorithm to accommodate for short cable le= ngth. + If not set, DAC values are not modified and it is assumed the MDI ou= tput pins + of this PHY are directly connected to an RJ45 connector. + type: boolean + +required: + - compatible + - reg + - clocks + - clock-names + - resets + +additionalProperties: false + +examples: + - | + #include + #include + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ge_phy: ethernet-phy@7 { + compatible =3D "ethernet-phy-id004d.d0c0"; + reg =3D <7>; + + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; + resets =3D <&gcc GCC_GEPHY_MISC_ARES>; + }; + }; --=20 2.53.0 From nobody Mon Jun 8 06:38:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D1FD376A05; Mon, 1 Jun 2026 13:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780319953; cv=none; b=KlAddsSyoYMkRwIBR2pwYafcx6n6yxQrs3N1b7z1LBSzLQYSjOIIW1IU3XPjTkt8tgLDMxfB8p4fC69aRF6G07KosJrfm6qLOuxJG6M6Fbo7LFxQZeKqUdtGhCp54sj1Z6LUbSZnBTPLwYEYCUoMF8KpPVPdFuMyqUDZTt33nHk= ARC-Message-Signature: i=1; a=rsa-sha256; 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b=WeqAE2IOxUvZ9Khuc4yNKnzcHsCffjHLuZkR0PevFGBJz74FbvYzBW/YbWXvMtdJ1 ucAVsL0Z51NZDl0Z+Bd3opDwXMKQnycqqN+8Z6R/tmgdi1SNydtdA2FfU0sIbRBGXh SkLuxKuGcfh1hdczOWwaDwn4QZDEj2ArTcJdF6CkV1hQ3dmXUTIzgWvlnclSs/zvbr aRFBeyiCmJgErYrMXpAOC1V0AzPJt8jVB0f7cD2ujeGfdOIXkMb/OskhIDgVXeNRnl BHzPmYGozX2Ighyoxj0HVICPHeTj/rRwRpusHieQBNA47ryWdz90UN6mYeOCV2y+BO Ytz+AIRJPzA9w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF65BCD5BD1; Mon, 1 Jun 2026 13:19:12 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 01 Jun 2026 17:19:09 +0400 Subject: [PATCH 2/3] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-ipq5018-gephy-clocks-v1-2-2df8287712c3@outlook.com> References: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> In-Reply-To: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780319950; l=821; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=ZUcDzKT3pAn1GyMp8FWZKORP9V8n09/s7Z10uOma/1w=; b=JqFr7y43SPRkIzRRff/Vc9u8059ar/Vq4NriBUp+X1yEWQvaAQjk/FokPlT2yIWNPlQmoq4wH Huriw7ZpG+jA9mAvOl8P+VkuG8sVD/mGXL5eSfyy9Pas36Agxp97MP9 X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add RX and TX clocks for the IPQ5018 GEPHY to enable the datapath. Fixes: f5f2b835e316 ("arm64: dts: qcom: ipq5018: Add GE PHY to internal mdi= o bus") Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 6f8004a22a1f..60c27a6f2b10 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -229,6 +229,9 @@ ge_phy: ethernet-phy@7 { compatible =3D "ethernet-phy-id004d.d0c0"; reg =3D <7>; =20 + clocks =3D <&gcc GCC_GEPHY_RX_CLK>, + <&gcc GCC_GEPHY_TX_CLK>; + clock-names =3D "rx", "tx"; resets =3D <&gcc GCC_GEPHY_MISC_ARES>; }; }; --=20 2.53.0 From nobody Mon Jun 8 06:38:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D0E4361667; Mon, 1 Jun 2026 13:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780319953; cv=none; b=MhQ69PR7Sl0Wolo6iQVuy476Z81kgSrRTi9JyaRawE6hAxMHw/hLqhcIVQxC9v47iHzScZTKMrJ9c5wurn+GoyGfo0nJhRhCZjhVKMP0dAwhymzl7uY+pUE0A87EA+3fiUP4CTcBdMlYVzzJunzfCCeM0OGPugbA31i+TJzsPgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780319953; c=relaxed/simple; bh=QG4Z1lJud/2m0d4pUKcPCuFCd9HmCmJz7ekPrVHzQfQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TewIUvhIfeRgmeaPCkhTpiIjvBs5gnbNutE6irJVHI27/FUpp42j5d0bASSNVmwxVVc2NBq2plW1HCkhiVyPdo0DFWMMogxd5i0KxQsGB31FDRtPGnS8X2hBVOujHAN3OXYWTEnUUUHVZkAMptLOSn0Sawue8slpUB53UEUlG4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lyTYEJcf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lyTYEJcf" Received: by smtp.kernel.org (Postfix) with ESMTPS id 12871C2BCFB; Mon, 1 Jun 2026 13:19:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1780319953; bh=QG4Z1lJud/2m0d4pUKcPCuFCd9HmCmJz7ekPrVHzQfQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lyTYEJcf0znSNvYI5iUXHNfcy4IKKsCG4Wb0kAG4SaTpVAqTdqZuoV/MVgPIJAusw tKp/ubcIwITADIuqFVk/17z5bkUgS6/immX7G/FBAA6u+LRHK3AyGOln1NQ6u0s2iq Voqes7gge/v1i7J/npqzQTPSwIAiw9XC74erTyH7ncNisyk7ajyrADRf0W2qVmdkmF 2GpTqsM0P4pn6HsjmjThHVwBodmDruX8AQ13nuXC0sU461WUkXqbU6mfqEEDAmsZOo eCcmqO65lEb+3XZHA4X8p6Wc+0yo1eVIoo+VLzrABYJ/jUp63sXGHhWTDMrI87naag eguWlo3IZh5TQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03AE3CD6E64; Mon, 1 Jun 2026 13:19:13 +0000 (UTC) From: George Moussalem via B4 Relay Date: Mon, 01 Jun 2026 17:19:10 +0400 Subject: [PATCH 3/3] net: phy: qca,at803x: add RX and TX clock management for IPQ5018 PHY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260601-ipq5018-gephy-clocks-v1-3-2df8287712c3@outlook.com> References: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> In-Reply-To: <20260601-ipq5018-gephy-clocks-v1-0-2df8287712c3@outlook.com> To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Bjorn Andersson , Konrad Dybcio Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , linux-arm-msm@vger.kernel.org, George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1780319950; l=2335; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=k3J1uSCRHsxM9xs2etq4AynajTAyY7ew0xbYTGGX5vo=; b=T1QR/m5s94c/CPkXHvBNE2KhtPL7PM1qxAywEQga6mFxr+JUiu9n+jBVP6FSfepUu5C0nvxuv pu3taMBlZx8CHsA39HzlvDSNypDiHadRKmlsOptmUKgoPNigkbaDPgl X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Acquire and enable the RX and TX clocks for the IPQ5018 PHY. These clocks are required for the PHY's datapath to function correctly. In addition, gate the clocks upon link state changes for improved power management. Fixes: d46502279a11 ("net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal= PHY support") Signed-off-by: George Moussalem --- drivers/net/phy/qcom/at803x.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c index 63726cf98cd4..b7361a14220d 100644 --- a/drivers/net/phy/qcom/at803x.c +++ b/drivers/net/phy/qcom/at803x.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -176,6 +177,8 @@ struct at803x_context { }; =20 struct ipq5018_priv { + struct clk *rx_clk; + struct clk *tx_clk; struct reset_control *rst; bool set_short_cable_dac; }; @@ -1062,6 +1065,16 @@ static int ipq5018_config_init(struct phy_device *ph= ydev) =20 static void ipq5018_link_change_notify(struct phy_device *phydev) { + struct ipq5018_priv *priv =3D phydev->priv; + + if (phydev->link) { + clk_enable(priv->rx_clk); + clk_enable(priv->tx_clk); + } else { + clk_disable(priv->rx_clk); + clk_disable(priv->tx_clk); + } + /* * Reset the FIFO buffer upon link disconnects to clear any residual data * which may cause issues with the FIFO which it cannot recover from. @@ -1084,6 +1097,16 @@ static int ipq5018_probe(struct phy_device *phydev) priv->set_short_cable_dac =3D of_property_read_bool(dev->of_node, "qcom,dac-preset-short-cable"); =20 + priv->rx_clk =3D devm_clk_get_enabled(dev, "rx"); + if (IS_ERR(priv->rx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->rx_clk), + "failed to get and enable RX clock\n"); + + priv->tx_clk =3D devm_clk_get_enabled(dev, "tx"); + if (IS_ERR(priv->tx_clk)) + return dev_err_probe(dev, PTR_ERR(priv->tx_clk), + "failed to get and enable TX clock\n"); + priv->rst =3D devm_reset_control_array_get_exclusive(dev); if (IS_ERR(priv->rst)) return dev_err_probe(dev, PTR_ERR(priv->rst), --=20 2.53.0