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[171.5.11.114]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-842498819e3sm404181b3a.34.2026.05.30.23.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 May 2026 23:57:56 -0700 (PDT) Sender: Julian Braha From: Julian Braha To: tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org Cc: hpa@zytor.com, linux-kernel@vger.kernel.org, Julian Braha Subject: [PATCH] x86/cpu: cleanup duplicate dependencies in Kconfig Date: Sun, 31 May 2026 07:57:43 +0100 Message-ID: <20260531065743.1408481-1-julianbraha@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Kconfig in the choice menu already has an 'if X86' affecting all of the config options within the choice, meaning that each of the individual 'depends on' statements in this file is a duplicate dependency (dead code). Let's leave the initial 'depends on X86_32' in the choice menu, and remove the individual dependencies from each option. This dead code was found by kconfirm, a static analysis tool for Kconfig. Signed-off-by: Julian Braha --- arch/x86/Kconfig.cpu | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 1377edd9a997..36c8007c1559 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -45,21 +45,18 @@ choice =20 config M586TSC bool "Pentium-Classic" - depends on X86_32 help Select this for a Pentium Classic processor with the RDTSC (Read Time Stamp Counter) instruction for benchmarking. =20 config M586MMX bool "Pentium-MMX" - depends on X86_32 help Select this for a Pentium with the MMX graphics/multimedia extended instructions. =20 config M686 bool "Pentium-Pro" - depends on X86_32 help Select this for Intel Pentium Pro chips. This enables the use of Pentium Pro extended instructions, and disables the init-time guard @@ -67,7 +64,6 @@ config M686 =20 config MPENTIUMII bool "Pentium-II/Celeron(pre-Coppermine)" - depends on X86_32 help Select this for Intel chips based on the Pentium-II and pre-Coppermine Celeron core. This option enables an unaligned @@ -77,7 +73,6 @@ config MPENTIUMII =20 config MPENTIUMIII bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" - depends on X86_32 help Select this for Intel chips based on the Pentium-III and Celeron-Coppermine core. This option enables use of some @@ -86,14 +81,12 @@ config MPENTIUMIII =20 config MPENTIUMM bool "Pentium M/Pentium Dual Core/Core Solo/Core Duo" - depends on X86_32 help Select this for Intel Pentium M (not Pentium-4 M) "Merom" Core Solo/Duo notebook chips =20 config MPENTIUM4 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" - depends on X86_32 help Select this for Intel Pentium 4 chips. This includes the Pentium 4, Pentium D, P4-based Celeron and Xeon, and @@ -117,7 +110,6 @@ config MPENTIUM4 =20 config MK6 bool "K6/K6-II/K6-III" - depends on X86_32 help Select this for an AMD K6-family processor. Enables use of some extended instructions, and passes appropriate optimization @@ -125,7 +117,6 @@ config MK6 =20 config MK7 bool "Athlon/Duron/K7" - depends on X86_32 help Select this for an AMD Athlon K7-family processor. Enables use of some extended instructions, and passes appropriate optimization @@ -133,7 +124,6 @@ config MK7 =20 config MCRUSOE bool "Crusoe" - depends on X86_32 help Select this for a Transmeta Crusoe processor. Treats the processor like a 586 with TSC, and sets some GCC optimization flags (like a @@ -141,25 +131,21 @@ config MCRUSOE =20 config MEFFICEON bool "Efficeon" - depends on X86_32 help Select this for a Transmeta Efficeon processor. =20 config MGEODEGX1 bool "GeodeGX1" - depends on X86_32 help Select this for a Geode GX1 (Cyrix MediaGX) chip. =20 config MGEODE_LX bool "Geode GX/LX" - depends on X86_32 help Select this for AMD Geode GX and LX processors. =20 config MCYRIXIII bool "CyrixIII/VIA-C3" - depends on X86_32 help Select this for a Cyrix III or C3 chip. Presently Linux and GCC treat this chip as a generic 586. Whilst the CPU is 686 class, @@ -171,7 +157,6 @@ config MCYRIXIII =20 config MVIAC3_2 bool "VIA C3-2 (Nehemiah)" - depends on X86_32 help Select this for a VIA C3 "Nehemiah". Selecting this enables usage of SSE and tells gcc to treat the CPU as a 686. @@ -179,7 +164,6 @@ config MVIAC3_2 =20 config MVIAC7 bool "VIA C7" - depends on X86_32 help Select this for a VIA C7. Selecting this uses the correct cache shift and tells gcc to treat the CPU as a 686. --=20 2.54.0