From nobody Mon Jun 8 11:01:53 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71CC9421EFB for ; Fri, 29 May 2026 19:04:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081449; cv=none; b=GG+Oa5WkGQd74JU2NMF/xc3TKLO/Jjpl5KNokmKDaI8A4UjiWWXMmx/cAJm+jopjrqT/j4/4E7479Jwx0dxPUMc00tn54P4eUzSQ9ceukQAyENQHbZmBX9/U3txnobQiTryyvmKCuZElpQnz9Oyp9UJvsgJuWtJv3jh8PvoV1ow= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081449; c=relaxed/simple; bh=zSdkao+E+mbJKqVm1QfkfZoavLXz9QKvvoTnB02qL0o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JfCVBhw+/BtBtaO8H71yBOasdLLf1JNbThimbNyqQRLdtJLileHFAZ06+0i+yXwmRWWIXpbUbwXnC+qs64dGVQpQwL8R2RUuhJeF/j5NKqToTtZaHkfanuwLuFuDkQfTcPXbLJfSsBtM8f6ssRMb0i+raVDrQZvhUrmpxVE0cdo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=u1Yd0D/u; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="u1Yd0D/u" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=iVdbJHhjSmD5Wk53U97PpC2LZja+TnFLISVdSMujlOg=; b=u1Yd0D/uA4P6C4V+/NYXNIkp2C 5KmcSai1P98PRmy42DVQ/KSjVdpbwLoR9IjnH0KvDl6+MevRdhERRA/9/EJ9QrRDmaFtQf3m3ajJj j/RZWOzjncZB21m4nNz0x11LBSx1g1cpEGbu0dpDSClX58/ceisS+xnmZdk12pPd9Ej1CERmhmIbZ 6W5DSjHXGucEjLWf3NzThJ5uKu0JGNhOEJxM1NWWzwtm9pUvgWkgS3WP29jxqJrxU5EhDy36WaYkx TRDiXIXp/L1wWGdtY0VDLOkx0s/WCqRffmabul3p0T5nI+t3/SJ8hcAdRZOOZvfmsyfnZ0jKF1M0c /gAmS02w==; From: Heiko Stuebner To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, amadeus@jmu.edu.cn, jonas@kwiboo.se Subject: [PATCH v4 1/5] arm64: dts: rockchip: Add USB nodes for RK3528 Date: Fri, 29 May 2026 21:03:51 +0200 Message-ID: <20260529190355.4148175-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260529190355.4148175-1-heiko@sntech.de> References: <20260529190355.4148175-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman Rockchip RK3528 has one USB 3.0 DWC3 controller and oneUSB 2.0 EHCI/OHCI controller and uses an Innosilicon-USB2PHY for USB 2.0. The DWC3 controller additionally uses the Naneng Combo PHY for USB3. Add device tree nodes to describe these USB controllers along with the USB 2.0 PHYs. Signed-off-by: Jonas Karlman [moved snps,dis_u2_susphy_quirk here from individual boards, describe both usb2+3 default phy connections, usb2 boards can override] Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 80 ++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index 77d314716b43..03cd00f88dbb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -336,6 +336,33 @@ pcie_intc: legacy-interrupt-controller { }; }; =20 + usb_host0_xhci: usb@fe500000 { + compatible =3D "rockchip,rk3528-dwc3", "snps,dwc3"; + reg =3D <0x0 0xfe500000 0x0 0x400000>; + clocks =3D <&cru CLK_REF_USB3OTG>, + <&cru CLK_SUSPEND_USB3OTG>, + <&cru ACLK_USB3OTG>; + clock-names =3D "ref_clk", "suspend_clk", "bus_clk"; + interrupts =3D ; + power-domains =3D <&power RK3528_PD_VPU>; + resets =3D <&cru SRST_A_USB3OTG>; + dr_mode =3D "otg"; + phys =3D <&usb2phy_otg>, <&combphy PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + phy_type =3D "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis_rxdet_inp3_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis_u2_susphy_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status =3D "disabled"; + }; + gic: interrupt-controller@fed01000 { compatible =3D "arm,gic-400"; reg =3D <0x0 0xfed01000 0 0x1000>, @@ -349,6 +376,30 @@ gic: interrupt-controller@fed01000 { #interrupt-cells =3D <3>; }; =20 + usb_host0_ehci: usb@ff100000 { + compatible =3D "generic-ehci"; + reg =3D <0x0 0xff100000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts =3D ; + phys =3D <&usb2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + + usb_host0_ohci: usb@ff140000 { + compatible =3D "generic-ohci"; + reg =3D <0x0 0xff140000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts =3D ; + phys =3D <&usb2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + qos_crypto_a: qos@ff200000 { compatible =3D "rockchip,rk3528-qos", "syscon"; reg =3D <0x0 0xff200000 0x0 0x20>; @@ -1281,6 +1332,35 @@ combphy: phy@ffdc0000 { rockchip,pipe-phy-grf =3D <&pipe_phy_grf>; status =3D "disabled"; }; + + usb2phy: usb2phy@ffdf0000 { + compatible =3D "rockchip,rk3528-usb2phy"; + reg =3D <0x0 0xffdf0000 0x0 0x10000>; + clocks =3D <&cru CLK_REF_USBPHY>, <&cru PCLK_USBPHY>; + clock-names =3D "phyclk", "pclk"; + #clock-cells =3D <0>; + clock-output-names =3D "clk_usbphy_480m"; + power-domains =3D <&power RK3528_PD_VO>; + rockchip,usbgrf =3D <&vo_grf>; + status =3D "disabled"; + + usb2phy_otg: otg-port { + interrupts =3D , + , + ; + interrupt-names =3D "otg-bvalid", "otg-id", + "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + + usb2phy_host: host-port { + interrupts =3D ; + interrupt-names =3D "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + }; }; }; =20 --=20 2.47.3 From nobody Mon Jun 8 11:01:53 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 049DD3FADE7 for ; Fri, 29 May 2026 19:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081448; cv=none; b=sZDuyw3lUsBoKciYr/WZRMCj+BHe/XdxrNY/IoqxUbXDiXeMFJ+9BFhSAKq8fMUm7Ydmj+hXlG1UupvqPn3NMFlcNbQSuNLElFHGLis9w++OIXKm03Lhcj9XNmo8DjYXWvN5Whp4vsIu26dsvzeDRF1VuUuNOgDGIMQ4SlCcCUU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081448; c=relaxed/simple; bh=IQYVoKwy6vmNSmRhEgYuOHl9lg1UmsG/DQ9nZEQ8Kbg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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b=se9JJd8dIhYf5+PzZNlR5+NIIS OSFW/pR74ZCSY1ZcHlcwQN+pD1YHKqEK5UZAT1HWAflAdkYkhAuxSGQWwKGqMyFlqj9J8Ci4OBURz 134RHM2yDG7mwMGDRl8kUTrAvt2lJeP4/pL9R0VhDZWlj0YzZIV2sXlyRxR6Yow2NBaCgZGB/btr5 0KEP/Zf7x/IngSdxe1v2XYJr+QV/A10frp/0KSi6OBGxIvoDyTKhIlJSQicstAau+Z+HO1PbdDl3b U71DbhiPbLflfDISvMAcTMU/yGu9G6H0xgqajWWHeSHBs3GozSVmEnGJ5JfhIX/CAvxrpZoB1PsUC h0MBEDuQ==; From: Heiko Stuebner To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, amadeus@jmu.edu.cn, jonas@kwiboo.se Subject: [PATCH v4 2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C Date: Fri, 29 May 2026 21:03:52 +0200 Message-ID: <20260529190355.4148175-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260529190355.4148175-1-heiko@sntech.de> References: <20260529190355.4148175-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The Radxa E20C has one USB2.0 Type-A HOST port and one USB2.0 Type-C port. The Type-C port is conneced to a FE1.1s_QFN USB hub on the board, with its ports being connected to the XHCI usb controller and an usb-uart bridge. This also means, the XHCI controller can only be used in device-mode. Add support for using the USB 2.0 ports on Radxa E20C. Signed-off-by: Jonas Karlman [set xhci to peripheral and add comment about the outward-facing hub] Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm6= 4/boot/dts/rockchip/rk3528-radxa-e20c.dts index b32452756155..f872b8d20ebc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts @@ -134,6 +134,18 @@ vcc5v0_sys: regulator-5v0-vcc-sys { regulator-max-microvolt =3D <5000000>; }; =20 + vcc5v0_usb20: regulator-5v0-vcc-usb20 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_en>; + regulator-name =3D "vcc5v0_usb20"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + vccio_sd: regulator-vccio-sd { compatible =3D "regulator-gpio"; gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; @@ -273,6 +285,12 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + usb_host_en: usb-host-en { + rockchip,pins =3D <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; =20 &pwm1 { @@ -320,3 +338,45 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +/* + * The usb controller can only work in peripheral mode, as it is + * connected to one of the ports of an outward-facing usb hub. + * + * type_c-port (hub-input) + * | + * usb-hub + * | | + * uart-usb usb-host0 + * | + * uart0 + */ +&usb_host0_xhci { + dr_mode =3D "peripheral"; + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&vcc5v0_usb20>; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3 From nobody Mon Jun 8 11:01:53 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0485637C0FB for ; Fri, 29 May 2026 19:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081447; cv=none; b=c81Xeo71isDqA2j8FDLS01L1RbuBO0PatuYO6sl+kzfciTPHf79MnbDbfqhTiq899OfmoNQXApM7lPUiZ8lsJuX1kEaJKNMONJTpGTdy+WP9RNxyu9804cgLtdt3MYp3nf2kU7hoDUARuBIPDKzYN/y3AAvD1fH5DiuvzZCBCyk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081447; c=relaxed/simple; bh=7+UOVzeRvQ5vDy8kydxh/uGyf3mXh3reLewLOFkJcNA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BOQ9yRC/uh8fDWMwasY5AI/jBWHRiErYDJ1lWoxVVWl6VGThMcEtDLyLDhP8ECoMjyFkfVqRO4tr6NzWdBurSxZ3HDZ8cHFZJBPWyUVTpZ04yPKj2NSTDSQy8u1WSJe7SXQPKCrarDEcTt7UjJpANYhT8yMN/KGK81F0IFhARXM= ARC-Authentication-Results: i=1; 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From: Heiko Stuebner To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, amadeus@jmu.edu.cn, jonas@kwiboo.se Subject: [PATCH v4 3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F Date: Fri, 29 May 2026 21:03:53 +0200 Message-ID: <20260529190355.4148175-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260529190355.4148175-1-heiko@sntech.de> References: <20260529190355.4148175-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The ROCK 2A has three USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 3.0 Type-A port. And the ROCK 2F has two USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 2.0 Type-C OTG port. Add support for using the USB ports on Radxa ROCK 2A/2F. The onboard USB hub handles OHCI so only the EHCI controller is enabled. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts | 11 +++++++++++ arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts | 12 ++++++++++++ 3 files changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2.dtsi index aedc7ee9ee46..501a91f4c23e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi @@ -166,6 +166,10 @@ rfkill { }; }; =20 +&combphy { + status =3D "okay"; +}; + &cpu0 { cpu-supply =3D <&vdd_arm>; }; @@ -291,3 +295,16 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&vcc5v0_usb20>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2a.dts index 0b696d49b71f..5e17ec2758d5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts @@ -79,3 +79,14 @@ usb_otg_en: usb-otg-en { }; }; }; + +&usb_host0_xhci { + dr_mode =3D "host"; + extcon =3D <&usb2phy>; + status =3D "okay"; +}; + +&usb2phy_otg { + phy-supply =3D <&vcc5v0_usb30_otg>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2f.dts index 3e2b9b685cb2..f2b021ff5046 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts @@ -8,3 +8,15 @@ / { model =3D "Radxa ROCK 2F"; compatible =3D "radxa,rock-2f", "rockchip,rk3528"; }; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3 From nobody Mon Jun 8 11:01:53 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0491E3D34A0 for ; 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charset="utf-8" From: Jonas Karlman The ArmSoM Sige1 has two USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 2.0 Type-C OTG port. Add support for using the USB 2.0 ports on ArmSoM Sige1. The onboard USB hub handles OHCI so only the EHCI controller is enabled. Signed-off-by: Jonas Karlman [added phy-supply for otg port] Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-armsom-sige1.dts | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-armsom-sige1.dts index c41af8fc0c8d..ee4183fb980d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts @@ -480,3 +480,28 @@ bluetooth { vddio-supply =3D <&vcc_1v8>; }; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + status =3D "okay"; +}; + +&usb2phy_otg { + phy-supply =3D <&vcc5v0_usb_otg>; + status =3D "okay"; +}; --=20 2.47.3 From nobody Mon Jun 8 11:01:53 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04A8A400E01 for ; Fri, 29 May 2026 19:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081447; cv=none; b=kpaw47HfuN0Zzk28Ti9zdqf05/MbxaSbw2mrOivXxsshhSB3gh/xKoG0Dp7YZPOfCpGeAHMWe73AZfjnXEOKrZlZe6p369eT4AsGqoDtFO0dNYTd3dn2B//qeqtKhCVcYnkL+xZhyAkQGdf+zdzSXJSToJ0FLJCLiu8PfLzmlPQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780081447; c=relaxed/simple; bh=YgHZ0yr9U1aDRHZ5RyVmGgZlJFyGiB9O528NAFAmszw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oj0AZOeTBvL0I9JYqq/TwfDVt8LF9+mZhyCKQjhl5exbEQHmfwsorB/LIJztYEfSTpzEQX7abZ0w62FD2X3tIEKinWKRC2d1a/qOvqWiWSvFn2RgxaCUlpu8uQVXuaMpvHIpQeA8aI5qzj5ADTs3EOsxQ2xd84rdDI7vkRhNUWQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=bxYZKY8S; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="bxYZKY8S" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=kVhbNGRA9/1U4zr01JFCIiYUqAzoqbgB2Uy8C1LiRyI=; b=bxYZKY8SMo+pIwlYZmgW92XZET AYGEB8rautngNDly4qCmhuXEAsnmu0kAYXJPimYKT2StBKr5gyuAiPEDR5evwqsiv7HItu+QZz3TG gfVcU96Y7Nap9jmgmKD2Iiys5ysbd+T3NnAcQyuGj0U5tG2vsKVBEe7okKmMWT+IT9nDSoe4eOuEw 64jFh3Zw01InOMjANbthjCtCKZE2x+SdwV0AMvkoaimfXC5Qg5HiFBjNJBsK1f3g4HJzHL26UCVtu Vh/zD9hqlS9HS+ttlrMT/s60T4qkZYSFNJmURiCSBQuGus2gwEhBasElMII4VUxnp5k+Vj9z+wtIw X9QN+AhQ==; From: Heiko Stuebner To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, amadeus@jmu.edu.cn, jonas@kwiboo.se Subject: [PATCH v4 5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2 Date: Fri, 29 May 2026 21:03:55 +0200 Message-ID: <20260529190355.4148175-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260529190355.4148175-1-heiko@sntech.de> References: <20260529190355.4148175-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The NanoPi Zero2 has one USB 2.0 Type-A HOST port and one USB 2.0 Type-C OTG port. Add support for using the USB 2.0 ports on NanoPi Zero2. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts index 9f683033c5f3..97d85124d21b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -338,3 +338,32 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&usb2_host_5v>; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3