From nobody Mon Jun 8 12:14:07 2026 Received: from exchange.fintech.ru (exchange.fintech.ru [195.54.195.159]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0F913C1985 for ; Fri, 29 May 2026 12:10:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.54.195.159 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780056646; cv=none; b=nN1rbK0gu8dkZbHCjgxovIES8YIRMEfZw6OrpdAx9RM8ZvILXSHRxnX90PjRMsZ7qvOtJ0pHxT1tWNitHIS35f8YpI9N92F4qBxzxTGKPZBw+Wn9Hsa1leHFh5kohqulUMcxH2X9GJVBcotfHckw9jEG1VKtChG/iVZjjfo84TQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780056646; c=relaxed/simple; bh=f34uo/pDVqMCOCiF6eXDSQT6ScVNhTvr2lWjuaMNaUM=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=joyPWnCmKwROzo8pSeIEXo15mSwOoX4+vqsuJT/312zAjLvDHvFu/UaEPInsHW+xtH8/fQoi1EXWePzQ9iqpkqvHpENq6I/h/u/nHvrVCTqNwxhTT0gLtRfvDIUPNvxi4EVUFBjAMLfOGdwTsEjy0yPmaVCJLzwZAUFap8eClTk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fintech.ru; spf=pass smtp.mailfrom=fintech.ru; arc=none smtp.client-ip=195.54.195.159 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fintech.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fintech.ru Received: from Ex16-01.fintech.ru (10.0.10.18) by exchange.fintech.ru (195.54.195.159) with Microsoft SMTP Server (TLS) id 14.3.498.0; Fri, 29 May 2026 15:09:30 +0300 Received: from localhost (10.0.253.153) by Ex16-01.fintech.ru (10.0.10.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.4; Fri, 29 May 2026 15:09:30 +0300 From: Nikita Zhandarovich To: Jani Nikula , Rodrigo Vivi , Joonas Lahtinen CC: Nikita Zhandarovich , Tvrtko Ursulin , David Airlie , Simona Vetter , , , , , Subject: [PATCH] drm/i915/edp: Check supported link rates DPCD read Date: Fri, 29 May 2026 15:09:18 +0300 Message-ID: <20260529120921.1633346-1-n.zhandarovich@fintech.ru> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: Ex16-02.fintech.ru (10.0.10.19) To Ex16-01.fintech.ru (10.0.10.18) Content-Type: text/plain; charset="utf-8" intel_edp_set_sink_rates() reads DP_SUPPORTED_LINK_RATES into a local stack array and then parses the array unconditionally. If the read fails or returns less data than requested, the array contents are not valid and may result in bogus sink link rates being used. Check that the full DPCD block was read before parsing it. If not, fall back to the default sink rate handling. Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: 68f357cb7347 ("drm/i915/dp: generate and cache sink rate array for a= ll DP, not just eDP 1.4") Signed-off-by: Nikita Zhandarovich --- drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915= /display/intel_dp.c index 6ef2a0043cda..b6650a12ca54 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4678,10 +4678,16 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp) =20 if (intel_dp->edp_dpcd[0] >=3D DP_EDP_14) { __le16 sink_rates[DP_MAX_SUPPORTED_RATES]; + ssize_t ret; int i; =20 - drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES, - sink_rates, sizeof(sink_rates)); + ret =3D drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES, + sink_rates, sizeof(sink_rates)); + if (ret !=3D sizeof(sink_rates)) { + drm_dbg_kms(display->drm, + "Unable to read eDP supported link rates, using default rates\n"); + goto use_default_rates; + } =20 for (i =3D 0; i < ARRAY_SIZE(sink_rates); i++) { int rate; @@ -4715,6 +4721,7 @@ intel_edp_set_sink_rates(struct intel_dp *intel_dp) * Use DP_LINK_RATE_SET if DP_SUPPORTED_LINK_RATES are available, * default to DP_MAX_LINK_RATE and DP_LINK_BW_SET otherwise. */ +use_default_rates: if (intel_dp->num_sink_rates) intel_dp->use_rate_select =3D true; else