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Fri, 29 May 2026 01:38:12 -0700 (PDT) From: Svyatoslav Ryhel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/2] dt-bindings: arm: tegra: Add Motorola Artix 4G and Droid X2 Date: Fri, 29 May 2026 11:37:51 +0300 Message-ID: <20260529083752.44796-2-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260529083752.44796-1-clamor95@gmail.com> References: <20260529083752.44796-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a compatible for Motorola Artix 4G and Droid X2. Signed-off-by: Svyatoslav Ryhel Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/tegra.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentati= on/devicetree/bindings/arm/tegra.yaml index 033a63f6c068..ca311262ca32 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -46,6 +46,12 @@ properties: - items: - const: acer,picasso - const: nvidia,tegra20 + - description: Motorola Mot based Device family + items: + - enum: + - motorola,daytona + - motorola,olympus + - const: nvidia,tegra20 - items: - enum: - nvidia,beaver --=20 2.51.0 From nobody Mon Jun 8 12:12:35 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62F6836D9F6 for ; Fri, 29 May 2026 08:38:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 29 May 2026 01:38:14 -0700 (PDT) Received: from xeon ([188.163.112.61]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909d5f2347sm24939705e9.0.2026.05.29.01.38.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 01:38:13 -0700 (PDT) From: Svyatoslav Ryhel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/2] ARM: tegra: Add device-tree for Motorola Atrix 4G and Droid X2 Date: Fri, 29 May 2026 11:37:52 +0300 Message-ID: <20260529083752.44796-3-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260529083752.44796-1-clamor95@gmail.com> References: <20260529083752.44796-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a device-tree for the Motorola Atrix 4G and Droid X2, which both are NVIDIA Tegra20-based smartphones, originally running Android. Tested-by: Ion Agorria # Droid X2 Signed-off-by: Svyatoslav Ryhel --- arch/arm/boot/dts/nvidia/Makefile | 2 + .../dts/nvidia/tegra20-motorola-daytona.dts | 107 ++ .../boot/dts/nvidia/tegra20-motorola-mot.dtsi | 1194 +++++++++++++++++ .../dts/nvidia/tegra20-motorola-olympus.dts | 108 ++ 4 files changed, 1411 insertions(+) create mode 100644 arch/arm/boot/dts/nvidia/tegra20-motorola-daytona.dts create mode 100644 arch/arm/boot/dts/nvidia/tegra20-motorola-mot.dtsi create mode 100644 arch/arm/boot/dts/nvidia/tegra20-motorola-olympus.dts diff --git a/arch/arm/boot/dts/nvidia/Makefile b/arch/arm/boot/dts/nvidia/M= akefile index eaac22f4c5e9..aad14940772a 100644 --- a/arch/arm/boot/dts/nvidia/Makefile +++ b/arch/arm/boot/dts/nvidia/Makefile @@ -26,6 +26,8 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) +=3D \ tegra20-colibri-eval-v3.dtb \ tegra20-colibri-iris.dtb \ tegra20-medcom-wide.dtb \ + tegra20-motorola-olympus.dtb \ + tegra20-motorola-daytona.dtb \ tegra20-paz00.dtb \ tegra20-plutux.dtb \ tegra20-seaboard.dtb \ diff --git a/arch/arm/boot/dts/nvidia/tegra20-motorola-daytona.dts b/arch/a= rm/boot/dts/nvidia/tegra20-motorola-daytona.dts new file mode 100644 index 000000000000..72dd915e37e7 --- /dev/null +++ b/arch/arm/boot/dts/nvidia/tegra20-motorola-daytona.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra20-motorola-mot.dtsi" + +/ { + model =3D "Motorola Droid X2 (MB870)"; + compatible =3D "motorola,daytona", "nvidia,tegra20"; + + i2c@7000c000 { + touchscreen@4a { + touchscreen-size-x =3D <1010>; + touchscreen-size-y =3D <1023>; + touchscreen-min-x =3D <25>; + }; + }; + + i2c@7000d000 { + accelerometer@f { + mount-matrix =3D "-1", "0", "0", + "0", "-1", "0", + "0", "0", "-1"; + }; + + light-sensor@44 { + compatible =3D "isil,isl29030"; + reg =3D <0x44>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + vdd-supply =3D <&vdd_hvio>; + }; + }; + + /* Motorola BH5X battery cell */ + battery: battery-cell { + compatible =3D "simple-battery"; + device-chemistry =3D "lithium-ion"; + + voltage-min-design-microvolt =3D <3200000>; + voltage-max-design-microvolt =3D <4200000>; + + charge-full-design-microamp-hours =3D <1500000>; + energy-full-design-microwatt-hours =3D <5600000>; + + constant-charge-voltage-max-microvolt =3D <4200000>; + operating-range-celsius =3D <0 45>; + }; + + extcon-keys { + compatible =3D "gpio-keys"; + + switch-dock-hall-sensor-north { + label =3D "Dock Hall sensor (north)"; + gpios =3D <&gpio TEGRA_GPIO(S, 2) GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + debounce-interval =3D <500>; + wakeup-event-action =3D ; + wakeup-source; + }; + + switch-dock-hall-sensor-south { + label =3D "Dock Hall sensor (south)"; + gpios =3D <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + debounce-interval =3D <500>; + wakeup-event-action =3D ; + wakeup-source; + }; + }; + + matrix-keypad { + compatible =3D "gpio-matrix-keypad"; + + debounce-delay-ms =3D <10>; + col-scan-delay-us =3D <5>; + + row-gpios =3D <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW + &gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW + &gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW + &gpio TEGRA_GPIO(R, 3) GPIO_ACTIVE_LOW>; + col-gpios =3D <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW + &gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW + &gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; + + gpio-activelow; + + linux,keymap =3D ; + + wakeup-source; + }; + + sound { + nvidia,model =3D "Motorola Droid X2 (MB870) CPCAP"; + }; +}; diff --git a/arch/arm/boot/dts/nvidia/tegra20-motorola-mot.dtsi b/arch/arm/= boot/dts/nvidia/tegra20-motorola-mot.dtsi new file mode 100644 index 000000000000..508b95e2e272 --- /dev/null +++ b/arch/arm/boot/dts/nvidia/tegra20-motorola-mot.dtsi @@ -0,0 +1,1194 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include + +#include "tegra20.dtsi" +#include "tegra20-cpu-opp.dtsi" +#include "tegra20-cpu-opp-microvolt.dtsi" + +/ { + chassis-type =3D "handset"; + + aliases { + mmc0 =3D &sdmmc4; /* eMMC */ + mmc1 =3D &sdmmc3; /* uSD slot */ + mmc2 =3D &sdmmc1; /* WiFi */ + + rtc0 =3D &cpcap_rtc; + rtc1 =3D "/rtc@7000e000"; + + serial0 =3D &uartb; /* Console */ + serial1 =3D &uartc; /* Bluetooth */ + }; + + /* + * The decompressor and also some bootloaders rely on a + * pre-existing /chosen node to be available to insert the + * command line and merge other ATAGS info. + */ + chosen { }; + + memory@0 { + reg =3D <0x00000000 0x40000000>; + }; + + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + linux,cma@20000000 { + compatible =3D "shared-dma-pool"; + alloc-ranges =3D <0x20000000 0x10000000>; + size =3D <0x10000000>; /* 256MiB */ + linux,cma-default; + reusable; + }; + }; + + host1x@50000000 { + vi@54080000 { + status =3D "okay"; + + csi@800 { + status =3D "okay"; + + avdd-dsi-csi-supply =3D <&avdd_dsi_csi>; + }; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + vi_ppa_input: endpoint { + /* Link to the rear camera */ + }; + }; + + port@1 { + reg =3D <1>; + + vi_ppb_input: endpoint { + /* Link to the front camera */ + }; + }; + }; + }; + + hdmi@54280000 { + status =3D "okay"; + + /* + * Mot uses PLLD for both HDMI and DSI. HDMI does + * not support opps for frequencies used by DSI. + * Consequently, DSI works, but it causes HDMI to + * fail. Remove operating-points-v2 from HDMI. + */ + /delete-property/ operating-points-v2; + + vdd-supply =3D <&avdd_3v3_periph>; + pll-supply =3D <&vdd_hvio>; + hdmi-supply =3D <&vdd_hdmi_en>; + + port { + hdmi_out: endpoint { + remote-endpoint =3D <&hdmi_connector_in>; + }; + }; + }; + + dsi@54300000 { + status =3D "okay"; + + avdd-dsi-csi-supply =3D <&avdd_dsi_csi>; + + panel@0 { + compatible =3D "motorola,mot-panel"; + reg =3D <0>; + + reset-gpios =3D <&gpio TEGRA_GPIO(E, 3) GPIO_ACTIVE_LOW>; + + vdd-supply =3D <&vdd_5v0_panel>; + vddio-supply =3D <&vdd_1v8_vio>; + + backlight =3D <&backlight>; + }; + }; + }; + + gpio@6000d000 { + usb-mux-hog { + gpio-hog; + gpios =3D ; + output-high; + }; + }; + + pinmux@70000014 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&state_default>; + + state_default: pinmux { + crt { + nvidia,pins =3D "crtp"; + nvidia,function =3D "crt"; + }; + + dap1 { + nvidia,pins =3D "dap1"; + nvidia,function =3D "dap1"; + }; + + dap2 { + nvidia,pins =3D "dap2"; + nvidia,function =3D "dap2"; + }; + + dap3 { + nvidia,pins =3D "dap3"; + nvidia,function =3D "dap3"; + }; + + dap4 { + nvidia,pins =3D "dap4"; + nvidia,function =3D "dap4"; + }; + + displaya { + nvidia,pins =3D "lcsn", "ld0", "ld1", "ld3", + "ld5", "ld6", "ld7", "ld8", + "ld9", "ld12", "ld13", "ld14", + "ld15", "ld16", "ld17", "ldi", + "lhp0", "lhp1", "lhp2", "lhs", + "lpp", "lsc0", "lpw1", "lsda", + "lspi"; + nvidia,function =3D "displaya"; + }; + + gmi { + nvidia,pins =3D "ata", "atc", "atd", "ate", + "gmb", "gmd", "gpu"; + nvidia,function =3D "gmi"; + }; + + hdmi { + nvidia,pins =3D "hdint"; + nvidia,function =3D "hdmi"; + }; + + i2c1 { + nvidia,pins =3D "rm"; + nvidia,function =3D "i2c1"; + }; + + i2c2 { + nvidia,pins =3D "ddc"; + nvidia,function =3D "i2c2"; + }; + + i2c3 { + nvidia,pins =3D "dtf"; + nvidia,function =3D "i2c3"; + }; + + i2cp { + nvidia,pins =3D "i2cp"; + nvidia,function =3D "i2cp"; + }; + + kbc { + nvidia,pins =3D "kbca", "kbcb", "kbcc", "kbcd", + "kbce", "kbcf"; + nvidia,function =3D "kbc"; + }; + + osc { + nvidia,pins =3D "cdev1", "cdev2"; + nvidia,function =3D "osc"; + }; + + owr { + nvidia,pins =3D "owc", "uac"; + nvidia,function =3D "owr"; + }; + + pcie { + nvidia,pins =3D "gpv"; + nvidia,function =3D "pcie"; + }; + + pwr-on { + nvidia,pins =3D "pmc"; + nvidia,function =3D "pwr_on"; + }; + + rsvd3 { + nvidia,pins =3D "lm1"; + nvidia,function =3D "rsvd3"; + }; + + rsvd4 { + nvidia,pins =3D "lvp0", "lvp1", "lvs", "ld10", + "ld11", "ld2", "ld4", "ldc"; + nvidia,function =3D "rsvd4"; + }; + + rtck { + nvidia,pins =3D "gpu7"; + nvidia,function =3D "rtck"; + }; + + sdio1 { + nvidia,pins =3D "sdio1"; + nvidia,function =3D "sdio1"; + }; + + sdio3 { + nvidia,pins =3D "sdb", "sdc", "sdd"; + nvidia,function =3D "sdio3"; + }; + + sdio4 { + nvidia,pins =3D "atb", "gma", "gme"; + nvidia,function =3D "sdio4"; + }; + + spdif { + nvidia,pins =3D "slxc", "slxd"; + nvidia,function =3D "spdif"; + }; + + spi1 { + nvidia,pins =3D "spid", "spie", "spif"; + nvidia,function =3D "spi1"; + }; + + spi2 { + nvidia,pins =3D "spia", "spib", "spic", "spig", + "spih"; + nvidia,function =3D "spi2"; + }; + + spi3 { + nvidia,pins =3D "lm0", "lpw0", "lpw2", "lsc1"; + nvidia,function =3D "spi3"; + }; + + uarta { + nvidia,pins =3D "irrx", "irtx"; + nvidia,function =3D "uarta"; + }; + + uartc { + nvidia,pins =3D "uca", "ucb"; + nvidia,function =3D "uartc"; + }; + + uartd { + nvidia,pins =3D "gmc"; + nvidia,function =3D "uartd"; + }; + + ulpi { + nvidia,pins =3D "uab"; + nvidia,function =3D "ulpi"; + }; + + vi { + nvidia,pins =3D "dta", "dtb", "dtc", "dtd", + "dte"; + nvidia,function =3D "vi"; + }; + + vi-sensor-clk { + nvidia,pins =3D "csus"; + nvidia,function =3D "vi_sensor_clk"; + }; + + conf-lcsn { + nvidia,pins =3D "lcsn", "lpw1", "lsck", "lsda", + "lsdi", "ldc", "hdint"; + nvidia,tristate =3D ; + }; + + conf-ata { + nvidia,pins =3D "ata", "atc", "ddc", "gmc", + "gpu", "kbca", "kbcb", "kbcc", + "kbcd", "kbce", "kbcf", "owc", + "sdc", "sdd", "sdio1", "uaa", + "uad", "uca", "ucb", "pmce"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + }; + + conf-crtp { + nvidia,pins =3D "crtp", "csus", "pta"; + nvidia,pull =3D ; + }; + + conf-atd { + nvidia,pins =3D "atb", "atd", "ate", "cdev2", + "cdev1", "dte", "gma", "gmb", + "gmd", "gme", "gpu7", "gpv", + "i2cp", "irrx", "irtx", "rm", + "slxa", "slxc", "slxd", "slxk", + "spdi", "spdo", "spid", "spie", + "spif", "uda", "ck32", "ddrc", + "pmca", "pmcb", "pmcc", "pmcd", + "xm2c", "xm2d"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + }; + + conf-ld0 { + nvidia,pins =3D "ld0", "ld1", "ld2", "ld3", + "ld4", "ld5", "ld6", "ld7", + "ld8", "ld9", "ld10", "ld11", + "ld12", "ld13", "ld14", "ld15", + "ld16", "ld17", "ldi", "lhp0", + "lhp1", "lhp2", "lhs", "lm0", + "lpp", "lpw0", "lpw2", "lsc0", + "lsc1", "lspi", "lvp1", "lm1", + "lvp0", "lvs", "pmc", "sdb"; + nvidia,tristate =3D ; + }; + + conf-dta { + nvidia,pins =3D "dap1", "dap2", "dap3", "dap4", + "dta", "dtb", "dtc", "dtd", "dtf"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + }; + + conf-spi2 { + nvidia,pins =3D "spia", "spib", "spic", "spig", + "spih"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + }; + + drive-sdio1 { + nvidia,pins =3D "drive_sdio1", "drive_ddc", "drive_vi1", + "drive_vi2", "drive_dbg"; + nvidia,high-speed-mode =3D ; + nvidia,schmitt =3D ; + nvidia,low-power-mode =3D ; + nvidia,pull-down-strength =3D <31>; + nvidia,pull-up-strength =3D <31>; + nvidia,slew-rate-rising =3D ; + nvidia,slew-rate-falling =3D ; + }; + }; + }; + + spdif@70002400 { + status =3D "okay"; + + nvidia,fixed-parent-rate; + }; + + tegra_i2s1: i2s@70002800 { + status =3D "okay"; + + nvidia,fixed-parent-rate; + }; + + uartb: serial@70006040 { + /delete-property/ dmas; + /delete-property/ dma-names; + status =3D "okay"; + + /* Console */ + }; + + uartc: serial@70006200 { + compatible =3D "nvidia,tegra20-hsuart"; + reset-names =3D "serial"; + /delete-property/ reg-shift; + status =3D "okay"; + + nvidia,adjust-baud-rates =3D <0 9600 100>, + <9600 115200 200>, + <1000000 4000000 136>; + + /* Broadcom BCM4329HKUBG */ + bluetooth { + compatible =3D "brcm,bcm4329-bt"; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + interrupt-names =3D "host-wakeup"; + + /* PLLP 216MHz / 16 / 4 */ + max-speed =3D <3375000>; + + clocks =3D <&tegra_pmc TEGRA_PMC_CLK_BLINK>; + clock-names =3D "txco"; + + vbat-supply =3D <&vdd_3v3_sys>; + vddio-supply =3D <&vdd_1v8_vio>; + + device-wakeup-gpios =3D <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>; + shutdown-gpios =3D <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_LOW>; + }; + }; + + gen1_i2c: i2c@7000c000 { + status =3D "okay"; + clock-frequency =3D <400000>; + + led-controller@38 { + compatible =3D "ti,lm3532"; + reg =3D <0x38>; + + enable-gpios =3D <&gpio TEGRA_GPIO(E, 0) GPIO_ACTIVE_HIGH>; + + vin-supply =3D <&vdd_led>; + + ramp-up-us =3D <0>; + ramp-down-us =3D <0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + backlight_led: led@0 { + reg =3D <0>; + + led-sources =3D <0>; + led-max-microamp =3D <26600>; + + ti,led-mode =3D <0>; + ti,linear-mapping-mode; + + label =3D ":backlight"; + }; + }; + + touchscreen@4a { + compatible =3D "atmel,maxtouch"; + reg =3D <0x4a>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + touchscreen-min-y =3D <10>; + touchscreen-swapped-x-y; + + reset-gpios =3D <&gpio TEGRA_GPIO(F, 4) GPIO_ACTIVE_LOW>; + + vdda-supply =3D <&vdd_3v3_sys>; + vdd-supply =3D <&vdd_3v3_sys>; + }; + }; + + hdmi_ddc: i2c@7000c400 { + status =3D "okay"; + clock-frequency =3D <100000>; + }; + + cam_i2c: i2c@7000c500 { + status =3D "okay"; + clock-frequency =3D <400000>; + }; + + sen_i2c: i2c@7000d000 { + status =3D "okay"; + clock-frequency =3D <400000>; + + magnetometer@c { + compatible =3D "asahi-kasei,ak8975"; + reg =3D <0xc>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + reset-gpios =3D <&gpio TEGRA_GPIO(K, 5) GPIO_ACTIVE_LOW>; + + vdd-supply =3D <&vdd_hvio>; + vid-supply =3D <&vdd_1v8_vio>; + }; + + accelerometer@f { + compatible =3D "kionix,kxtf9"; + reg =3D <0xf>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + vdd-supply =3D <&vdd_hvio>; + vddio-supply =3D <&vdd_1v8_vio>; + }; + + nct1008: temperature-sensor@4c { + compatible =3D "onnn,nct1008"; + reg =3D <0x4c>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + vcc-supply =3D <&vcore_emmc>; + #thermal-sensor-cells =3D <1>; + }; + }; + + spi@7000d600 { + status =3D "okay"; + spi-max-frequency =3D <25000000>; + + cpcap: pmic@0 { + compatible =3D "motorola,mot-cpcap"; + reg =3D <0>; + + spi-cs-high; + spi-max-frequency =3D <8000000>; + + interrupts =3D ; + + interrupt-controller; + #interrupt-cells =3D <2>; + + cpcap_adc: adc { + compatible =3D "motorola,mot-cpcap-adc"; + + interrupts-extended =3D <&cpcap 8 IRQ_TYPE_NONE>; + interrupt-names =3D "adcdone"; + + #io-channel-cells =3D <1>; + }; + + cpcap_audio: audio-codec { + interrupts-extended =3D <&cpcap 9 IRQ_TYPE_NONE>, + <&cpcap 10 IRQ_TYPE_NONE>; + interrupt-names =3D "hs", "mb2"; + + VAUDIO-supply =3D <&vdd_audio>; + + #sound-dai-cells =3D <1>; + }; + + /* CHARGE_NOW has to be dumped and preloaded on each reboot */ + battery { + compatible =3D "motorola,cpcap-battery"; + + interrupts-extended =3D + <&cpcap 6 IRQ_TYPE_NONE>, <&cpcap 5 IRQ_TYPE_NONE>, + <&cpcap 3 IRQ_TYPE_NONE>, <&cpcap 20 IRQ_TYPE_NONE>, + <&cpcap 54 IRQ_TYPE_NONE>, <&cpcap 57 IRQ_TYPE_NONE>; + interrupt-names =3D + "eol", "lowbph", "lowbpl", + "chrgcurr1", "battdetb", "cccal"; + + io-channels =3D <&cpcap_adc 0>, <&cpcap_adc 1>, + <&cpcap_adc 5>, <&cpcap_adc 6>; + io-channel-names =3D "battdetb", "battp", + "chg_isense", "batti"; + + monitored-battery =3D <&battery>; + }; + + key-power { + compatible =3D "motorola,cpcap-pwrbutton"; + + interrupt-parent =3D <&cpcap>; + interrupts =3D <23 IRQ_TYPE_NONE>; + }; + + led-red { + compatible =3D "motorola,cpcap-led-red"; + vdd-supply =3D <&vdd_led>; + label =3D "status-led::red"; + }; + + led-green { + compatible =3D "motorola,cpcap-led-green"; + vdd-supply =3D <&vdd_led>; + label =3D "status-led::green"; + }; + + led-blue { + compatible =3D "motorola,cpcap-led-blue"; + vdd-supply =3D <&vdd_led>; + label =3D "status-led::blue"; + }; + + led-adl { + compatible =3D "motorola,cpcap-led-adl"; + vdd-supply =3D <&vdd_led>; + label =3D "cpcap::keypad"; + }; + + regulator { + compatible =3D "motorola,mot-cpcap-regulator"; + + regulators { + vdd_cpu: SW1 { + regulator-name =3D "vdd_cpu"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1125000>; + regulator-coupled-with =3D <&vdd_core &vdd_rtc>; + regulator-coupled-max-spread =3D <550000 550000>; + regulator-enable-ramp-delay =3D <1500>; + regulator-always-on; + regulator-boot-on; + + nvidia,tegra-cpu-regulator; + }; + + vdd_core: SW2 { + regulator-name =3D "vdd_core"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <1300000>; + regulator-coupled-with =3D <&vdd_rtc &vdd_cpu>; + regulator-coupled-max-spread =3D <170000 550000>; + regulator-enable-ramp-delay =3D <1500>; + regulator-always-on; + regulator-boot-on; + + nvidia,tegra-core-regulator; + }; + + vdd_1v8_vio: SW3 { + regulator-name =3D "vdd_1v8_vio"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-enable-ramp-delay =3D <0>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_rtc: SW4 { + regulator-name =3D "vdd_aon"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <1300000>; + regulator-coupled-with =3D <&vdd_core &vdd_cpu>; + regulator-coupled-max-spread =3D <170000 550000>; + regulator-enable-ramp-delay =3D <1500>; + regulator-always-on; + regulator-boot-on; + + nvidia,tegra-rtc-regulator; + }; + + vdd_led: SW5 { + regulator-name =3D "vdd_led"; + regulator-min-microvolt =3D <5050000>; + regulator-max-microvolt =3D <5050000>; + regulator-enable-ramp-delay =3D <1500>; + regulator-boot-on; + }; + + VCAM { + regulator-name =3D "vdd_cam1"; + regulator-min-microvolt =3D <2600000>; + regulator-max-microvolt =3D <2900000>; + regulator-enable-ramp-delay =3D <1000>; + }; + + avdd_dsi_csi: VCSI { + regulator-name =3D "avdd_dsi_csi"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-boot-on; + }; + + vdd_hvio: VHVIO { + regulator-name =3D "vdd_hvio"; + regulator-min-microvolt =3D <2775000>; + regulator-max-microvolt =3D <2775000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + }; + + vcore_emmc: VSDIO { + regulator-name =3D "vcore_emmc"; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <3000000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + }; + + VPLL { + regulator-name =3D "avdd_pll"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + }; + + avdd_3v3_periph: VWLAN2 { + regulator-name =3D "avdd_3v3_periph"; + regulator-min-microvolt =3D <2775000>; + regulator-max-microvolt =3D <3300000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-boot-on; + }; + + vddio_usd: VSIMCARD { + regulator-name =3D "vddio_usd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2900000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-boot-on; + }; + + vdd_haptic: VVIB { + regulator-name =3D "vdd_haptic"; + regulator-min-microvolt =3D <1300000>; + regulator-max-microvolt =3D <3000000>; + regulator-enable-ramp-delay =3D <1000>; + }; + + vdd_usb_det: VUSB { + regulator-name =3D "vdd_usb_det"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_audio: VAUDIO { + regulator-name =3D "vdd_audio"; + regulator-min-microvolt =3D <2775000>; + regulator-max-microvolt =3D <2775000>; + regulator-enable-ramp-delay =3D <1000>; + regulator-allowed-modes =3D <0x00>, <0x40>; + regulator-initial-mode =3D <0x00>; /* NORMAL */ + }; + }; + }; + + cpcap_rtc: rtc { + compatible =3D "motorola,cpcap-rtc"; + + interrupt-parent =3D <&cpcap>; + interrupts =3D <39 IRQ_TYPE_NONE>, <26 IRQ_TYPE_NONE>; + }; + }; + }; + + pmc@7000e400 { + nvidia,suspend-mode =3D <1>; + nvidia,cpu-pwr-good-time =3D <800>; + nvidia,cpu-pwr-off-time =3D <600>; + nvidia,core-pwr-good-time =3D <1842 1842>; + nvidia,core-pwr-off-time =3D <31>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + core-supply =3D <&vdd_core>; + }; + + memory-controller@7000f400 { + nvidia,use-ram-code; + + emc-tables@0 { + reg =3D <0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Elpida 1G 50nm */ + lpddr2 { + compatible =3D "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4"; + revision-id =3D <0 0>; + density =3D <2048>; + io-width =3D <16>; + }; + + emc-table@25000 { + reg =3D <25000>; + compatible =3D "nvidia,tegra20-emc-table"; + clock-frequency =3D <25000>; + nvidia,emc-registers =3D < 0x00000002 0x00000006 + 0x00000003 0x00000003 0x00000006 0x00000004 + 0x00000002 0x00000009 0x00000003 0x00000003 + 0x00000002 0x00000002 0x00000002 0x00000004 + 0x00000003 0x00000008 0x0000000b 0x0000004d + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000008 0x00000001 0x0000000a 0x00000004 + 0x00000003 0x00000008 0x00000004 0x00000006 + 0x00000002 0x00000068 0x00000000 0x00000003 + 0x00000000 0x00000000 0x00000282 0xa06804ae + 0x00004810 0x00000000 0x00000000 0x00000003 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + + emc-table@50000 { + reg =3D <50000>; + compatible =3D "nvidia,tegra20-emc-table"; + clock-frequency =3D <50000>; + nvidia,emc-registers =3D < 0x00000003 0x00000007 + 0x00000003 0x00000003 0x00000006 0x00000004 + 0x00000002 0x00000009 0x00000003 0x00000003 + 0x00000002 0x00000002 0x00000002 0x00000005 + 0x00000003 0x00000008 0x0000000b 0x0000009f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000008 0x00000001 0x0000000a 0x00000007 + 0x00000003 0x00000008 0x00000004 0x00000006 + 0x00000002 0x000000d0 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000282 0xa06804ae + 0x00004810 0x00000000 0x00000000 0x00000005 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + + emc-table@75000 { + reg =3D <75000>; + compatible =3D "nvidia,tegra20-emc-table"; + clock-frequency =3D <75000>; + nvidia,emc-registers =3D < 0x00000005 0x0000000a + 0x00000004 0x00000003 0x00000006 0x00000004 + 0x00000002 0x00000009 0x00000003 0x00000003 + 0x00000002 0x00000002 0x00000002 0x00000005 + 0x00000003 0x00000008 0x0000000b 0x000000ff + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000008 0x00000001 0x0000000a 0x0000000b + 0x00000003 0x00000008 0x00000004 0x00000006 + 0x00000002 0x00000138 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000282 0xa06804ae + 0x00004810 0x00000000 0x00000000 0x00000007 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + + emc-table@150000 { + reg =3D <150000>; + compatible =3D "nvidia,tegra20-emc-table"; + clock-frequency =3D <150000>; + nvidia,emc-registers =3D < 0x00000009 0x00000014 + 0x00000007 0x00000004 0x00000006 0x00000004 + 0x00000002 0x00000009 0x00000003 0x00000003 + 0x00000002 0x00000002 0x00000002 0x00000005 + 0x00000003 0x00000008 0x0000000b 0x0000021f + 0x00000000 0x00000003 0x00000003 0x00000004 + 0x00000008 0x00000001 0x0000000a 0x00000015 + 0x00000003 0x00000008 0x00000004 0x00000006 + 0x00000002 0x00000270 0x00000000 0x00000001 + 0x00000000 0x00000000 0x00000282 0xa04c04ae + 0x007fc010 0x00000000 0x00000000 0x0000000e + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + + emc-table@300000 { + reg =3D <300000>; + compatible =3D "nvidia,tegra20-emc-table"; + clock-frequency =3D <300000>; + nvidia,emc-registers =3D < 0x00000012 0x00000027 + 0x0000000d 0x00000007 0x00000007 0x00000005 + 0x00000003 0x00000009 0x00000006 0x00000006 + 0x00000003 0x00000003 0x00000002 0x00000006 + 0x00000003 0x00000009 0x0000000c 0x0000045f + 0x00000000 0x00000004 0x00000004 0x00000007 + 0x00000008 0x00000001 0x0000000e 0x0000002a + 0x00000003 0x0000000f 0x00000008 0x00000005 + 0x00000002 0x000004e0 0x00000005 0x00000002 + 0x00000000 0x00000000 0x00000282 0xf04c040b + 0x007fe010 0x00000000 0x00000000 0x0000001b + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + }; + }; + + usb@c5000000 { + compatible =3D "nvidia,tegra20-udc"; + status =3D "okay"; + dr_mode =3D "peripheral"; + }; + + usb-phy@c5000000 { + status =3D "okay"; + dr_mode =3D "peripheral"; + nvidia,xcvr-setup =3D <8>; + nvidia,xcvr-lsfslew =3D <2>; + nvidia,xcvr-lsrslew =3D <2>; + vbus-supply =3D <&avdd_3v3_periph>; + }; + + sdmmc1: mmc@c8000000 { + status =3D "okay"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + assigned-clocks =3D <&tegra_car TEGRA20_CLK_SDMMC1>; + assigned-clock-parents =3D <&tegra_car TEGRA20_CLK_PLL_P>; + assigned-clock-rates =3D <50000000>; + + max-frequency =3D <50000000>; + keep-power-in-suspend; + bus-width =3D <4>; + non-removable; + + mmc-pwrseq =3D <&brcm_wifi_pwrseq>; + vmmc-supply =3D <&vdd_3v3_com>; + vqmmc-supply =3D <&vdd_1v8_vio>; + + /* Broadcom BCM4329HKUBG */ + wifi@1 { + compatible =3D "brcm,bcm4329-fmac"; + reg =3D <1>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + interrupt-names =3D "host-wake"; + }; + }; + + sdmmc3: mmc@c8000400 { + status =3D "okay"; + bus-width =3D <4>; + + cd-gpios =3D <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + disable-wp; + + vmmc-supply =3D <&vdd_usd>; + vqmmc-supply =3D <&vddio_usd>; + }; + + sdmmc4: mmc@c8000600 { + status =3D "okay"; + bus-width =3D <8>; + non-removable; + + vmmc-supply =3D <&vcore_emmc>; + vqmmc-supply =3D <&vdd_1v8_vio>; + }; + + backlight: backlight { + compatible =3D "led-backlight"; + + leds =3D <&backlight_led>; + + brightness-levels =3D <31 63 95 127 159 191 223 255>; + default-brightness-level =3D <6>; + }; + + /* 32KHz oscillator which is used by PMC */ + clk32k_in: clock-32k-in { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <32768>; + clock-output-names =3D "ref-oscillator"; + }; + + cpus { + cpu0: cpu@0 { + cpu-supply =3D <&vdd_cpu>; + operating-points-v2 =3D <&cpu0_opp_table>; + #cooling-cells =3D <2>; + }; + + cpu1: cpu@1 { + cpu-supply =3D <&vdd_cpu>; + operating-points-v2 =3D <&cpu0_opp_table>; + #cooling-cells =3D <2>; + }; + }; + + gpio-poweroff { + compatible =3D "gpio-poweroff"; + gpios =3D <&gpio TEGRA_GPIO(V, 7) GPIO_ACTIVE_LOW>; + timeout-ms =3D <500>; + }; + + haptic-feedback { + compatible =3D "gpio-vibrator"; + enable-gpios =3D <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; + vcc-supply =3D <&vdd_haptic>; + }; + + hdmi-connector { + compatible =3D "hdmi-connector"; + type =3D "d"; + + hpd-gpios =3D <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + ddc-i2c-bus =3D <&hdmi_ddc>; + + port { + hdmi_connector_in: endpoint { + remote-endpoint =3D <&hdmi_out>; + }; + }; + }; + + opp-table-emc { + /delete-node/ opp-666000000; + /delete-node/ opp-760000000; + }; + + brcm_wifi_pwrseq: pwrseq-wifi { + compatible =3D "mmc-pwrseq-simple"; + + clocks =3D <&tegra_pmc TEGRA_PMC_CLK_BLINK>; + clock-names =3D "ext_clock"; + + reset-gpios =3D <&gpio TEGRA_GPIO(U, 2) GPIO_ACTIVE_LOW>; + post-power-on-delay-ms =3D <200>; + power-off-delay-us =3D <200>; + }; + + vdd_5v0_sys: regulator-5v0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_5v0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + }; + + vdd_3v3_sys: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_3v3_vs"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + vin-supply =3D <&vdd_5v0_sys>; + }; + + vdd_1v2_lpddr2: regulator-lpddr2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vddio_ddr"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + vin-supply =3D <&vdd_hvio>; + }; + + vdd_5v0_panel: regulator-panel { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_5v0_disp"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + gpio =3D <&gpio TEGRA_GPIO(F, 7) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&vdd_5v0_sys>; + }; + + vdd_usd: regulator-usd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_usd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + gpio =3D <&gpio TEGRA_GPIO(F, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&vdd_3v3_sys>; + }; + + vdd_3v3_com: regulator-com { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_3v3_com"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + gpio =3D <&gpio TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&vdd_3v3_sys>; + }; + + vdd_hdmi_en: regulator-hdmi { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_5v0_hdmi_en"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio TEGRA_GPIO(F, 6) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&vdd_5v0_sys>; + }; + + sound { + compatible =3D "motorola,tegra-audio-cpcap-mot", + "nvidia,tegra-audio-cpcap"; + + nvidia,audio-routing =3D + "Headphones", "HSR", + "Headphones", "HSL", + "Int Spk", "SPKR", + "Int Spk", "SPKL", + "Earpiece", "EP", + "HSMIC", "Mic Jack", + "MICR", "Internal Mic 1", + "MICL", "Internal Mic 2"; + + nvidia,i2s-controller =3D <&tegra_i2s1>; + nvidia,audio-codec =3D <&cpcap_audio>; + + clocks =3D <&tegra_car TEGRA20_CLK_PLL_A>, + <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA20_CLK_CDEV1>; + clock-names =3D "pll_a", "pll_a_out0", "mclk"; + }; + + thermal-zones { + skin-thermal { + polling-delay-passive =3D <1000>; /* milliseconds */ + polling-delay =3D <5000>; /* milliseconds */ + + thermal-sensors =3D <&nct1008 0>; + + trips { + trip0: skin-alert { + /* throttle at 57C until temperature drops to 56.8C */ + temperature =3D <57000>; + hysteresis =3D <200>; + type =3D "passive"; + }; + + trip1: skin-crit { + /* shut down at 65C */ + temperature =3D <65000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + + cooling-maps { + map0 { + trip =3D <&trip0>; + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-thermal { + polling-delay-passive =3D <500>; /* milliseconds */ + polling-delay =3D <1500>; /* milliseconds */ + + thermal-sensors =3D <&nct1008 1>; + + trips { + trip2: cpu-alert { + /* throttle at 75C until temperature drops to 74.8C */ + temperature =3D <75000>; + hysteresis =3D <200>; + type =3D "passive"; + }; + + trip3: cpu-crit { + /* shut down at 90C */ + temperature =3D <90000>; + hysteresis =3D <2000>; + type =3D "critical"; + }; + }; + + cooling-maps { + map1 { + trip =3D <&trip2>; + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/nvidia/tegra20-motorola-olympus.dts b/arch/a= rm/boot/dts/nvidia/tegra20-motorola-olympus.dts new file mode 100644 index 000000000000..f53a05797240 --- /dev/null +++ b/arch/arm/boot/dts/nvidia/tegra20-motorola-olympus.dts @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra20-motorola-mot.dtsi" + +/ { + model =3D "Motorola Atrix 4G (MB860)"; + compatible =3D "motorola,olympus", "nvidia,tegra20"; + + gpio@6000d000 { + volume-buttons-hog { + gpio-hog; + gpios =3D ; + output-low; + }; + }; + + i2c@7000c000 { + led-controller@38 { + led@1 { + reg =3D <1>; + + led-sources =3D <1 2>; + led-max-microamp =3D <8200>; + + ti,led-mode =3D <0>; + ti,linear-mapping-mode; + + label =3D ":keypad"; + }; + }; + + touchscreen@4a { + touchscreen-size-x =3D <930>; + touchscreen-size-y =3D <1018>; + touchscreen-min-x =3D <0>; + + /* Buttons are just a part of touchscreen */ + }; + + light-sensor@44 { + compatible =3D "isil,isl29030"; + reg =3D <0x44>; + + interrupt-parent =3D <&gpio>; + interrupts =3D ; + + vdd-supply =3D <&vdd_hvio>; + }; + }; + + i2c@7000d000 { + accelerometer@f { + mount-matrix =3D "1", "0", "0", + "0", "1", "0", + "0", "0", "-1"; + }; + }; + + spi@7000d600 { + pmic@0 { + led-adl { + status =3D "disabled"; + }; + }; + }; + + /* Motorola BH6X battery cell */ + battery: battery-cell { + compatible =3D "simple-battery"; + device-chemistry =3D "lithium-ion-polymer"; + + voltage-min-design-microvolt =3D <3200000>; + voltage-max-design-microvolt =3D <4200000>; + + charge-full-design-microamp-hours =3D <1880000>; + energy-full-design-microwatt-hours =3D <7000000>; + + constant-charge-voltage-max-microvolt =3D <4200000>; + operating-range-celsius =3D <0 45>; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + key-volume-down { + label =3D "Volume Down"; + gpios =3D <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <10>; + wakeup-event-action =3D ; + wakeup-source; + }; + + key-volume-up { + label =3D "Volume Up"; + gpios =3D <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <10>; + wakeup-event-action =3D ; + wakeup-source; + }; + }; + + sound { + nvidia,model =3D "Motorola Atrix 4G (MB860) CPCAP"; + }; +}; --=20 2.51.0