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Fri, 29 May 2026 00:14:28 -0700 (PDT) Received: from ryzen ([2601:644:8000:5b5d:7285:c2ff:fe45:8a32]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-137b2d04287sm950680c88.0.2026.05.29.00.14.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 00:14:26 -0700 (PDT) From: Rosen Penev To: linuxppc-dev@lists.ozlabs.org Cc: Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Linus Walleij , Bartosz Golaszewski , linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM) Subject: [PATCH] gpio: move ppc4xx gpio driver from arch/powerpc to drivers/gpio Date: Fri, 29 May 2026 00:14:08 -0700 Message-ID: <20260529071408.38689-1-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the ppc4xx gpio driver out of arch/powerpc/platforms/44x/ into drivers/gpio/gpio-ppc44x.c. The driver follows the same pattern as other PowerPC GPIO drivers already in drivers/gpio/ (e.g. gpio-mpc8xxx, gpio-mpc5200). - Replace PPC-specific clrbits32()/setbits32() with local helpers using ioread32be()/iowrite32be() so the driver can be built on any architecture with COMPILE_TEST - Renamed Kconfig symbol from PPC4xx_GPIO to GPIO_PPC44X (40x was removed in 47d13a269bbd, only 44x remains) - Rename symbols in the driver with 44x instead of 4xx to reflect the absense of 40x. - Changed dependency to depends on 44x || COMPILE_TEST - Updated ppc44x_defconfig and warp_defconfig to use the new symbol - Marked the new option as tristate (was bool) since the driver supports module build via module_platform_driver() Assisted-by: OpenCode:BigPickle Signed-off-by: Rosen Penev --- v2: COMPILE_TEST everywhere arch/powerpc/configs/44x/warp_defconfig | 2 +- arch/powerpc/configs/ppc44x_defconfig | 2 +- arch/powerpc/platforms/44x/Kconfig | 8 -- arch/powerpc/platforms/44x/Makefile | 1 - drivers/gpio/Kconfig | 7 ++ drivers/gpio/Makefile | 1 + .../44x/gpio.c =3D> drivers/gpio/gpio-ppc44x.c | 88 +++++++++++-------- 7 files changed, 62 insertions(+), 47 deletions(-) rename arch/powerpc/platforms/44x/gpio.c =3D> drivers/gpio/gpio-ppc44x.c (= 61%) diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs= /44x/warp_defconfig index 5757625469c4..d6014b9c5708 100644 --- a/arch/powerpc/configs/44x/warp_defconfig +++ b/arch/powerpc/configs/44x/warp_defconfig @@ -12,7 +12,7 @@ CONFIG_MODULE_UNLOAD=3Dy # CONFIG_BLK_DEV_BSG is not set # CONFIG_EBONY is not set CONFIG_WARP=3Dy -CONFIG_PPC4xx_GPIO=3Dy +CONFIG_GPIO_PPC44X=3Dy CONFIG_HZ_1000=3Dy CONFIG_CMDLINE=3D"ip=3Don" # CONFIG_PCI is not set diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/p= pc44x_defconfig index 41c930f74ed4..b0c7ad8c6d9b 100644 --- a/arch/powerpc/configs/ppc44x_defconfig +++ b/arch/powerpc/configs/ppc44x_defconfig @@ -22,7 +22,7 @@ CONFIG_GLACIER=3Dy CONFIG_REDWOOD=3Dy CONFIG_EIGER=3Dy CONFIG_YOSEMITE=3Dy -CONFIG_PPC4xx_GPIO=3Dy +CONFIG_GPIO_PPC44X=3Dy CONFIG_MATH_EMULATION=3Dy CONFIG_NET=3Dy CONFIG_PACKET=3Dy diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44= x/Kconfig index d9717bf04a3f..150813cea945 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -227,14 +227,6 @@ config PPC44x_SIMPLE help This option enables the simple PowerPC 44x platform support. -config PPC4xx_GPIO - bool "PPC4xx GPIO support" - depends on 44x - select GPIO_GENERIC - select GPIOLIB - help - Enable gpiolib support for ppc440 based boards - # 44x specific CPU modules, selected based on the board above. config 440EP bool diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/4= 4x/Makefile index ca7b1bb442d9..179468a00f5e 100644 --- a/arch/powerpc/platforms/44x/Makefile +++ b/arch/powerpc/platforms/44x/Makefile @@ -15,4 +15,3 @@ obj-$(CONFIG_FSP2) +=3D fsp2.o obj-$(CONFIG_PCI) +=3D pci.o obj-$(CONFIG_PPC4xx_HSTA_MSI) +=3D hsta_msi.o obj-$(CONFIG_PPC4xx_CPM) +=3D cpm.o -obj-$(CONFIG_PPC4xx_GPIO) +=3D gpio.o diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 89c77ec6c205..7374f82b7040 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -593,6 +593,13 @@ config GPIO_POLARFIRE_SOC help Say yes here to support the GPIO controllers on Microchip FPGAs. +config GPIO_PPC44X + tristate "PPC44x GPIO support" + depends on 44x || COMPILE_TEST + select GPIO_GENERIC + help + Enable gpiolib support for ppc440 based boards. + config GPIO_PXA bool "PXA GPIO support" depends on ARCH_PXA || ARCH_MMP || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 8ec03c9aec20..9e8c9ca1d3fb 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -146,6 +146,7 @@ obj-$(CONFIG_GPIO_PCIE_IDIO_24) +=3D gpio-pcie-idio-24= .o obj-$(CONFIG_GPIO_PCI_IDIO_16) +=3D gpio-pci-idio-16.o obj-$(CONFIG_GPIO_PISOSR) +=3D gpio-pisosr.o obj-$(CONFIG_GPIO_PL061) +=3D gpio-pl061.o +obj-$(CONFIG_GPIO_PPC44X) +=3D gpio-ppc44x.o obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) +=3D gpio-pmic-eic-sprd.o obj-$(CONFIG_GPIO_POLARFIRE_SOC) +=3D gpio-mpfs.o obj-$(CONFIG_GPIO_PXA) +=3D gpio-pxa.o diff --git a/arch/powerpc/platforms/44x/gpio.c b/drivers/gpio/gpio-ppc44x.c similarity index 61% rename from arch/powerpc/platforms/44x/gpio.c rename to drivers/gpio/gpio-ppc44x.c index 6b4814ed12b5..cc7796e0cfbd 100644 --- a/arch/powerpc/platforms/44x/gpio.c +++ b/drivers/gpio/gpio-ppc44x.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * PPC4xx gpio driver + * PPC44x gpio driver * * Copyright (c) 2008 Harris Corporation * Copyright (c) 2008 Sascha Hauer , Pengutronix @@ -22,7 +22,7 @@ #define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2)) /* Physical GPIO register layout */ -struct ppc4xx_gpio { +struct ppc44x_gpio { __be32 or; __be32 tcr; __be32 osrl; @@ -43,11 +43,27 @@ struct ppc4xx_gpio { __be32 isr3h; }; -struct ppc4xx_gpio_chip { +struct ppc44x_gpio_chip { struct gpio_generic_chip chip; void __iomem *regs; }; +static inline void ppc44x_clrbits32(void __iomem *addr, u32 mask) +{ + u32 val =3D ioread32be(addr); + + val &=3D ~mask; + iowrite32be(val, addr); +} + +static inline void ppc44x_setbits32(void __iomem *addr, u32 mask) +{ + u32 val =3D ioread32be(addr); + + val |=3D mask; + iowrite32be(val, addr); +} + /* * GPIO LIB API implementation for GPIOs * @@ -55,9 +71,9 @@ struct ppc4xx_gpio_chip { */ static inline void -__ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +__ppc44x_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) { - struct ppc4xx_gpio_chip *chip =3D gpiochip_get_data(gc); + struct ppc44x_gpio_chip *chip =3D gpiochip_get_data(gc); struct gpio_generic_chip *gen_gc =3D &chip->chip; if (val) @@ -68,29 +84,29 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gp= io, int val) gpio_generic_write_reg(gen_gc, gen_gc->reg_set, gen_gc->sdata); } -static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int ppc44x_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) { - struct ppc4xx_gpio_chip *chip =3D gpiochip_get_data(gc); + struct ppc44x_gpio_chip *chip =3D gpiochip_get_data(gc); struct gpio_generic_chip *gen_gc =3D &chip->chip; - struct ppc4xx_gpio __iomem *regs =3D chip->regs; + struct ppc44x_gpio __iomem *regs =3D chip->regs; unsigned long flags; gpio_generic_chip_lock_irqsave(gen_gc, flags); /* Disable open-drain function */ - clrbits32(®s->odr, GPIO_MASK(gpio)); + ppc44x_clrbits32(®s->odr, GPIO_MASK(gpio)); /* Float the pin */ - clrbits32(®s->tcr, GPIO_MASK(gpio)); + ppc44x_clrbits32(®s->tcr, GPIO_MASK(gpio)); gen_gc->sdir &=3D ~GPIO_MASK(gpio); /* Bits 0-15 use TSRL/OSRL, bits 16-31 use TSRH/OSRH */ if (gpio < 16) { - clrbits32(®s->osrl, GPIO_MASK2(gpio)); - clrbits32(®s->tsrl, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->osrl, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->tsrl, GPIO_MASK2(gpio)); } else { - clrbits32(®s->osrh, GPIO_MASK2(gpio)); - clrbits32(®s->tsrh, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->osrh, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->tsrh, GPIO_MASK2(gpio)); } gpio_generic_chip_unlock_irqrestore(gen_gc, flags); @@ -99,32 +115,32 @@ static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, un= signed int gpio) } static int -ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +ppc44x_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { - struct ppc4xx_gpio_chip *chip =3D gpiochip_get_data(gc); + struct ppc44x_gpio_chip *chip =3D gpiochip_get_data(gc); struct gpio_generic_chip *gen_gc =3D &chip->chip; - struct ppc4xx_gpio __iomem *regs =3D chip->regs; + struct ppc44x_gpio __iomem *regs =3D chip->regs; unsigned long flags; gpio_generic_chip_lock_irqsave(gen_gc, flags); /* First set initial value */ - __ppc4xx_gpio_set(gc, gpio, val); + __ppc44x_gpio_set(gc, gpio, val); /* Disable open-drain function */ - clrbits32(®s->odr, GPIO_MASK(gpio)); + ppc44x_clrbits32(®s->odr, GPIO_MASK(gpio)); /* Drive the pin */ - setbits32(®s->tcr, GPIO_MASK(gpio)); + ppc44x_setbits32(®s->tcr, GPIO_MASK(gpio)); gen_gc->sdir |=3D GPIO_MASK(gpio); /* Bits 0-15 use TSRL, bits 16-31 use TSRH */ if (gpio < 16) { - clrbits32(®s->osrl, GPIO_MASK2(gpio)); - clrbits32(®s->tsrl, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->osrl, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->tsrl, GPIO_MASK2(gpio)); } else { - clrbits32(®s->osrh, GPIO_MASK2(gpio)); - clrbits32(®s->tsrh, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->osrh, GPIO_MASK2(gpio)); + ppc44x_clrbits32(®s->tsrh, GPIO_MASK2(gpio)); } gpio_generic_chip_unlock_irqrestore(gen_gc, flags); @@ -134,14 +150,14 @@ ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned in= t gpio, int val) return 0; } -static int ppc4xx_gpio_probe(struct platform_device *ofdev) +static int ppc44x_gpio_probe(struct platform_device *ofdev) { struct device *dev =3D &ofdev->dev; struct device_node *np =3D dev->of_node; - struct ppc4xx_gpio_chip *chip; + struct ppc44x_gpio_chip *chip; struct gpio_generic_chip_config config; struct gpio_chip *gc; - struct ppc4xx_gpio __iomem *regs; + struct ppc44x_gpio __iomem *regs; int ret; chip =3D devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); @@ -169,8 +185,8 @@ static int ppc4xx_gpio_probe(struct platform_device *of= dev) gc =3D &chip->chip.gc; gc->fwnode =3D dev_fwnode(dev); - gc->direction_input =3D ppc4xx_gpio_dir_in; - gc->direction_output =3D ppc4xx_gpio_dir_out; + gc->direction_input =3D ppc44x_gpio_dir_in; + gc->direction_output =3D ppc44x_gpio_dir_out; gc->label =3D devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); if (!gc->label) @@ -179,20 +195,20 @@ static int ppc4xx_gpio_probe(struct platform_device *= ofdev) return devm_gpiochip_add_data(dev, gc, chip); } -static const struct of_device_id ppc4xx_gpio_match[] =3D { +static const struct of_device_id ppc44x_gpio_match[] =3D { { .compatible =3D "ibm,ppc4xx-gpio", }, {}, }; -MODULE_DEVICE_TABLE(of, ppc4xx_gpio_match); +MODULE_DEVICE_TABLE(of, ppc44x_gpio_match); -static struct platform_driver ppc4xx_gpio_driver =3D { - .probe =3D ppc4xx_gpio_probe, +static struct platform_driver ppc44x_gpio_driver =3D { + .probe =3D ppc44x_gpio_probe, .driver =3D { - .name =3D "ppc4xx-gpio", - .of_match_table =3D ppc4xx_gpio_match, + .name =3D "ppc44x-gpio", + .of_match_table =3D ppc44x_gpio_match, }, }; -module_platform_driver(ppc4xx_gpio_driver); +module_platform_driver(ppc44x_gpio_driver); -- 2.54.0