From nobody Mon Jun 8 11:02:51 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2749F3DF01F for ; Fri, 29 May 2026 16:30:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; cv=none; b=KJuZlnr48ZdCkWD96vLPcx9R2ozUqrKXYxeiIOU4QM2Y5QzCTuedKNg97DZ+X+AL07jvQicjYdxDj1MchbowHHKkyd59U8JiyO442YKouzpbyMt4xKRi3/rJ1NfQPbCdi9vQuFTsmee3vf0+ntmYWNcpUMvVkHCJGJKXd3qXbRE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; c=relaxed/simple; bh=HxmXIxsZ+GkSsf6d9iOaQ7OSX8uru4aus12FnUWNfxU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UoL3ovCC4H6uuReN0nG29OQ0/kRTBHjWpLBQ9qdTQ9dUmAX/lUdokOpciR/xIah/f+2hDy/2CxPX7PZde2GvEbSWmcc9HBJU+PkwxOuBKWI+m9QTDlGpbukf2gQ6qKRbFDYjS9FdCeuAlNWdHpFhADJkhuRNmn0fV0Rqt0s7eSw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=zBCvihGO; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="zBCvihGO" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 41F68C62461; Fri, 29 May 2026 16:30:17 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 8164A601FA; Fri, 29 May 2026 16:30:16 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0C8E310888CC2; Fri, 29 May 2026 18:30:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1780072215; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=zSvVa76bozjvegooFQ2sxhnthAp8wr8yKMUnprg+yS4=; b=zBCvihGO/skiDR78t15MyXF8fsqGVJRcfPAsP1jEu2uMVXKyO5ecBAHxeUIhVudCkmF8xz CHX65v4Pj8VT0a4PwvPkz7ziINFmwPKBNm97tSKNLXqrRsHqCxoG6sukVfap7W1rVKGGCI p9pmRHlY3GNVsJs3/pt5DBywcC0uPQUkM1jK6jEyAAlPMbUen0tsda6vnrXmMqO+qxp8My 8tmiX878uqfFJVmJBYj+UhN9HTyN6nFsgdP3Jpv5pr0cJ+mDPzO8LGpPNGTe3ZZiIdj892 OhymwJDz6l1shxYfbFjbvpujLdLk7SyElTI9GFu4A+fxPQru3qEvwkrKMutEuw== From: "Miquel Raynal (DAVE)" Date: Fri, 29 May 2026 18:29:56 +0200 Subject: [PATCH 1/3] mtd: rawnand: pl353: Update timings at the right moment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-dave-upstream-nand-fixes-v1-1-8c72aa23aee2@bootlin.com> References: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> In-Reply-To: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> To: Michal Simek , Richard Weinberger , Vignesh Raghavendra , Andrea Scian Cc: Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal , Olivier Sobrie X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 If several CE are wired, we would write the registers for every chip one after the other, and reselect the correct timings for the first chip the use wants to use after probe. This is not exactly efficient and could slightly be improved since we already have a helper that applies the configuration if there is a chip change. Instead of programming the registers in ->setup_interface(), let's just drop the pointer to the chip and let the nand_select_target() helper do its magic. Cc: Olivier Sobrie Signed-off-by: Miquel Raynal (DAVE) Acked-by: Olivier Sobrie Tested-by: Olivier Sobrie --- Olivier, This is an enhancement to your previous patch which already works. Can you please tell me if that change is okay for you? Thanks, Miqu=C3=A8l --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nan= d/raw/pl35x-nand-controller.c index f2c65eb7a8d9..986019b42153 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -862,8 +862,11 @@ static int pl35x_nfc_setup_interface(struct nand_chip = *chip, int cs, PL35X_SMC_NAND_TAR_CYCLES(tmgs.t_ar) | PL35X_SMC_NAND_TRR_CYCLES(tmgs.t_rr); =20 - writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES); - pl35x_smc_update_regs(nfc); + /* + * Reset nfc->selected_chip so the next command will cause the timing + * registers to be updated in ->*_select_target(). + */ + nfc->selected_chip =3D NULL; =20 return 0; } --=20 2.53.0 From nobody Mon Jun 8 11:02:51 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1673E317B for ; Fri, 29 May 2026 16:30:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; cv=none; b=IYstkYFwdUyLnrEQEbwLiVtQTCA4MT9kz/rn4Rb6HMCg4OvlFpCOyQVs0rD4PNKsUVtp1JVAjSxKpGCEuZd5wgRtgM/eDvLrOqY7AP3Hp44u/IKj5TJFUPEkQYnMKCRC02DdV57B1/4KF2xuoYdLUxSSluLPnsOlAXMKry+0rtE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072220; c=relaxed/simple; bh=EshJtKvDtKCj+UL3Q6zhjtvpwFNQ8xK5ToenTDu4tpQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=C6aYlnbTnAsDeLwghY+4PcgCeF1NMgxZGs+3rvKXsVdOfTW3QSGkVQ/JkVu+Gjpl7tAGt3PXLGUlJQYvqPOMP2eJrHPbpN/eWRRGeBV/WcwqWVGGyj8AZIzlGfsc6Hp6r3Xl5Qf9Fj6r86tBTOgkaOU2cszNQF8rHCLrq7iZKns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=hcAxgKPn; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="hcAxgKPn" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id F16204E42D93; Fri, 29 May 2026 16:30:17 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C74EE601FA; Fri, 29 May 2026 16:30:17 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 55ABA10888CC6; Fri, 29 May 2026 18:30:16 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1780072217; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=lgdiO3aZNk41NZamSPA1ZPEFzEUzPqxYcHHOBzZNsnY=; b=hcAxgKPnksVp9dFX/J7K+ldpVTY1UJQTBnTzLv/NtLO4SyLDuvP6j1qhc1LaB2xnX6ebfm pTtY4e7u9UETUoXIublwFGCpg81ask40py6Az7iGfU+DSpLAIpYp0XdlEg4h3pLjR8gOFX i+x3Hupoic8EDgVwHZtwFDd7v3yuOTbeI2Tc3qmyGlvRUH6hzKPkOgYC3ZsZpbBsiDRa11 Twby6swkuBahACrq7S36ywpJmG3Y4rvbcT/UgLLbsECPFESCpJPqdhkqlnBgvF3QyD8Yzf XuHmy4dYjwkXkZXuAlCoEZ9LPmnTN8KifXCzEnP86gX/g3zrcMwV+o4JPh20Sg== From: "Miquel Raynal (DAVE)" Date: Fri, 29 May 2026 18:29:57 +0200 Subject: [PATCH 2/3] mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-dave-upstream-nand-fixes-v1-2-8c72aa23aee2@bootlin.com> References: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> In-Reply-To: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> To: Michal Simek , Richard Weinberger , Vignesh Raghavendra , Andrea Scian Cc: Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal , stable@vger.kernel.org X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Any access not using the hardware ECC engine should be monolithic because the controller has its very own way of handling the end of a transaction during operation configuration, so we cannot easily make repeated reads. This has the side effect of fixing support for software ECC engines. Suggested-by: Andrea Scian Cc: stable@vger.kernel.org Fixes: 08d8c62164a3 ("mtd: rawnand: pl353: Add support for the ARM PL353 SM= C NAND controller") Signed-off-by: Miquel Raynal (DAVE) --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nan= d/raw/pl35x-nand-controller.c index 986019b42153..a941b5c836a3 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -917,7 +917,6 @@ static int pl35x_nand_init_hw_ecc_controller(struct pl3= 5x_nandc *nfc, chip->ecc.steps =3D mtd->writesize / chip->ecc.size; chip->ecc.read_page =3D pl35x_nand_read_page_hwecc; chip->ecc.write_page =3D pl35x_nand_write_page_hwecc; - chip->ecc.write_page_raw =3D nand_monolithic_write_page_raw; pl35x_smc_set_ecc_pg_size(nfc, chip, mtd->writesize); =20 nfc->ecc_buf =3D devm_kmalloc(nfc->dev, chip->ecc.bytes * chip->ecc.steps, @@ -984,7 +983,6 @@ static int pl35x_nand_attach_chip(struct nand_chip *chi= p) case NAND_ECC_ENGINE_TYPE_NONE: case NAND_ECC_ENGINE_TYPE_SOFT: dev_dbg(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n"); - chip->ecc.write_page_raw =3D nand_monolithic_write_page_raw; break; case NAND_ECC_ENGINE_TYPE_ON_HOST: dev_dbg(nfc->dev, "Using hardware ECC\n"); @@ -998,6 +996,9 @@ static int pl35x_nand_attach_chip(struct nand_chip *chi= p) return -EINVAL; } =20 + chip->ecc.read_page_raw =3D nand_monolithic_read_page_raw; + chip->ecc.write_page_raw =3D nand_monolithic_write_page_raw; + return 0; } =20 --=20 2.53.0 From nobody Mon Jun 8 11:02:51 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E73183EB810 for ; Fri, 29 May 2026 16:30:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072223; cv=none; b=Nrd/C3yWqozEmux3m2ewMN/1Semy2Z2XeKQ3/ZztTpBHbIeuJFsBcA2J6HxwpVC4G/lKs52KzME9LjnvE9f0FmabFqe+XDuYcSAil28NpGG7iv/1bEsMGpbeWHU+U1xpkla1KGOorUsDhYAsz88eRwkJXOSe3xYiXDvuqY/+Q2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780072223; c=relaxed/simple; bh=Aa2/GAfPQsXfpz/YgkgvY0pdWsm+p+SsnQ3P7WNwlIw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CLxWalL/aBqbaXFgeyPjnhF/6VBpjWwuVqARXO8e5M7wBQ+COR9nBLONSSC+606MSoLO5OMFyansX2OBUtrKQEAJ4pEJjSqS5XIGUB19Qmn2huOi/NH7Q92lgbd0vgFHsKgYPkrvrP5x5nkRpVioQv+Sh2tvxHeBa//OVfnq/s0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=e3uLVx06; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="e3uLVx06" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id A3E9F1A373A for ; Fri, 29 May 2026 16:30:20 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 79BE3601FA; Fri, 29 May 2026 16:30:20 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8D5A710888CCE; Fri, 29 May 2026 18:30:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1780072218; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=iAAD7ds+fYuXPAPJynykRhbA8G9w9uCf5SM4HMT6ftM=; b=e3uLVx06b8fdzVBzRCJy0Y1+5c90ARy0Wx6gcMRxdM8IPeMV3Cw07h8h8r3pgWPof92zVF 8/9zaIMpR3Guu0e1HizE05GyV3qqBHy7oT0VdZJHA5OGA/lRO4suNIx9V0e0josqmeDH+a wQRESsDyra1c6mIUw7h0ccdhWmsl38XSKpYIDCuEFXLCV1mP48X5mX2V54jbknohsckjjV yM0EbK8BPe4AyjTJBTtjywMd9t0xT6K2v2Xl1P8b0PQQp8aqrVg6KtYIHckgieTN7sOxm5 BAFKNZ3e8RKEmiAtlmj3lDH5i1RrsUhKADT33t+jRrC+bR9zPu0wSmT7/slDyg== From: "Miquel Raynal (DAVE)" Date: Fri, 29 May 2026 18:29:58 +0200 Subject: [PATCH 3/3] mtd: rawnand: pl353: Fix debug prints Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-dave-upstream-nand-fixes-v1-3-8c72aa23aee2@bootlin.com> References: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> In-Reply-To: <20260529-dave-upstream-nand-fixes-v1-0-8c72aa23aee2@bootlin.com> To: Michal Simek , Richard Weinberger , Vignesh Raghavendra , Andrea Scian Cc: Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 They are partially incorrect since "software" engine does not mean hamming, the "none" cae is also falling into this print, and on-die means there is some kind of hardware support; we prefer to use the wording on-host vs. on-die. Fix all those prints. Fixes: 1e06dbfdfb85 ("mtd: rawnand: pl353: Add message about ECC mode") Signed-off-by: Miquel Raynal (DAVE) --- drivers/mtd/nand/raw/pl35x-nand-controller.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nan= d/raw/pl35x-nand-controller.c index a941b5c836a3..4d4eaa5bdcf7 100644 --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c @@ -975,17 +975,19 @@ static int pl35x_nand_attach_chip(struct nand_chip *c= hip) =20 switch (chip->ecc.engine_type) { case NAND_ECC_ENGINE_TYPE_ON_DIE: - dev_dbg(nfc->dev, "Using on-die ECC\n"); + dev_dbg(nfc->dev, "Using on-die hardware ECC\n"); /* Keep these legacy BBT descriptors for ON_DIE situations */ chip->bbt_td =3D &bbt_main_descr; chip->bbt_md =3D &bbt_mirror_descr; fallthrough; case NAND_ECC_ENGINE_TYPE_NONE: + dev_dbg(nfc->dev, "Using no ECC engine\n"); + break; case NAND_ECC_ENGINE_TYPE_SOFT: - dev_dbg(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n"); + dev_dbg(nfc->dev, "Using software ECC\n"); break; case NAND_ECC_ENGINE_TYPE_ON_HOST: - dev_dbg(nfc->dev, "Using hardware ECC\n"); + dev_dbg(nfc->dev, "Using on-host hardware ECC\n"); ret =3D pl35x_nand_init_hw_ecc_controller(nfc, chip); if (ret) return ret; --=20 2.53.0