From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A13EF3ABD95; Fri, 29 May 2026 08:47:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044448; cv=none; b=Z967uaCe0d+N2Wj81g/TKhJAg/c0R5qbKG7Nl4LEVssuO/fSEwi11JmewJeCGd5N017PK9jdwn5IatflE2mm4wrF5HeTE8EQ1AqUn3+8QI4mQiRq2mYCjjx1k8qVoYXJ4CGTtPd7UylXV+U+g6nkHtlowL2D1GgvcmGRJQ3Mj1g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044448; c=relaxed/simple; bh=8anzXdZ8HAQtn0QInn5rmkkZxKsJonzyWgfJ2p2+Jbg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TSIPFcaLLfF+P6S+i6v9bo1f8VYZ2pRolYKpAxCfKzvE0upjRpULqzaU7HPU82JxJaOeTU0QXF58ekynH2QV3VcUt1XgC8wpWCNk0qRvLUG4R+QvO0nSilMzS5cSeOlg3cQyqM+TVmuloVsOF85a5AWZMyQWiiSt+dO38hjk4ko= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=oLScTJ9D; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="oLScTJ9D" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B615EA06; Fri, 29 May 2026 10:46:54 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044415; bh=8anzXdZ8HAQtn0QInn5rmkkZxKsJonzyWgfJ2p2+Jbg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=oLScTJ9D1OBwMa1ye030fpooaQsRWCxQiHPqbmlWerbGESX76GIf+CMMU7XTBPseG skzsDpy90j7xl0t+0GWEs8u6mx95005PZrcGv7WPEweJuXemWdyII0mvw+1M+dH06s +N1Y0SbUXrDDfU1bpdHsTHzJ8gtZ62kpp8jMda10= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:31 +0300 Subject: [PATCH v3 01/15] dt-bindings: display: ti: Move ti,am62l-dss binding to a new binding file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-1-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10289; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=8anzXdZ8HAQtn0QInn5rmkkZxKsJonzyWgfJ2p2+Jbg=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKLpkGZm7WUTEYZwOQfjYgi3hoDYVFlc/mvd D2jRI8hibOJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSiwAKCRD6PaqMvJYe 9SEDEACTV6E39xZhMRKmhdFDhSzqM0vLIYVFI+ks+Ghpvr0Uv6Ij2faMINEnGhNdOjXevVecKSE jdJtuz3s8GjOD4/u4V9GNTekUDE2v0atgncuoGMTk1tJz7c319JuypG1J+Y4BkFFYKD3oyUhQhH 9h2OBWJgGcfUUIQHoR+njVfI91GMAprTSglnkxSHe5UYI02vgVLSqwjPayJ4sziTyXk9kFeZcDL da12F3yqws40WacuhrqR9iYCVB164otVOkjHU3fWNr9OG+OEbYyzpisqJ417U05vCvIinAjplkk zdrY2hTSZFVjVqI3tXjIfTuKHow+lmMAYmoVwTL66Jqp5lOlD2FrVJ6p8W7Vy+vJ2K+EcEtLsL9 OfgDD5Qv02heqkVdTuKT7FmfRJOsnXDCk83oxiPIsAxPeoABUWjSUyHIauRkUWQKQtOqBIDFf3D VWJz8EItib3RE3oLBjkbKYXmcJxfW6xyhoJxE4huSOjnpmg8wBM6ICcPeEcIgmYNa+E3gkUd2ku LE9hIRNrp5IzYY0jmuLurx8bgSXEHZyeJzeq0DSkfG+N4N0EAZHWg+EDl8nR3tQWvGZEumpakX0 yOHZhA1J3+ciQtzLNOVJ4/kE8oXoPslwFO37hW1M5iP0cmzwzjx070XbboIxfQBclWrdyAf0gMI wPhi3LD4mYq0d7A== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 We currently have two binding files for different TI K3 DSS versions: ti,j721e-dss.yaml which contains bindings for the "full" DSS version, with four planes and outputs, and ti,am65x-dss.yaml which used to contain bindings for the "lite" DSS version, with two planes and outputs. ti,am62l-dss binding was added recently to the ti,am65x-dss.yaml file, which only has a single plane and a single output. To keep with the above "binding file per DSS model" style, and to simplify the ti,am65x-dss.yaml file, let's move the ti,am62l-dss to a separate, new file. Reviewed-by: Rob Herring (Arm) Signed-off-by: Tomi Valkeinen --- .../bindings/display/ti/ti,am62l-dss.yaml | 136 +++++++++++++++++= ++++ .../bindings/display/ti/ti,am65x-dss.yaml | 94 +++----------- MAINTAINERS | 1 + 3 files changed, 156 insertions(+), 75 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml new file mode 100644 index 000000000000..ce6185dca18d --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2026 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/ti/ti,am62l-dss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AM62L Display Subsystem + +maintainers: + - Tomi Valkeinen + +description: | + The AM62L display subsystem is a cut-down version of the TI Keystone + Display SubSystem. It has a single output port which supports DPI + format and a single video "lite plane" which does not support scaling. + The output port is routed to the SoC boundary via the DPI interface, + and the same DPI signals are also routed internally to the DSI Tx + controller present within the SoC. Due to clocking limitations only + one of the interfaces (DSI or DPI) can be used at a time. + +properties: + compatible: + const: ti,am62l-dss + + reg: + description: + Addresses to each DSS memory region described in the SoC's TRM. + items: + - description: common DSS register area + - description: VIDL1 light video plane + - description: OVR1 overlay manager for vp1 + - description: VP1 video port 1 + - description: common1 DSS register area + + reg-names: + items: + - const: common + - const: vidl1 + - const: ovr1 + - const: vp1 + - const: common1 + + clocks: + items: + - description: fck DSS functional clock + - description: vp1 Video Port 1 pixel clock + + clock-names: + items: + - const: fck + - const: vp1 + + assigned-clocks: + minItems: 1 + maxItems: 2 + + assigned-clock-parents: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + dma-coherent: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + The DSS DPI output port node from video port 1, which may be + connected to the external DPI pins or to the internal DSI Tx + controller. + + required: + - port@0 + + max-memory-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Input memory (from main memory to dispc) bandwidth limit in + bytes per second + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells =3D <2>; + #size-cells =3D <2>; + + dss: dss@30200000 { + compatible =3D "ti,am62l-dss"; + reg =3D <0x00 0x30200000 0x00 0x1000>, /* common */ + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ + <0x00 0x3020a000 0x00 0x1000>, /* vp1 */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "ovr1", "vp1", "common1"; + power-domains =3D <&scmi_pds 39>; + clocks =3D <&scmi_clk 162>, + <&scmi_clk 161>; + clock-names =3D "fck", "vp1"; + interrupts =3D ; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + dpi0_out: endpoint { + remote-endpoint =3D <&dsi_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 49a007cbcd3a..75d9640398f0 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -18,68 +18,45 @@ description: | internally routed to 2 OLDI TXes. The second video port supports DPI format. The first plane is full video plane with all features and the second is a "lite plane" without scaling support. - The AM62L display subsystem has a single output port which supports DPI - format but it only supports single video "lite plane" which does not sup= port - scaling. The output port is routed to SoC boundary via DPI interface and= same - DPI signals are also routed internally to DSI Tx controller present with= in the - SoC. Due to clocking limitations only one of the interface i.e. either D= SI or - DPI can be used at once. =20 properties: compatible: enum: - ti,am625-dss - ti,am62a7-dss - - ti,am62l-dss - ti,am65x-dss =20 reg: description: Addresses to each DSS memory region described in the SoC's TRM. - oneOf: - - items: - - description: common DSS register area - - description: VIDL1 light video plane - - description: VID video plane - - description: OVR1 overlay manager for vp1 - - description: OVR2 overlay manager for vp2 - - description: VP1 video port 1 - - description: VP2 video port 2 - - description: common1 DSS register area - - items: - - description: common DSS register area - - description: VIDL1 light video plane - - description: OVR1 overlay manager for vp1 - - description: VP1 video port 1 - - description: common1 DSS register area + items: + - description: common DSS register area + - description: VIDL1 light video plane + - description: VID video plane + - description: OVR1 overlay manager for vp1 + - description: OVR2 overlay manager for vp2 + - description: VP1 video port 1 + - description: VP2 video port 2 + - description: common1 DSS register area =20 reg-names: - oneOf: - - items: - - const: common - - const: vidl1 - - const: vid - - const: ovr1 - - const: ovr2 - - const: vp1 - - const: vp2 - - const: common1 - - items: - - const: common - - const: vidl1 - - const: ovr1 - - const: vp1 - - const: common1 + items: + - const: common + - const: vidl1 + - const: vid + - const: ovr1 + - const: ovr2 + - const: vp1 + - const: vp2 + - const: common1 =20 clocks: - minItems: 2 items: - description: fck DSS functional clock - description: vp1 Video Port 1 pixel clock - description: vp2 Video Port 2 pixel clock =20 clock-names: - minItems: 2 items: - const: fck - const: vp1 @@ -113,8 +90,6 @@ properties: For AM625 DSS, the internal DPI output port node from video port 1. For AM62A7 DSS, the port is tied off inside the SoC. - For AM62L DSS, the DSS DPI output port node from video port 1 - or DSI Tx controller node connected to video port 1. properties: endpoint@0: $ref: /schemas/graph.yaml#/properties/endpoint @@ -189,38 +164,7 @@ allOf: properties: compatible: contains: - const: ti,am62l-dss - then: - properties: - ports: - properties: - port@1: false - reg: - maxItems: 5 - reg-names: - maxItems: 5 - clocks: - maxItems: 2 - clock-names: - maxItems: 2 - else: - properties: - reg: - minItems: 8 - reg-names: - minItems: 8 - clocks: - minItems: 3 - clock-names: - minItems: 3 - - - if: - properties: - compatible: - contains: - enum: - - ti,am62l-dss - - ti,am65x-dss + const: ti,am65x-dss then: properties: oldi-transmitters: false diff --git a/MAINTAINERS b/MAINTAINERS index b539be153f6a..1285572db151 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8791,6 +8791,7 @@ L: dri-devel@lists.freedesktop.org S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml +F: Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C06D03B9D86; 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arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="mwzEjsaX" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E48FB1254; Fri, 29 May 2026 10:46:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044416; bh=fzDQkAC1FEgeII5oaBsYalF51qtpuLbGjpBpq89aIjo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=mwzEjsaX/TNzvwgeHP5LYXiaIK6zKNysvdVLHiYmicZ38w40VWGKUKsqBoswgYCij jbhxJ6dlNLXivST/VnEFb/Pp6Vjhz5p4uy6ZCA7Et60rW4k0WW77/PYC7TkHTTHtMJ 24Z8llhzZu/x6jvYsO2jEqQJ0AcG1xshN+ibeEZc= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:32 +0300 Subject: [PATCH v3 02/15] dt-bindings: display: ti,am65x-dss: Simplify binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-2-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4126; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=fzDQkAC1FEgeII5oaBsYalF51qtpuLbGjpBpq89aIjo=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKLSD83oGAUC3OtfKMhgKnDcXa/xR119ai6u 1IrlVwbyx6JAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSiwAKCRD6PaqMvJYe 9YfiD/4p6W9i3/OfJZSuRwyyue3of3X7ohj83TUPIqsJb3/argKyg0Df+0H0Uv9hokKXC9oUPgU a3PufR1+sZOPrc/2yt7qncpHTTl4sFG8ldRq8fQojuMnxt5chFIHLh7lyZhAso255jrJ/rkksvS LY3e0qGxuzDhX8V6EbCf4wHYRLrQH1dLYNQ4eqAfKeNeIiemTWKiTl6rZ/du3WKlpnLgoZ81ta4 QmsDRreXrTd8rXS23oPIXrEzZ9Dr69YAu6zlBd0rasv25QgtjLjMXhpd+J6dg4GDinOgBVTSexM zCnr3b/QLiaWWvPyULyqQhSbSDn4V680exPM7PAAsVWj56LCPnR84V4i3zDf5cz/nWr6sG+paKE k8+WoeeAu/TDuYZTYhwjEk86N3RCmog+21dLmAnG9i1tpJshoVo5xYvJpPDv4bV+I8EGEEJbdbV CTCetFg2gAH+kYl/DUjRVY4ogCDFVrXm6UVx3Tc7CplJRK/DU665vil464/LBki0XFnGrycAUF3 kEYolsVbxFy8FVkUdrlWB2S/U63voELUqqf5NRwE0zAvqumwPlFFRefR8+bF/QZOvTh77m3urL5 VMKZpk1998vGBxcJb22PSnNkyA9jejGHkJnmbkBxTnMXjoxbpZJrD15SyuQ+2nTbS5IgEM3hAwB EvCV6N4Ub4kzkTw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 In principle the DT binding for the DSS IP should mainly cover the DSS IP. The current binding also covers the SoC integration topics outside the DSS, mainly via the endpoint related rules and descriptions. A more recent SoC, AM62P, has two instances of the DSS IP, and while both DSS IPs are identical, they are integrated slightly differently (e.g. which DSS output goes to an in-SoC DSI bridge, which goes to DPI pins, etc.). To make the bindings usable for both DSS instances, relax the binding slightly: remove the explicit endpoint rules, and generalize the descriptions. Reviewed-by: Rob Herring (Arm) Signed-off-by: Tomi Valkeinen --- .../bindings/display/ti/ti,am65x-dss.yaml | 55 ++++++++----------= ---- 1 file changed, 20 insertions(+), 35 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 75d9640398f0..588d72d4ec0d 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -12,12 +12,21 @@ maintainers: - Tomi Valkeinen =20 description: | - The AM625 and AM65x TI Keystone Display SubSystem has two output - ports and two video planes. In AM65x DSS, the first video port - supports 1 OLDI TX and in AM625 DSS, the first video port output is - internally routed to 2 OLDI TXes. The second video port supports DPI - format. The first plane is full video plane with all features and the - second is a "lite plane" without scaling support. + The Display Subsystem (DSS) used in e.g. AM65x and AM625 SoCs has two ou= tput + video ports (VP) and two video planes. The integration varies from SoC t= o SoC, + affecting the routing of the video ports. + + The first plane is full video plane with all features and the second is a + "lite plane" without scaling support. + + On AM65x, the first VP has an integrated OLDI TX, thus the first output = port + is OLDI output. The second VP is routed to external MIPI DPI pins. + + On AM625, the first VP is connected to two OLDI TX instances, and the se= cond + VP is routed to external MIPI DPI pins. + + On AM62A7, the first VP is tied off in the SoC, and the second VP is rou= ted to + external MIPI DPI pins. =20 properties: compatible: @@ -85,34 +94,15 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/properties/port - description: - For AM65x DSS, the OLDI output port node from video port 1. - For AM625 DSS, the internal DPI output port node from video - port 1. - For AM62A7 DSS, the port is tied off inside the SoC. - properties: - endpoint@0: - $ref: /schemas/graph.yaml#/properties/endpoint - description: - For AM625 DSS, VP Connection to OLDI0. - For AM65X DSS, OLDI output from the SoC. - - endpoint@1: - $ref: /schemas/graph.yaml#/properties/endpoint - description: - For AM625 DSS, VP Connection to OLDI1. - - anyOf: - - required: - - endpoint - - required: - - endpoint@0 - - endpoint@1 + description: | + AM65x: OLDI output from video port 1 + AM62A7: Not available, tied off inside the SoC + Other SoCs: Parallel video from video port 1 =20 port@1: $ref: /schemas/graph.yaml#/properties/port description: - The DSS DPI output port node from video port 2 + Parallel video from video port 2 =20 ti,am65x-oldi-io-ctrl: $ref: /schemas/types.yaml#/definitions/phandle @@ -168,11 +158,6 @@ allOf: then: properties: oldi-transmitters: false - ports: - properties: - port@0: - properties: - endpoint@1: false =20 required: - compatible --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C03F83B9D84; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 On some SoCs the OLDI blocks belong to the same power-domain as the main DSS block, but on some more recent SoCs the OLDI blocks have a controllable power-domain. Add the power-domain to the DT binding. Signed-off-by: Tomi Valkeinen Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yam= l b/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml index 8203ec5e5bb3..5dbf1f76dd3f 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml @@ -29,6 +29,9 @@ properties: clock-names: const: serial =20 + power-domains: + maxItems: 1 + ti,companion-oldi: $ref: /schemas/types.yaml#/definitions/phandle description: --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 557B43BB11F; Fri, 29 May 2026 08:47:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="DXxjY7ku" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 4D1A91ADF; Fri, 29 May 2026 10:46:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044419; bh=nPJzcPekfWg8VQk7v3Ppx+7G3lp2WtkHYg/I3DyeH3I=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DXxjY7kuuDatg2Xpfl1DoA3MGxufMYT6DpTT83IuSJDPTriU6T28M22X3ptfGRbZL 7Zbd2dYriZSRtmT4BC/K5PMrtL7xELwrae1pQN035au5JTNm/gPfPHkI53V1hi0EYb ez3wrLRpz4B7zDUuWiEs+1/b1er5u522Q+gXwSII= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:34 +0300 Subject: [PATCH v3 04/15] dt-bindings: display: ti,am65x-dss: Add ti,dpi-io-ctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 The DPI output pipeline in K3 SoCs contains the display subsystem (DSS) which produces the in-SoC parallel video signal, and a DPI block which adjusts the signal to the external MIPI DPI output. The DSS IP has registers to configure whether the data and sync signals are driven on rising or falling clock edge, and on some SoCs these are automatically conveyed to the DPI block which needs that configuration to properly output the MIPI DPI signal. However, on some SoCs the DPI block configuration has to be done manually, using an extra register outside the DSS, DPI0_CLK_CTRL in MAIN_CTRL_MMR_CFG0 block, which controls the DPI block's behavior. Currently the DPI0_CLK_CTRL is never written, so it's always 0, meaning the data and sync are always driven on a rising clock edge regardless of the DSS configuration. Add 'ti,dpi-io-ctrl' property, which contains phandle to the MAIN_CTRL_MMR_CFG0 block and the offset to the DPI0_CLK_CTRL register, so that the DSS driver can configure the data and sync signals correctly. Signed-off-by: Tomi Valkeinen --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 11 +++++++= ++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 588d72d4ec0d..902ae2122d86 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -113,6 +113,17 @@ properties: and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI interface to work. =20 + ti,dpi-io-ctrl: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + phandle to a syscon device node containing the DPI0_CLK_CTRL registe= r, + with the offset to DPI0_CLK_CTRL as an argument. + maxItems: 1 + items: + items: + - description: phandle to the syscon node + - description: DPI0_CLK_CTRL register offset + max-memory-bandwidth: $ref: /schemas/types.yaml#/definitions/uint32 description: --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F09323B8BA5; Fri, 29 May 2026 08:47:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044459; cv=none; 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spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="i6bYvpr/" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 84D7A20F9; Fri, 29 May 2026 10:46:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044420; bh=uYpBzCI5/EIYS0A0eORGLebFKyluSlYajSBf8Czw3RM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=i6bYvpr/Wh5Ll82dXtpjLWBx8b6W8KAMX/VhGN/qqqix/6bfkDFXqUty5auM0dml6 9mWdOCaCiBVtu+2I01wl+1/Ose5sio6fTvlG5hzvYp1e2ZQ5SSL6PyUqeHgPebx7fX 1N1ib0JYuQ4JgeJmkYKhfECGYck04E0hSrwhuRSA= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:35 +0300 Subject: [PATCH v3 05/15] dt-bindings: display: ti,am65x-dss: Add AM62P DSS Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-5-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3512; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=uYpBzCI5/EIYS0A0eORGLebFKyluSlYajSBf8Czw3RM=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKMbB14c2XE4t0f3oamTKKmG1ZiaLbx/63K6 6XxG0PYyuCJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSjAAKCRD6PaqMvJYe 9cs2D/9b/3lUX5/1QkZrCDXNlrtP/DySHlPixDNAkXipv7uOfcugtM8KbX5QJFkdTZ1aoJdpSzP lcXWyYBuwqK4ju0rflXnOEgqgZUVh6OVbP0qLNZVcJ2Fb1ONCxp0zmPD5d+22hUB80mSdvca3lC rcvDUJTGjGE77wCvkJ0vw4Y6rO1C7X9d4C2gEU37E8JlujuDe9YyzkW0vKY5GM4lIgk6+hKuTZy h3jXCZ8P2ssggJr0cPeo37W1iqkkuZJFJGdT2RjGWtotHTsXgGTxs/WMMgyc6ukBp2wYRUjK7xR P38oLzDOyPreyYKi9PqZhKP+A/UsC2yVeCiAV82ebQJnCI9FAII86PA1BxJmo5fXFq6YeUA3ohL 5sT5D2AMSgy5JgoDX90dNmINHQphONRqFLx7CoSCIZ4wGiFv/WmY4jb+C2jhJHvCHlwNA3P4ay8 f4PpUOU6IGMiQRCxxFclFOJLaO0SR5uzEkCJbCMKwYGzF8n+3sr6O3UxsH2QgFxMppK3Jf7Sq/Z qAit7SjO+vIez781FSqOSOeH8BDP3Hi/I+TfglX4jfPx2i0gwsWnyOWaqqY8cYYHXgqwGrWGXdl vgGO8fVo0URNsylI5qsvzBNA9l735d3T3PycHku7TLyqYlDqY5lgSqIYkK5IRBVKKepQk6E91Iy J+deiWB1yjnUVgQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 TI's AM62P, J722S and AM67A SoCs contain same implementation of the display subsystem (DSS). There are two instances of the DSS (DSS0 and DSS1), each with two video ports (VP) and two video planes. Additionally the SoCs contain two OLDI TXes (OLDI0 and OLDI1), a MIPI DSI TX and a MIPI DPI output path. DSS0 supports: - VP0: OLDI0 in single-link mode, or OLDI0 and OLDI1 in dual-link or clone mode. - VP1: DPI DSS1 supports: - VP0: OLDI1 in single-link mode, or DPI - VP1: DPI or DSI The DSI is only connected to VP1 of DSS1, but OLDI and DPI are shared between the DSS instances. Thus only a single VP can output to DPI, and a single VP can use an OLDI block. Note that in single-link configuration OLDI0 can be used by DSS0, and at the same time OLDI1 can be used by DSS1. The DSS IP itself is compatible with older SoCs. While we could use "ti,am625-dss" compatible string, we add a new one "ti,am62p-dss" to be on the safe side in case the driver needs to do something special for the dual-DSS case in the future. Original patch by Swamil Jain Reviewed-by: Rob Herring (Arm) Signed-off-by: Tomi Valkeinen --- .../bindings/display/ti/ti,am65x-dss.yaml | 27 ++++++++++++++++++= ++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 902ae2122d86..acb7ac635097 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -28,11 +28,38 @@ description: | On AM62A7, the first VP is tied off in the SoC, and the second VP is rou= ted to external MIPI DPI pins. =20 + AM62P SoC contains two instances of the DSS: + On AM62P DSS0, the first VP is connected to two OLDI TX instances (the s= econd + TX shared with DSS1), the second VP to external MIPI DPI pins (shared wi= th + DSS1). + On AM62P DSS1, the first VP is connected either to the second OLDI TX, or + external MIPI DPI pins. The second VP is connected to either the externa= l MIPI + DPI pins or a Cadence DSI TX. + + An important note about OLDIs on AM62P: + + There are two OLDI hardware blocks. Each OLDI has certain configuration = that + has to be done before it can be used. The OLDI blocks get this configura= tion + directly from the DSS block, via DSS registers. However, as a single OLDI + block can be used either with DSS0 or DSS1, the source for the configura= tion + changes according to a mux. This mux is set according to the OLDI + configuration registers in DSS0. Thus the OLDI control paths change at + runtime, and it is not obvious how to structure this in the DT bindings. + + The solution used here is that each DSS node contains the OLDI nodes tha= t can + be used with that DSS. Thus the DSS0 node has two OLDI child nodes, OLDI= 0 and + OLDI1, and the DSS1 node has one OLDI child node, OLDI1, so three OLDI DT + nodes in total. The two OLDI1 nodes thus refer to the same piece of hard= ware, + and they cannot be used at the same time. The selection which OLDI nodes= to + use are chosen in the board dts files, so assuming the dts files are cor= rect, + no resource conflict can happen. + properties: compatible: enum: - ti,am625-dss - ti,am62a7-dss + - ti,am62p-dss - ti,am65x-dss =20 reg: --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B3083BB13F; Fri, 29 May 2026 08:47:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044463; cv=none; b=t2ymLxNG8mhcFumDxbQ71UhxUWN01bD9VQtr3iHGfaoS9om8hs7h/q5K95fGx+L48kwk/0WFKwIo5yb2P4bgE3uMi/uvrrwaXfUxGHJzr5b5wpzzIqc+B1pJVjGLiDXROLrv59cjwvX1ogk9DGpmVfOKy2Mqyb87vATbl7H/hcM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044463; c=relaxed/simple; bh=7Kq5ctr2zF2W69THhXrq0QBJ23m1uyPy7zIOXMhkLEE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=D4tvsWGvg4AdLFhNdetErF6FZIrdpU9X021p4VSoH3c1ElGoARS7XJU5xaQQ+QgvRHrddhCybDsVTVTM2blL+AMmmOePhA1NKtZ97+hwXd5tT/11o0szXA2RGWdNjqrwZLtdTZExqh1r0za8RYR/e5qeFLc2DFy1ggusUKidYpA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=eZG/ZNXA; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="eZG/ZNXA" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B84C4227C; Fri, 29 May 2026 10:47:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044421; bh=7Kq5ctr2zF2W69THhXrq0QBJ23m1uyPy7zIOXMhkLEE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=eZG/ZNXAfl7bnNiUPEgcQ0ECSqyzMg1KefvVWDy/S5Yhldonitv6OpWPxg/zU6YYi +sJ1QWHDgGummTUEkyLrvmOHnRwb9a8mSofP4HOAjvYUz6XiwgXf8xRRs9DZLpmBwV wCIbqegY06sWRbAF6dplT3NZrvjZCpjU1nwt5BbM= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:36 +0300 Subject: [PATCH v3 06/15] drm/tidss: Remove extra pm_runtime_mark_last_busy Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-6-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=754; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=7Kq5ctr2zF2W69THhXrq0QBJ23m1uyPy7zIOXMhkLEE=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKNTJ4fTgJ5gD/d+Zr5V6tnn1Mr+F1HwSqe4 QuiwdQdRvKJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSjQAKCRD6PaqMvJYe 9QRRD/9CAsn+XdBkkLHKZTZ410UIFK74/ErvcBkGDuPyqCcRJw8lEwRIB2cNUu7u6mEB9sDtW0C xuESrqQ+hzuHmupiDo/V01e+rZ3LwreY3TcmKmZHOIiVzSH79P6KWXhh4Q03vaDHnr8CBb8lvIb 3ZQV+G1egX+6Fa0fAuS2eqS+DRWsye6NZIoHL9im4imGuFFu0D0r74zHRUeU6etI4e3resDHdk/ breUxZVu8Wj1/uASTHkbQGabWRHRuv6cNiPAogQiKTBMGncaZRjwfLGupOWTua8ZhTBFxmRUCwy D9NPI9IuSQmHkMsj4D+jN20g1MM21mHvRA7U6TTz/qhq3PmqdwgKT1UGxwZgfD3PiHbc/dibE/6 2mISeUOu9Ft7ZG8PXAmf04loDnoUrjs9waX3sexBgxhztSuHq0zxBIVHKg7MfUacnkthtONFRWl 6DP3jH8NE/4u3Vomli/FsrK4C5Wi03pswEQSNiVcDFtBGyCAglufJJJH0kPOoWgxydCkg8ZqOch bAxmwLFdvioYvGSEFu81gJuZ1hr3rHVmlus1XHE0yoXBuCwVoT9uhT3711jI+h0h4vQ1gnP/ssJ rSXWxJl0W7fk95U8l8sJ4D0lja3udsJ6rttF/McDkDrHZndtKvNWyFI/EHACOAP5o4YaDtVuw48 cBuPpWpSU4dcLZQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 pm_runtime_put_autosuspend() calls pm_runtime_mark_last_busy(), so no need to call pm_runtime_mark_last_busy() explicitly in the driver. Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_drv.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index 1c8cc18bc53c..5cb3e746aeb3 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -42,8 +42,6 @@ void tidss_runtime_put(struct tidss_device *tidss) { int r; =20 - pm_runtime_mark_last_busy(tidss->dev); - r =3D pm_runtime_put_autosuspend(tidss->dev); WARN_ON(r < 0); } --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 702753ABD95; Fri, 29 May 2026 08:47:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 OLDI_LB_CTRL define is not used, and doesn't seem to exist at least on some SoCs. Let's remove the define. Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_oldi.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/tidss/tidss_oldi.h b/drivers/gpu/drm/tidss/tid= ss_oldi.h index 8cd535c5ee65..a361e6dbfce3 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.h +++ b/drivers/gpu/drm/tidss/tidss_oldi.h @@ -20,7 +20,6 @@ struct tidss_oldi; =20 /* Register offsets */ #define OLDI_PD_CTRL 0x100 -#define OLDI_LB_CTRL 0x104 =20 /* Power control bits */ #define OLDI_PWRDOWN_TX(n) BIT(n) --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E2E33BE154; Fri, 29 May 2026 08:47:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 There are situations where the driver needs to know if the output is going to the DPI output or not. There is no trivial way to get this information, as there is no "DPI bridge". We can only find this out in reverse: check if the output is NOT DPI, and if that is negative, then it must be DPI. At the moment we have two non-DPI outputs: DSI and OLDI. DSI always has "ti,j721e-dsi" DSI bridge connected to the DSI, so we can use that for checking. OLDI doesn't have a compatible property, but we can check if the DT node has "oldi-transmitters" node as a parent, and the dss node itself as a grand-parent. If the output is not connected to either of the above, it must be DPI. Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_crtc.c | 10 +++++-- drivers/gpu/drm/tidss/tidss_crtc.h | 4 ++- drivers/gpu/drm/tidss/tidss_dispc.c | 5 +++- drivers/gpu/drm/tidss/tidss_dispc.h | 3 +- drivers/gpu/drm/tidss/tidss_kms.c | 55 +++++++++++++++++++++++++++++++++= +++- 5 files changed, 70 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tid= ss_crtc.c index a31c21c5f855..dfdf61b01dcd 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.c +++ b/drivers/gpu/drm/tidss/tidss_crtc.c @@ -192,7 +192,8 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *cr= tc, return; =20 /* Write vp properties to HW if needed. */ - dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); + dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false, + tcrtc->dpi_output); =20 /* Update plane positions if needed. */ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); @@ -235,7 +236,8 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *c= rtc, if (r !=3D 0) return; =20 - dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); + dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true, + tcrtc->dpi_output); tidss_crtc_position_planes(tidss, crtc, old_state, true); =20 /* Turn vertical blanking interrupt reporting on. */ @@ -417,7 +419,8 @@ static const struct drm_crtc_funcs tidss_crtc_funcs =3D= { =20 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, u32 hw_videoport, - struct drm_plane *primary) + struct drm_plane *primary, + bool dpi_output) { struct tidss_crtc *tcrtc; struct drm_crtc *crtc; @@ -430,6 +433,7 @@ struct tidss_crtc *tidss_crtc_create(struct tidss_devic= e *tidss, return ERR_PTR(-ENOMEM); =20 tcrtc->hw_videoport =3D hw_videoport; + tcrtc->dpi_output =3D dpi_output; init_completion(&tcrtc->framedone_completion); =20 crtc =3D &tcrtc->crtc; diff --git a/drivers/gpu/drm/tidss/tidss_crtc.h b/drivers/gpu/drm/tidss/tid= ss_crtc.h index 040d1205496b..65df220698f6 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.h +++ b/drivers/gpu/drm/tidss/tidss_crtc.h @@ -20,6 +20,7 @@ struct tidss_crtc { struct drm_crtc crtc; =20 u32 hw_videoport; + bool dpi_output; =20 struct drm_pending_vblank_event *event; =20 @@ -44,5 +45,6 @@ void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqs= tatus); =20 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, u32 hw_videoport, - struct drm_plane *primary); + struct drm_plane *primary, + bool dpi_output); #endif diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index 58d5eb033bdb..c21ac3f51720 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -448,6 +448,7 @@ static const u16 *dispc_common_regmap; =20 struct dss_vp_data { u32 *gamma_table; + bool dpi_output; }; =20 struct dispc_device { @@ -2770,8 +2771,10 @@ static void dispc_vp_set_color_mgmt(struct dispc_dev= ice *dispc, } =20 void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport, - const struct drm_crtc_state *state, bool newmodeset) + const struct drm_crtc_state *state, bool newmodeset, + bool dpi_output) { + dispc->vp_data[hw_videoport].dpi_output =3D dpi_output; dispc_vp_set_default_color(dispc, hw_videoport, 0); dispc_vp_set_color_mgmt(dispc, hw_videoport, state, newmodeset); } diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/ti= dss_dispc.h index 739d211d0018..6f53d554259c 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -131,7 +131,8 @@ void dispc_vp_disable_clk(struct dispc_device *dispc, u= 32 hw_videoport); int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, unsigned long rate); void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport, - const struct drm_crtc_state *state, bool newmodeset); + const struct drm_crtc_state *state, bool newmodeset, + bool dpi_output); =20 int dispc_runtime_suspend(struct dispc_device *dispc); int dispc_runtime_resume(struct dispc_device *dispc); diff --git a/drivers/gpu/drm/tidss/tidss_kms.c b/drivers/gpu/drm/tidss/tids= s_kms.c index 8bb93194e5ac..bc8b10af9a48 100644 --- a/drivers/gpu/drm/tidss/tidss_kms.c +++ b/drivers/gpu/drm/tidss/tidss_kms.c @@ -122,6 +122,50 @@ static const struct drm_mode_config_funcs mode_config_= funcs =3D { .atomic_commit =3D drm_atomic_helper_commit, }; =20 +static const char * const tidss_internal_bridge_compatibles[] =3D { + "ti,j721e-dsi", +}; + +/* + * Detect whether the bridge is internal to the SoC or not. This is needed + * to find out whether we are using DPI output (thus no internal bridge). + * We detect this via two means: + * - If the bridge's of_node has a compatible, compare to known internal v= alues. + * - If the bridge is a grand-child of DSS, and has "oldi-transmitters" pa= rent. + */ +static bool tidss_is_bridge_internal(struct tidss_device *tidss, + struct drm_bridge *bridge) +{ + struct device_node *parent, *grand_parent; + struct property *prop; + bool is_internal; + + if (WARN_ON(!bridge->of_node)) + return false; + + prop =3D of_find_property(bridge->of_node, "compatible", NULL); + for (const char *cp =3D of_prop_next_string(prop, NULL); cp; + cp =3D of_prop_next_string(prop, cp)) { + for (unsigned int i =3D 0; + i < ARRAY_SIZE(tidss_internal_bridge_compatibles); ++i) { + if (strcmp(cp, tidss_internal_bridge_compatibles[i]) =3D=3D 0) + return true; + } + } + + parent =3D of_get_parent(bridge->of_node); + grand_parent =3D of_get_parent(parent); + + is_internal =3D parent && grand_parent && + tidss->dev->of_node =3D=3D grand_parent && + of_node_name_eq(parent, "oldi-transmitters"); + + of_node_put(grand_parent); + of_node_put(parent); + + return is_internal; +} + static int tidss_dispc_modeset_init(struct tidss_device *tidss) { struct device *dev =3D tidss->dev; @@ -133,6 +177,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) u32 hw_videoport; struct drm_bridge *bridge; u32 enc_type; + bool dpi_output; }; =20 const struct dispc_features *feat =3D tidss->feat; @@ -149,6 +194,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) struct drm_panel *panel; struct drm_bridge *bridge; u32 enc_type =3D DRM_MODE_ENCODER_NONE; + bool dpi_output; int ret; =20 ret =3D drm_of_find_panel_or_bridge(dev->of_node, i, 0, @@ -160,6 +206,11 @@ static int tidss_dispc_modeset_init(struct tidss_devic= e *tidss) return dev_err_probe(dev, ret, "port %d probe failed\n", i); } =20 + if (bridge) + dpi_output =3D !tidss_is_bridge_internal(tidss, bridge); + else + dpi_output =3D true; + if (panel) { u32 conn_type; =20 @@ -199,6 +250,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) pipes[num_pipes].hw_videoport =3D i; pipes[num_pipes].bridge =3D bridge; pipes[num_pipes].enc_type =3D enc_type; + pipes[num_pipes].dpi_output =3D dpi_output; num_pipes++; } =20 @@ -224,7 +276,8 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) tidss->planes[tidss->num_planes++] =3D &tplane->plane; =20 tcrtc =3D tidss_crtc_create(tidss, pipes[i].hw_videoport, - &tplane->plane); + &tplane->plane, + pipes[i].dpi_output); if (IS_ERR(tcrtc)) { dev_err(tidss->dev, "crtc create failed\n"); return PTR_ERR(tcrtc); --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B6F63B47CD; Fri, 29 May 2026 08:47:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044466; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 The DPI output pipeline in K3 SoCs contains the display subsystem (DSS) which produces the in-SoC parallel video signal, and a DPI block which adjusts the signal to the external MIPI DPI output. The DSS IP has registers to configure whether the data and sync signals are driven on rising or falling clock edge, and on some SoCs these are automatically conveyed to the DPI block which needs that configuration to properly output the MIPI DPI signal. However, on some SoCs the DPI block configuration has to be done manually, using an extra register outside the DSS, DPI0_CLK_CTRL from MAIN_CTRL_MMR_CFG0 block, which controls the DPI block's behavior. Add the support to get the regmap to the register via syscon, and configure the bits before enabling the video output. Original patch from Louis Chauvet Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_dispc.c | 25 +++++++++++++++++++++++++ drivers/gpu/drm/tidss/tidss_dispc_regs.h | 4 ++++ 2 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index c21ac3f51720..08342a9a5e8c 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -467,6 +467,8 @@ struct dispc_device { const struct dispc_features *feat; =20 struct clk *fclk; + struct regmap *syscon_dpi_io_ctrl; + unsigned int syscon_dpi_io_ctrl_offset; =20 bool is_enabled; =20 @@ -1201,6 +1203,13 @@ void dispc_vp_prepare(struct dispc_device *dispc, u3= 2 hw_videoport, mode->crtc_hdisplay - 1) | FIELD_PREP(DISPC_VP_SIZE_SCREEN_VDISPLAY_MASK, mode->crtc_vdisplay - 1)); + + if (dispc->vp_data[hw_videoport].dpi_output && dispc->syscon_dpi_io_ctrl)= { + regmap_write(dispc->syscon_dpi_io_ctrl, + dispc->syscon_dpi_io_ctrl_offset + 0x0, + (!ipc ? DPI0_CLK_CTRL_DATA_CLK_INVDIS : 0) | + (rf ? DPI0_CLK_CTRL_SYNC_CLK_INVDIS : 0)); + } } =20 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport) @@ -2989,6 +2998,22 @@ int dispc_init(struct tidss_device *tidss) =20 dispc_init_errata(dispc); =20 + dispc->syscon_dpi_io_ctrl =3D + syscon_regmap_lookup_by_phandle_args(tidss->dev->of_node, + "ti,dpi-io-ctrl", 1, + &dispc->syscon_dpi_io_ctrl_offset); + + if (IS_ERR(dispc->syscon_dpi_io_ctrl)) { + r =3D PTR_ERR(dispc->syscon_dpi_io_ctrl); + + if (r =3D=3D -ENOENT) { + dispc->syscon_dpi_io_ctrl =3D NULL; + } else { + return dev_err_probe(dispc->dev, r, + "failed to get 'ti,dpi-io-ctrl'\n"); + } + } + dispc->fourccs =3D devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats), sizeof(*dispc->fourccs), GFP_KERNEL); if (!dispc->fourccs) diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h b/drivers/gpu/drm/tid= ss/tidss_dispc_regs.h index 382027dddce8..4cdde24d8372 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h @@ -333,4 +333,8 @@ enum oldi_mode_reg_val { SPWG_18 =3D 0, JEIDA_24 =3D 1,= SPWG_24 =3D 2 }; =20 #define AM65X_OLDI_PWRDN_TX BIT(8) =20 +/* Bits in the MAIN_CTRL_MMR_CFG0_DPI0_CLK_CTRL register */ +#define DPI0_CLK_CTRL_DATA_CLK_INVDIS BIT(8) +#define DPI0_CLK_CTRL_SYNC_CLK_INVDIS BIT(9) + #endif /* __TIDSS_DISPC_REGS_H */ --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E1DA3BAD89; Fri, 29 May 2026 08:47:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780044469; cv=none; b=gD4xx61A6pDEDaVWDtZ6lLzLNJaKfsYI1kSVmUn/13uX+h60FFoqCjQaFjSDJQiPslJkNaGFNg5UtIVZHDZ8YV7K3ir1BOjkj90pvLA4u19sKLY3jH4aZL5Iv/5aDUrBhLSPlc2E+73g/+ula3kYRMn/JKe7wYkAb2PGxXtBrUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Fri, 29 May 2026 10:47:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044426; bh=DHuOXKyQxpcTOy5x53Zexfuh3BWQvmfeYJKfQK1Z26s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=O8s48cSfjhNkiIx/wnKhC+xMIyi3+m3KeSB/uvv3vDNyai+pKDHiAKPYzRXOxLf69 SIdadf8OleiVZsP+2j2fZXfsSFpSvVBB/VKmTj9zAIPnX1mQh3HeNcsY5zdnleA1la VHVGPUpbN4KLou1kltJe+tSPFKn0Njv/gkGP0Hhk= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:40 +0300 Subject: [PATCH v3 10/15] drm/tidss: Add support for DPIENABLE bit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-10-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Many (or even all?) K3 SoCs have DSS VP_CONTROL.DPIENABLE bit described in their documentation. This bit controls whether the DPI block is enabled, and is set to 1 by default (i.e. DPI is enabled at HW reset). However, in almost all SoCs the setting does not actually do anything, and at the moment the bit is not managed by the driver. The exception is AM62L, which does have DPIENABLE connected, and disabling the DPI block when it is not in use provides power savings. Let's add a new feature flag for this, 'has_vp_control_dpienable', and implement the support. Disable DPIENABLE for all videoports at resume time, so that it is 0 by default. Specifically enable and disable it in dispc_vp_enable() and dispc_vp_disable() for DPI output. Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_dispc.c | 23 +++++++++++++++++++++-- drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++ drivers/gpu/drm/tidss/tidss_dispc_regs.h | 1 + 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index 08342a9a5e8c..1b8d52f10673 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -442,6 +442,8 @@ const struct dispc_features dispc_am62l_feats =3D { }, =20 .vid_order =3D {0}, + + .has_vp_control_dpienable =3D true, }; =20 static const u16 *dispc_common_regmap; @@ -1210,6 +1212,11 @@ void dispc_vp_prepare(struct dispc_device *dispc, u3= 2 hw_videoport, (!ipc ? DPI0_CLK_CTRL_DATA_CLK_INVDIS : 0) | (rf ? DPI0_CLK_CTRL_SYNC_CLK_INVDIS : 0)); } + + if (dispc->feat->has_vp_control_dpienable && + dispc->vp_data[hw_videoport].dpi_output) + VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, + DISPC_VP_CONTROL_DPIENABLE_MASK); } =20 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport) @@ -1226,6 +1233,11 @@ void dispc_vp_disable(struct dispc_device *dispc, u3= 2 hw_videoport) =20 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport) { + if (dispc->feat->has_vp_control_dpienable && + dispc->vp_data[hw_videoport].dpi_output) + VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, + DISPC_VP_CONTROL_DPIENABLE_MASK); + if (dispc->feat->vp_bus_type[hw_videoport] =3D=3D DISPC_VP_OLDI_AM65X) { dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, 0); =20 @@ -2445,10 +2457,17 @@ static void dispc_vp_init(struct dispc_device *disp= c) =20 dev_dbg(dispc->dev, "%s()\n", __func__); =20 - /* Enable the gamma Shadow bit-field for all VPs*/ - for (i =3D 0; i < dispc->feat->num_vps; i++) + for (i =3D 0; i < dispc->feat->num_vps; i++) { + /* Enable the gamma Shadow bit-field for all VPs*/ VP_REG_FLD_MOD(dispc, i, DISPC_VP_CONFIG, 1, DISPC_VP_CONFIG_GAMMAENABLE_MASK); + + if (dispc->feat->has_vp_control_dpienable) { + /* Disable DPIENABLE for all VPs */ + VP_REG_FLD_MOD(dispc, i, DISPC_VP_CONTROL, 0, + DISPC_VP_CONTROL_DPIENABLE_MASK); + } + } } =20 static void dispc_initial_config(struct dispc_device *dispc) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/ti= dss_dispc.h index 6f53d554259c..0fbfb86adfbf 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -92,6 +92,8 @@ struct dispc_features { u32 num_vids; struct dispc_vid_info vid_info[TIDSS_MAX_PLANES]; u32 vid_order[TIDSS_MAX_PLANES]; + /* The DSS has VP_CONTROL.DPIENABLE bit */ + bool has_vp_control_dpienable; }; =20 extern const struct dispc_features dispc_k2g_feats; diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h b/drivers/gpu/drm/tid= ss/tidss_dispc_regs.h index 4cdde24d8372..4246c72efdd5 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h @@ -230,6 +230,7 @@ enum dispc_common_regs { =20 #define DISPC_VP_CONTROL 0x4 #define DISPC_VP_CONTROL_DATALINES_MASK GENMASK(10, 8) +#define DISPC_VP_CONTROL_DPIENABLE_MASK GENMASK(6, 6) #define DISPC_VP_CONTROL_GOBIT_MASK GENMASK(5, 5) #define DISPC_VP_CONTROL_ENABLE_MASK GENMASK(0, 0) =20 --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 647B03C0604; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 OLDI has a few issues with how it handles the signal polarities: - It always sets OLDI_DEPOL, which means DE active low - It sets DRM_BUS_FLAG_DE_HIGH in struct drm_bridge_timings, i.e. reverse to the OLDI_DEPOL - It sets DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE in struct drm_bridge_timings, but the TRM says "The DSS interface is clocked on the rising edge of OLDI_FWD_P_CLK pixel clock", which I read as "OLDI samples on rising edge". - But the defined drm_bridge_timings is not actually used anywhere, even if it is set to bridge->timings, so the bus flags are just ignored. However, based on my testing, OLDI_DEPOL bit or the edge on which data and syncs are driven doesn't seem to affect the OLDI output. Possibly it's not as robust, but I did not see any effect with an oscilloscope. However, the code is still quite broken, so let's fix it: - Remove drm_bridge_timings - Set the correct input_bus_cfg.flags in tidss_oldi_atomic_check() - Set OLDI_DEPOL based on the DE bus flag Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_oldi.c | 38 ++++++++++++++++++++++++++++------= ---- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_oldi.c b/drivers/gpu/drm/tidss/tid= ss_oldi.c index 17c535bfa057..e925ddaa4fd6 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.c +++ b/drivers/gpu/drm/tidss/tidss_oldi.c @@ -164,7 +164,8 @@ static void tidss_oldi_tx_power(struct tidss_oldi *oldi= , bool enable) regmap_update_bits(oldi->io_ctrl, OLDI_PD_CTRL, mask, enable ? 0 : mask); } =20 -static int tidss_oldi_config(struct tidss_oldi *oldi) +static int tidss_oldi_config(struct tidss_oldi *oldi, + struct drm_bridge_state *bridge_state) { const struct oldi_bus_format *bus_fmt =3D NULL; u32 oldi_cfg =3D 0; @@ -183,7 +184,8 @@ static int tidss_oldi_config(struct tidss_oldi *oldi) "OLDI%u: DSS port width %d not supported\n", oldi->oldi_instance, bus_fmt->data_width); =20 - oldi_cfg |=3D OLDI_DEPOL; + if (bridge_state->input_bus_cfg.flags & DRM_BUS_FLAG_DE_LOW) + oldi_cfg |=3D OLDI_DEPOL; /* 1 =3D active low */ =20 oldi_cfg =3D (oldi_cfg & (~OLDI_MAP)) | (bus_fmt->oldi_mode_reg_val << 1); =20 @@ -220,6 +222,22 @@ static int tidss_oldi_config(struct tidss_oldi *oldi) return ret; } =20 +static int tidss_oldi_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + bridge_state->input_bus_cfg.flags &=3D + ~(DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE); + + bridge_state->input_bus_cfg.flags |=3D + DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE; + + return 0; +} + static void tidss_oldi_atomic_pre_enable(struct drm_bridge *bridge, struct drm_atomic_state *state) { @@ -228,6 +246,7 @@ static void tidss_oldi_atomic_pre_enable(struct drm_bri= dge *bridge, struct drm_connector_state *conn_state; struct drm_crtc_state *crtc_state; struct drm_display_mode *mode; + struct drm_bridge_state *bridge_state; =20 if (oldi->link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) return; @@ -245,10 +264,14 @@ static void tidss_oldi_atomic_pre_enable(struct drm_b= ridge *bridge, if (WARN_ON(!crtc_state)) return; =20 + bridge_state =3D drm_atomic_get_new_bridge_state(state, bridge); + if (WARN_ON(!bridge_state)) + return; + mode =3D &crtc_state->adjusted_mode; =20 /* Configure the OLDI params*/ - tidss_oldi_config(oldi); + tidss_oldi_config(oldi, bridge_state); =20 /* Set the OLDI serial clock (7 times the pixel clock) */ tidss_oldi_set_serial_clk(oldi, mode->clock * 7 * 1000); @@ -329,7 +352,8 @@ tidss_oldi_mode_valid(struct drm_bridge *bridge, } =20 static const struct drm_bridge_funcs tidss_oldi_bridge_funcs =3D { - .attach =3D tidss_oldi_bridge_attach, + .attach =3D tidss_oldi_bridge_attach, + .atomic_check =3D tidss_oldi_atomic_check, .atomic_pre_enable =3D tidss_oldi_atomic_pre_enable, .atomic_post_disable =3D tidss_oldi_atomic_post_disable, .atomic_get_input_bus_fmts =3D tidss_oldi_atomic_get_input_bus_fmts, @@ -440,11 +464,6 @@ static int get_parent_dss_vp(struct device_node *oldi_= tx, u32 *parent_vp) return -ENODEV; } =20 -static const struct drm_bridge_timings default_tidss_oldi_timings =3D { - .input_bus_flags =3D DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE - | DRM_BUS_FLAG_DE_HIGH, -}; - void tidss_oldi_deinit(struct tidss_device *tidss) { for (int i =3D 0; i < tidss->num_oldis; i++) { @@ -598,7 +617,6 @@ int tidss_oldi_init(struct tidss_device *tidss) /* Register the bridge. */ oldi->bridge.of_node =3D child; oldi->bridge.driver_private =3D oldi; - oldi->bridge.timings =3D &default_tidss_oldi_timings; =20 tidss->oldis[tidss->num_oldis++] =3D oldi; tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC9DF3B8BC5; Fri, 29 May 2026 08:47:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-12-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=24143; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=7XAwAS6XcPPJKooQYKtoGcVfVosMMNVQS/kLHPVs/rA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKPIEebXUPDkCc+4cJrSi44lu7ZIiXqgN29U hTmwR9iDqyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSjwAKCRD6PaqMvJYe 9TtXEACamO/M27y0Ta6bohIhbEbH8FkTa5GcTsVet0SykiLyXZK6nCPNSJyk8c1WVNmAFaBs4W0 ffOyFQfWiI+BAkUO2injwvW07RW1yk3dbaSoDUmZtGETf+T47sAo4CMqMqr9r7ukCL0Dntijp+o 0SN8bAkB/jBlfB0PK4Wt+5lLyAbxL1rG1LEMTvq3bVbCgLfErq0BD4wOJ0YGIshSoZAdsbA+Y1y DzMNaK131EBMqsY5lZdLpTObW2/jjQgISaZyxJHWgaGMZXhf/wQ4pZpw9XPk27g9HQyFJH5eqzt Q3MX0kX5tLE7ENrydfmijl3Jjbk22HDUEeZkw0xJRATIOiyspSLrZuh1CDn5DFa0ajPO82Xf4jw FH7QtM0nKVRewD9hommSqknZBzsEpggi57l9w0e7Jr3FxG2ytZIKygMcRYciQDHu0wT8IhgqJ+S JkiULciiQlbIVClehjc7BAAM/zi7enYRrFpd7CcxnNAH8VGArfCy+/RVaD8m5xjULIIwK6zwnhx kZ1ClMqRNBf/OBNw41gB+LJBibpensmmg0yQGMQZgp1n3XLBjh8cGcCwod27CmOnM4Oh9CzY5co bulvH+bBIh+Vd9F9d8pVuzcQz/IVSnjbZffY9NrrZIwLXd8oel03tZOd6DBVoXanvTU4qsEnNeI QYUjo3D0wlXPn8A== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Currently in the DT, OLDI is defined in child nodes under the DSS node. The tidss driver will parse the DT, and create DRM bridges for the OLDIs, and there are no Linux devices for the OLDIs. On new SoCs the OLDIs have their own power-domains which we need to control. The cleanest way to do this in DT is to add the PDs to the OLDI nodes. But this means the OLDI bridge code would somehow have to manually manage the PDs, the PDs not being under a Linux device, and there isn't much support for that kind of setup in the PD framework. A solution to this is to convert the OLDI to an auxiliary device/driver, created by tidss: - At module load time the tidss module will, in addition to registering the tidss DRM driver, register an oldi auxiliary driver. - At probe time tidss will parse the DT, and create an auxiliary device for each OLDI. The aux driver will probe, and as its of_node points to the OLDI node containing the PD, the driver framework will take care of enabling and disabling the PD when OLDI is used ("used" as in pm_runtime context). Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_drv.c | 51 +++- drivers/gpu/drm/tidss/tidss_drv.h | 5 +- drivers/gpu/drm/tidss/tidss_oldi.c | 502 ++++++++++++++++++++++++++-------= ---- drivers/gpu/drm/tidss/tidss_oldi.h | 7 +- 4 files changed, 405 insertions(+), 160 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index 5cb3e746aeb3..aef945101be4 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -133,10 +133,6 @@ static int tidss_probe(struct platform_device *pdev) return ret; } =20 - ret =3D tidss_oldi_init(tidss); - if (ret) - return dev_err_probe(dev, ret, "failed to init OLDI\n"); - pm_runtime_enable(dev); =20 pm_runtime_set_autosuspend_delay(dev, 1000); @@ -147,24 +143,30 @@ static int tidss_probe(struct platform_device *pdev) dispc_runtime_resume(tidss->dispc); #endif =20 + ret =3D tidss_oldi_create_devices(tidss); + if (ret) { + dev_err_probe(dev, ret, "failed to create OLDI devices\n"); + goto err_runtime_suspend; + } + ret =3D tidss_modeset_init(tidss); if (ret < 0) { if (ret !=3D -EPROBE_DEFER) dev_err(dev, "failed to init DRM/KMS (%d)\n", ret); - goto err_runtime_suspend; + goto err_destroy_oldis; } =20 irq =3D platform_get_irq(pdev, 0); if (irq < 0) { ret =3D irq; - goto err_runtime_suspend; + goto err_destroy_oldis; } tidss->irq =3D irq; =20 ret =3D tidss_irq_install(ddev, irq); if (ret) { dev_err(dev, "tidss_irq_install failed: %d\n", ret); - goto err_runtime_suspend; + goto err_destroy_oldis; } =20 drm_kms_helper_poll_init(ddev); @@ -194,6 +196,9 @@ static int tidss_probe(struct platform_device *pdev) err_irq_uninstall: tidss_irq_uninstall(ddev); =20 +err_destroy_oldis: + tidss_oldi_destroy_devices(tidss); + err_runtime_suspend: #ifndef CONFIG_PM dispc_runtime_suspend(tidss->dispc); @@ -201,8 +206,6 @@ static int tidss_probe(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); =20 - tidss_oldi_deinit(tidss); - return ret; } =20 @@ -218,6 +221,8 @@ static void tidss_remove(struct platform_device *pdev) =20 tidss_irq_uninstall(ddev); =20 + tidss_oldi_destroy_devices(tidss); + #ifndef CONFIG_PM /* If we don't have PM, we need to call suspend manually */ dispc_runtime_suspend(tidss->dispc); @@ -225,8 +230,6 @@ static void tidss_remove(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); =20 - tidss_oldi_deinit(tidss); - /* devm allocated dispc goes away with the dev so mark it NULL */ dispc_remove(tidss); =20 @@ -262,7 +265,31 @@ static struct platform_driver tidss_platform_driver = =3D { }, }; =20 -drm_module_platform_driver(tidss_platform_driver); +static int __init tidss_platform_driver_init(void) +{ + int ret; + + ret =3D tidss_oldi_register_driver(); + if (ret) + return ret; + + ret =3D drm_platform_driver_register(&tidss_platform_driver); + if (ret) { + tidss_oldi_unregister_driver(); + return ret; + } + + return 0; +} +module_init(tidss_platform_driver_init); + +static void __exit tidss_platform_driver_exit(void) +{ + platform_driver_unregister(&tidss_platform_driver); + tidss_oldi_unregister_driver(); +} +module_exit(tidss_platform_driver_exit); + =20 MODULE_AUTHOR("Tomi Valkeinen "); MODULE_DESCRIPTION("TI Keystone DSS Driver"); diff --git a/drivers/gpu/drm/tidss/tidss_drv.h b/drivers/gpu/drm/tidss/tids= s_drv.h index e1c1f41d8b4b..d3dba639b278 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.h +++ b/drivers/gpu/drm/tidss/tidss_drv.h @@ -16,7 +16,8 @@ #define TIDSS_MAX_OLDI_TXES 2 =20 typedef u32 dispc_irq_t; -struct tidss_oldi; + +struct auxiliary_device; =20 struct tidss_device { struct drm_device ddev; /* DRM device for DSS */ @@ -34,7 +35,7 @@ struct tidss_device { struct drm_plane *planes[TIDSS_MAX_PLANES]; =20 unsigned int num_oldis; - struct tidss_oldi *oldis[TIDSS_MAX_OLDI_TXES]; + struct auxiliary_device *oldis[TIDSS_MAX_OLDI_TXES]; =20 unsigned int irq; =20 diff --git a/drivers/gpu/drm/tidss/tidss_oldi.c b/drivers/gpu/drm/tidss/tid= ss_oldi.c index e925ddaa4fd6..188f31b57c6a 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.c +++ b/drivers/gpu/drm/tidss/tidss_oldi.c @@ -5,11 +5,13 @@ * Aradhya Bhatia */ =20 +#include #include #include #include #include #include +#include #include =20 #include @@ -20,6 +22,12 @@ #include "tidss_dispc_regs.h" #include "tidss_oldi.h" =20 +static DEFINE_IDA(tidss_oldi_ida); + +struct tidss_oldi_platform_data { + struct tidss_device *tidss; +}; + struct tidss_oldi { struct tidss_device *tidss; struct device *dev; @@ -251,6 +259,8 @@ static void tidss_oldi_atomic_pre_enable(struct drm_bri= dge *bridge, if (oldi->link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) return; =20 + WARN_ON(pm_runtime_get_sync(oldi->dev) < 0); + connector =3D drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); if (WARN_ON(!connector)) @@ -296,6 +306,8 @@ static void tidss_oldi_atomic_post_disable(struct drm_b= ridge *bridge, =20 /* Clear OLDI Config */ tidss_disable_oldi(oldi->tidss, oldi->parent_vp); + + pm_runtime_put_autosuspend(oldi->dev); } =20 #define MAX_INPUT_SEL_FORMATS 1 @@ -383,12 +395,16 @@ static int get_oldi_mode(struct device_node *oldi_tx,= int *companion_instance) */ return OLDI_MODE_SINGLE_LINK; =20 - if (of_property_read_u32(companion, "reg", &companion_reg)) + if (of_property_read_u32(companion, "reg", &companion_reg)) { + of_node_put(companion); return OLDI_MODE_UNSUPPORTED; + } =20 - if (companion_reg > (TIDSS_MAX_OLDI_TXES - 1)) + if (companion_reg > (TIDSS_MAX_OLDI_TXES - 1)) { /* Invalid companion OLDI reg value. */ + of_node_put(companion); return OLDI_MODE_UNSUPPORTED; + } =20 *companion_instance =3D (int)companion_reg; =20 @@ -464,174 +480,372 @@ static int get_parent_dss_vp(struct device_node *ol= di_tx, u32 *parent_vp) return -ENODEV; } =20 -void tidss_oldi_deinit(struct tidss_device *tidss) +static int tidss_oldi_probe(struct auxiliary_device *auxdev, + const struct auxiliary_device_id *id) { - for (int i =3D 0; i < tidss->num_oldis; i++) { - if (tidss->oldis[i]) { - drm_bridge_remove(&tidss->oldis[i]->bridge); - tidss->is_ext_vp_clk[tidss->oldis[i]->parent_vp] =3D false; - tidss->oldis[i] =3D NULL; + struct device *dev =3D &auxdev->dev; + struct tidss_oldi_platform_data *oldi_pdata =3D dev_get_platdata(dev); + struct tidss_device *tidss =3D oldi_pdata->tidss; + struct device_node *node =3D auxdev->dev.of_node; + enum tidss_oldi_link_type link_type =3D OLDI_MODE_UNSUPPORTED; + int companion_instance =3D -1; + struct drm_bridge *bridge; + struct device_link *link; + struct tidss_oldi *oldi; + u32 oldi_instance; + u32 parent_vp; + int ret; + + ret =3D of_property_read_u32(node, "reg", &oldi_instance); + if (ret) + return ret; + + ret =3D get_parent_dss_vp(node, &parent_vp); + if (ret) + return ret; + + /* + * Now that it's confirmed that OLDI is connected with DSS, + * let's continue getting the OLDI sinks ahead and other OLDI + * properties. + */ + bridge =3D devm_drm_of_get_bridge(dev, node, OLDI_OUTPUT_PORT, 0); + if (IS_ERR(bridge)) { + /* + * Either there was no OLDI sink in the devicetree, or the OLDI + * sink has not been added yet. In any case, return. + */ + return dev_err_probe(dev, PTR_ERR(bridge), + "no panel/bridge for OLDI%u.\n", + oldi_instance); + } + + link_type =3D get_oldi_mode(node, &companion_instance); + if (link_type =3D=3D OLDI_MODE_UNSUPPORTED) { + return dev_err_probe(dev, -EINVAL, + "OLDI%u: Unsupported OLDI connection.\n", + oldi_instance); + } else if ((link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) || + (link_type =3D=3D OLDI_MODE_CLONE_SINGLE_LINK)) { + /* + * The OLDI driver cannot support OLDI clone mode properly at + * present. The clone mode requires 2 working encoder-bridge + * pipelines, generating from the same crtc. The DRM framework + * does not support this at present. If there were to be, say, 2 + * OLDI sink bridges each connected to an OLDI TXes, they + * couldn't both be supported simultaneously. This driver still + * has some code pertaining to OLDI clone mode configuration in + * DSS hardware for future, when there is a better + * infrastructure in the DRM framework to support 2 + * encoder-bridge pipelines simultaneously. Till that time, this + * driver shall error out if it detects a clone mode + * configuration. + */ + return dev_err_probe(dev, -EOPNOTSUPP, + "The OLDI driver does not support Clone Mode at present.\n"); + } + + oldi =3D devm_drm_bridge_alloc(dev, struct tidss_oldi, bridge, + &tidss_oldi_bridge_funcs); + if (IS_ERR(oldi)) + return PTR_ERR(oldi); + + oldi->parent_vp =3D parent_vp; + oldi->oldi_instance =3D oldi_instance; + oldi->companion_instance =3D companion_instance; + oldi->link_type =3D link_type; + oldi->dev =3D dev; + oldi->next_bridge =3D bridge; + oldi->tidss =3D tidss; + + auxiliary_set_drvdata(auxdev, oldi); + + /* + * Only the primary OLDI needs to reference the io-ctrl system + * registers, and the serial clock. + * We don't require a check for secondary OLDI in dual-link mode + * because the driver will not create a drm_bridge instance. + * But the driver will need to create a drm_bridge instance, + * for secondary OLDI in clone mode (once it is supported). + */ + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK && + link_type !=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) { + oldi->io_ctrl =3D syscon_regmap_lookup_by_phandle(node, + "ti,oldi-io-ctrl"); + if (IS_ERR(oldi->io_ctrl)) { + return dev_err_probe(oldi->dev, PTR_ERR(oldi->io_ctrl), + "OLDI%u: syscon_regmap_lookup_by_phandle failed.\n", + oldi_instance); + } + + oldi->serial =3D of_clk_get_by_name(node, "serial"); + if (IS_ERR(oldi->serial)) { + return dev_err_probe(oldi->dev, PTR_ERR(oldi->serial), + "OLDI%u: Failed to get serial clock.\n", + oldi_instance); } } + + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + /* Register the bridge. */ + oldi->bridge.of_node =3D node; + oldi->bridge.driver_private =3D oldi; + + tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; + + drm_bridge_add(&oldi->bridge); + } + + link =3D device_link_add(&auxdev->dev, tidss->dev, + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER); + if (!link) { + ret =3D -EINVAL; + goto err_bridge_remove; + } + + pm_runtime_enable(dev); + pm_runtime_set_autosuspend_delay(dev, 500); + pm_runtime_use_autosuspend(dev); + + return 0; + +err_bridge_remove: + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + drm_bridge_remove(&oldi->bridge); + tidss->is_ext_vp_clk[oldi->parent_vp] =3D false; + } + + clk_put(oldi->serial); + + return ret; } =20 -int tidss_oldi_init(struct tidss_device *tidss) +static void tidss_oldi_remove(struct auxiliary_device *auxdev) { - struct tidss_oldi *oldi; - struct device_node *child; - struct drm_bridge *bridge; - u32 parent_vp, oldi_instance; - int companion_instance =3D -1; - enum tidss_oldi_link_type link_type =3D OLDI_MODE_UNSUPPORTED; - struct device_node *oldi_parent; - int ret =3D 0; + struct tidss_oldi *oldi =3D auxiliary_get_drvdata(auxdev); + struct tidss_device *tidss =3D oldi->tidss; + struct device *dev =3D &auxdev->dev; =20 - tidss->num_oldis =3D 0; + pm_runtime_dont_use_autosuspend(dev); + pm_runtime_disable(dev); =20 - oldi_parent =3D of_get_child_by_name(tidss->dev->of_node, "oldi-transmitt= ers"); - if (!oldi_parent) - /* Return gracefully */ - return 0; + if (oldi->link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + drm_bridge_remove(&oldi->bridge); + + tidss->is_ext_vp_clk[oldi->parent_vp] =3D false; + } + + clk_put(oldi->serial); +} + +static const struct auxiliary_device_id tidss_oldi_aux_id_table[] =3D { + { .name =3D "tidss.oldi" }, + {} +}; + +static struct auxiliary_driver oldi_aux_driver =3D { + .name =3D "oldi", + .probe =3D tidss_oldi_probe, + .remove =3D tidss_oldi_remove, + .id_table =3D tidss_oldi_aux_id_table, +}; + +static void tidss_oldi_aux_device_release(struct device *dev) +{ + struct auxiliary_device *auxdev =3D to_auxiliary_dev(dev); + + ida_free(&tidss_oldi_ida, auxdev->id); + + of_node_put(auxdev->dev.of_node); =20 - for_each_available_child_of_node(oldi_parent, child) { - ret =3D get_parent_dss_vp(child, &parent_vp); - if (ret) { - if (ret =3D=3D -ENODEV) { - /* - * ENODEV means that this particular OLDI node - * is not connected with the DSS, which is not - * a harmful case. There could be another OLDI - * which may still be connected. - * Continue to search for that. - */ - continue; + kfree(auxdev->dev.platform_data); + kfree(auxdev); +} + +static struct auxiliary_device * +tidss_oldi_create_device(struct tidss_device *tidss, + struct device_node *oldi_tx) +{ + struct tidss_oldi_platform_data *oldi_pdata; + struct auxiliary_device *companion_auxdev; + struct auxiliary_device *auxdev; + struct device_link *link =3D NULL; + u32 oldi_aux_id; + int ret; + + /* + * Allocate the ID first, so that we get a lower ID for the primary + * OLDI, instead of the companion grabbing it in the call below. Note + * that the ID allocated here often matches the OLDI hardware index, + * but not always. + * The OLDI hardware index cannot be used as an ID, as, say, OLDI 1 on + * two DSS instances would produce the exact same device name + * ("tidss.oldi.1"). + */ + ret =3D ida_alloc(&tidss_oldi_ida, GFP_KERNEL); + if (ret < 0) + return ERR_PTR(ret); + + oldi_aux_id =3D ret; + + companion_auxdev =3D NULL; + + /* + * If this is the primary OLDI and there is a companion, create the + * auxdev for the secondary OLDI first, as the secondary will act as + * a supplier for the primary OLDI. + */ + if (!of_property_read_bool(oldi_tx, "ti,secondary-oldi")) { + struct device_node *companion_node; + + companion_node =3D of_parse_phandle(oldi_tx, "ti,companion-oldi", 0); + if (companion_node) { + companion_auxdev =3D + tidss_oldi_create_device(tidss, companion_node); + + of_node_put(companion_node); + + if (IS_ERR(companion_auxdev)) { + dev_err(tidss->dev, + "Failed to create secondary oldi device\n"); + ret =3D PTR_ERR(companion_auxdev); + goto err_free_ida; } - goto err_put_node; } + } =20 - ret =3D of_property_read_u32(child, "reg", &oldi_instance); - if (ret) - goto err_put_node; + oldi_pdata =3D kzalloc_obj(*oldi_pdata); + if (!oldi_pdata) { + ret =3D -ENOMEM; + goto err_free_ida; + } =20 - /* - * Now that it's confirmed that OLDI is connected with DSS, - * let's continue getting the OLDI sinks ahead and other OLDI - * properties. - */ - bridge =3D devm_drm_of_get_bridge(tidss->dev, child, - OLDI_OUTPUT_PORT, 0); - if (IS_ERR(bridge)) { - /* - * Either there was no OLDI sink in the devicetree, or - * the OLDI sink has not been added yet. In any case, - * return. - * We don't want to have an OLDI node connected to DSS - * but not to any sink. - */ - ret =3D dev_err_probe(tidss->dev, PTR_ERR(bridge), - "no panel/bridge for OLDI%u.\n", - oldi_instance); - goto err_put_node; - } + oldi_pdata->tidss =3D tidss; =20 - link_type =3D get_oldi_mode(child, &companion_instance); - if (link_type =3D=3D OLDI_MODE_UNSUPPORTED) { - ret =3D dev_err_probe(tidss->dev, -EINVAL, - "OLDI%u: Unsupported OLDI connection.\n", - oldi_instance); - goto err_put_node; - } else if ((link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) || - (link_type =3D=3D OLDI_MODE_CLONE_SINGLE_LINK)) { - /* - * The OLDI driver cannot support OLDI clone mode - * properly at present. - * The clone mode requires 2 working encoder-bridge - * pipelines, generating from the same crtc. The DRM - * framework does not support this at present. If - * there were to be, say, 2 OLDI sink bridges each - * connected to an OLDI TXes, they couldn't both be - * supported simultaneously. - * This driver still has some code pertaining to OLDI - * clone mode configuration in DSS hardware for future, - * when there is a better infrastructure in the DRM - * framework to support 2 encoder-bridge pipelines - * simultaneously. - * Till that time, this driver shall error out if it - * detects a clone mode configuration. - */ - ret =3D dev_err_probe(tidss->dev, -EOPNOTSUPP, - "The OLDI driver does not support Clone Mode at present.\n"); - goto err_put_node; - } else if (link_type =3D=3D OLDI_MODE_SECONDARY_DUAL_LINK) { - /* - * This is the secondary OLDI node, which serves as a - * companion to the primary OLDI, when it is configured - * for the dual-link mode. Since the primary OLDI will - * be a part of bridge chain, no need to put this one - * too. Continue onto the next OLDI node. - */ - continue; - } + auxdev =3D kzalloc_obj(*auxdev); + if (!auxdev) { + ret =3D -ENOMEM; + goto err_free_pdata; + } + + *auxdev =3D (struct auxiliary_device) { + .name =3D "oldi", + .id =3D oldi_aux_id, + .dev =3D { + .parent =3D tidss->dev, + .of_node =3D of_node_get(oldi_tx), + .release =3D tidss_oldi_aux_device_release, + .platform_data =3D oldi_pdata, + }, + }; + + ret =3D auxiliary_device_init(auxdev); + if (ret) { + dev_err(tidss->dev, "OLDI auxiliary_device_init failed: %d\n", + ret); + goto err_free_auxdev; + } =20 - oldi =3D devm_drm_bridge_alloc(tidss->dev, struct tidss_oldi, bridge, - &tidss_oldi_bridge_funcs); - if (IS_ERR(oldi)) { - ret =3D PTR_ERR(oldi); - goto err_put_node; + /* + * Create a device-link between the primary and the secondary, so that + * the secondary will be powered on when the primary is used. + */ + if (companion_auxdev) { + link =3D device_link_add(&auxdev->dev, &companion_auxdev->dev, + DL_FLAG_PM_RUNTIME | + DL_FLAG_AUTOREMOVE_CONSUMER | + DL_FLAG_AUTOREMOVE_SUPPLIER); + if (!link) { + dev_err(tidss->dev, + "device_link_add failed between primary and secondary OLDI\n"); + ret =3D -EINVAL; + goto err_uninit_auxdev; } + } =20 - oldi->parent_vp =3D parent_vp; - oldi->oldi_instance =3D oldi_instance; - oldi->companion_instance =3D companion_instance; - oldi->link_type =3D link_type; - oldi->dev =3D tidss->dev; - oldi->next_bridge =3D bridge; + ret =3D auxiliary_device_add(auxdev); + if (ret) { + dev_err(tidss->dev, "OLDI auxiliary_device_add failed: %d\n", + ret); + goto err_link_del; + } =20 - /* - * Only the primary OLDI needs to reference the io-ctrl system - * registers, and the serial clock. - * We don't require a check for secondary OLDI in dual-link mode - * because the driver will not create a drm_bridge instance. - * But the driver will need to create a drm_bridge instance, - * for secondary OLDI in clone mode (once it is supported). - */ - if (link_type !=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) { - oldi->io_ctrl =3D syscon_regmap_lookup_by_phandle(child, - "ti,oldi-io-ctrl"); - if (IS_ERR(oldi->io_ctrl)) { - ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->io_ctrl), - "OLDI%u: syscon_regmap_lookup_by_phandle failed.\n", - oldi_instance); - goto err_put_node; - } + tidss->oldis[tidss->num_oldis++] =3D auxdev; =20 - oldi->serial =3D of_clk_get_by_name(child, "serial"); - if (IS_ERR(oldi->serial)) { - ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->serial), - "OLDI%u: Failed to get serial clock.\n", - oldi_instance); - goto err_put_node; - } - } + return auxdev; =20 - /* Register the bridge. */ - oldi->bridge.of_node =3D child; - oldi->bridge.driver_private =3D oldi; +err_link_del: + if (link) + device_link_del(link); +err_uninit_auxdev: + auxiliary_device_uninit(auxdev); + /* return here, as the rest are done in auxdev's release */ + return ERR_PTR(ret); =20 - tidss->oldis[tidss->num_oldis++] =3D oldi; - tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; - oldi->tidss =3D tidss; +err_free_auxdev: + kfree(auxdev); +err_free_pdata: + kfree(oldi_pdata); +err_free_ida: + ida_free(&tidss_oldi_ida, oldi_aux_id); =20 - drm_bridge_add(&oldi->bridge); + return ERR_PTR(ret); +} + +int tidss_oldi_create_devices(struct tidss_device *tidss) +{ + struct device_node *oldi_txes; + struct device_node *oldi_tx; + int ret; + + oldi_txes =3D of_get_child_by_name(tidss->dev->of_node, + "oldi-transmitters"); + if (!oldi_txes) + return 0; + + /* + * Look for primary OLDIs and create devices for them. For dual-link + * cases, the primary's create_device call will also create the + * secondary device. + */ + for_each_available_child_of_node(oldi_txes, oldi_tx) { + struct auxiliary_device *auxdev; + + if (of_property_read_bool(oldi_tx, "ti,secondary-oldi")) + continue; + + auxdev =3D tidss_oldi_create_device(tidss, oldi_tx); + if (IS_ERR(auxdev)) { + ret =3D PTR_ERR(auxdev); + goto err_destroy_oldis; + } } =20 - of_node_put(child); - of_node_put(oldi_parent); + of_node_put(oldi_txes); =20 return 0; =20 -err_put_node: - of_node_put(child); - of_node_put(oldi_parent); +err_destroy_oldis: + tidss_oldi_destroy_devices(tidss); + + of_node_put(oldi_tx); + of_node_put(oldi_txes); + return ret; } + +void tidss_oldi_destroy_devices(struct tidss_device *tidss) +{ + for (unsigned int i =3D 0; i < tidss->num_oldis; ++i) + auxiliary_device_destroy(tidss->oldis[i]); +} + +int tidss_oldi_register_driver(void) +{ + return auxiliary_driver_register(&oldi_aux_driver); +} + +void tidss_oldi_unregister_driver(void) +{ + auxiliary_driver_unregister(&oldi_aux_driver); +} diff --git a/drivers/gpu/drm/tidss/tidss_oldi.h b/drivers/gpu/drm/tidss/tid= ss_oldi.h index a361e6dbfce3..2069bd46aaae 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.h +++ b/drivers/gpu/drm/tidss/tidss_oldi.h @@ -36,7 +36,10 @@ enum tidss_oldi_link_type { OLDI_MODE_SECONDARY_DUAL_LINK, }; =20 -int tidss_oldi_init(struct tidss_device *tidss); -void tidss_oldi_deinit(struct tidss_device *tidss); +int tidss_oldi_create_devices(struct tidss_device *tidss); +void tidss_oldi_destroy_devices(struct tidss_device *tidss); + +int tidss_oldi_register_driver(void); +void tidss_oldi_unregister_driver(void); =20 #endif /* __TIDSS_OLDI_H__ */ --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D4373BE154; Fri, 29 May 2026 08:47:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="dL7Nb15I" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3A96EA06; Fri, 29 May 2026 10:47:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1780044430; bh=wJIwGQWQVF7nXvYZIy7GC96ascev6Pjy2rroRfLoy3Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dL7Nb15IJNAJ+HgxmyaRH9ni0e7g2wsadmiQsPja2GhCS9CtmNgvRQeDIRRHXbVLZ szJuNPYc1/I/549QuLF56lxR8iWGY9iGXVlGZlhDucGJrGzhvntPHNiBXrGpn8hnH3 GgqHHTom2JHARfZhd0e+mdLhB4X7JQVBHlglKbAo= From: Tomi Valkeinen Date: Fri, 29 May 2026 11:45:43 +0300 Subject: [PATCH v3 13/15] drm/tidss: Add support for AM62P display subsystem Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-13-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1574; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=/85nzazta3ZSz2DegZrNcXTx/gK83bzKu5NpUXGKZHo=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKPhfID1DWAq5CXgd5VCH82lv8yt/lkPGSJA 7gfOwTU01eJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSjwAKCRD6PaqMvJYe 9R2JEACJGSgd+33+hWkSwInzxOXX+9sCUUuNu+t3vHBc+ivcqVF2uaoX+nnr4W/6melnJXQ59mx 8j7XqO8RaIzBZljtuCuBPOAbAD3WHz0u6YRkLQpF7fCVQcycFN9ra5RP+/ifYuAuBpfMKmZ8LkL y7zGZlds8+BhcKs1WSsIwTS/1zj67X10vEPpsvHSFaO0um46LWxJOlXAmYdjojJWVoesaZ5DBdA 5HaR4yf89HjNNpJwnN+Ckc1yEluHONUSYxTe3/st8X1smGaQmZpUiBURU87DKAr4/5WYNwgAydB +A1gmBruUK6OsoOMTJeFYBbS8XTGodUfu0WM4nKZJXqu/DU/i/QipZA/Vck+upQFyZ0YwawCSVq htTzG88u4QpRuWOqZ2rkPPx9dtOGEo801cOdyM0lLcIpZPhylUBF7YyMGW6qm2PiP7pBDkxrHyq 5iMi+nkiwQmBtRi94jCRcGbZYKK3L3BGqXMtPRDvYjazXL65N+ZeQshCbgzLbw56RwKi+0xIELe Lp8ftYaGHs+aM/DHgl0G98IT8fCYLZs+kvhgCMA+QLft6njz6xhvV7e9fKpEeE2xO8Zpp64Jk99 6MneaXvlViTgNZ45GVMNI0PLl78EO9SyOeGgVRUBzN5KLYMyzfs5l424QGFnN9bK1tr1S7nJRh+ scot81cdzMOF4rQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Swamil Jain The DSS controller on TI's AM62P SoC features two instances of the TI DSS. Each DSS instance supports two video ports, similar to the DSS controller found on the TI AM62X SoC. This allows three independent video streams to be supported: OLDI, DPI, and DSI. Since the DSS instances on AM62P are architecturally similar to those on the AM62X DSS controller, the existing dispc_am625_feats configuration can be reused for the AM62P DSS support. This commit adds the necessary device tree compatibility entry for "ti,am62p-dss" in the tidss driver, pointing to dispc_am625_feats, thereby enabling DSS support on AM62P devices. Signed-off-by: Swamil Jain Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/tidss/tidss_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index aef945101be4..2d056dc1c5ff 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -246,6 +246,7 @@ static const struct of_device_id tidss_of_table[] =3D { { .compatible =3D "ti,am625-dss", .data =3D &dispc_am625_feats, }, { .compatible =3D "ti,am62a7-dss", .data =3D &dispc_am62a7_feats, }, { .compatible =3D "ti,am62l-dss", .data =3D &dispc_am62l_feats, }, + { .compatible =3D "ti,am62p-dss", .data =3D &dispc_am625_feats, }, { .compatible =3D "ti,am65x-dss", .data =3D &dispc_am65x_feats, }, { .compatible =3D "ti,j721e-dss", .data =3D &dispc_j721e_feats, }, { } --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84AE93C417F; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Jayesh Choudhary TI's AM62P and J722S SoCs support 2 display subsystems (DSS), DSS0 and DSS1, each with two video ports (VP) and two video planes. The outputs from the DSS VPs can be routed to two OLDI TXes (OLDI0, OLDI1), a DSI TX, or parallel DPI output. DSS0 supports: - VP0: OLDI0 in single-link mode or OLDI0 and OLDI1 in dual-link or clone mode. - VP1: DPI DSS1 supports: - VP0: OLDI1 in single-link mode, or DPI - VP1: DPI or DSI The DSI is only connected to VP1 of DSS1, but OLDI and DPI are shared between the DSS instances. Thus only a single VP can output to DPI, and a single VP can use an OLDI block. Note that in single-link configuration OLDI0 can be used by DSS0, and at the same time OLDI1 can be used by DSS1. Add the necessary nodes to k3-am62p-j722s-common-main.dtsi, including DSS0, DSS1, OLDI0, OLDI1, DPHY and DSI. An important note about OLDIs: We have two OLDI hardware blocks. Each OLDI has certain configuration that has to be done before it can be used. The OLDI blocks get this configuration directly from the DSS block, via DSS registers. However, as a single OLDI block can be used either with DSS0 or DSS1, the source for the configuration changes according to (probably, this is unclear) a DSS related clock mux. So, afaics, when thinking about Linux device hierarchy wrt. control busses, OLDI blocks are children of DSS blocks, and they reside in a special DSS bus. And the OLDI parent changes according to the mux. As far as I know, there is no way we can represent this in the DT. Thus the solution used here (and in the driver) is that each DSS node contains the OLDI nodes that can be used with that DSS. Thus the DSS0 node has two child nodes, OLDI0 and OLDI1, and the DSS1 node has one child node, OLDI1. The OLDI1 nodes thus refer to the same piece of hardware, and they cannot be used at the same time. The selection which OLDI nodes to use are chosen in the board dts files, so assuming the dts files are correct, no resource conflict can happen. This is not a very nice solution, but the hardware doesn't make it easy to have a clean solution, and, most importantly, this works. [j-choudhary@ti.com: Refactor changes for k3-am62p-j722s-common-main.dtsi and add changes for new OLDI driver support] Signed-off-by: Aradhya Bhatia Signed-off-by: Jayesh Choudhary Signed-off-by: Swamil Jain [tomi.valkeinen: various fixes and improvements] Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 112 +++++++++++++++++= ++++ arch/arm64/boot/dts/ti/k3-am62p.dtsi | 16 +++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 16 +++ 3 files changed, 144 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/= arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 58805e287496..8b65c6efc148 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -64,6 +64,11 @@ audio_refclk1: clock@82e4 { #clock-cells =3D <0>; }; =20 + dss_oldi_io_ctrl: dss-oldi-io-ctrl@8600 { + compatible =3D "ti,am625-dss-oldi-io-ctrl", "syscon"; + reg =3D <0x8600 0x200>; + }; + phy_gmii_sel: phy@4044 { compatible =3D "ti,am654-phy-gmii-sel"; reg =3D <0x4044 0x8>; @@ -1111,6 +1116,113 @@ dphy0: phy@30110000 { status =3D "disabled"; }; =20 + dss0: dss@30200000 { + compatible =3D "ti,am62p-dss"; + reg =3D <0x00 0x30200000 0x00 0x1000>, /* common */ + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30206000 0x00 0x1000>, /* vid */ + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ + <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ + <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "vid", + "ovr1", "ovr2", "vp1", "vp2", "common1"; + power-domains =3D <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; /* DSS0 */ + clocks =3D <&k3_clks 186 6>, + <&dss0_vp1_clk>, + <&k3_clks 186 2>; + clock-names =3D "fck", "vp1", "vp2"; + interrupts =3D ; + ti,dpi-io-ctrl =3D <&main_conf 0x8300>; + status =3D "disabled"; + + oldi-transmitters { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dss0_oldi0: oldi@0 { + reg =3D <0>; + clocks =3D <&k3_clks 186 0>; + clock-names =3D "serial"; + ti,oldi-io-ctrl =3D <&dss_oldi_io_ctrl>; + status =3D "disabled"; + power-domains =3D <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>; /* OLDI0_VD */ + }; + + dss0_oldi1: oldi@1 { + reg =3D <1>; + clocks =3D <&k3_clks 186 0>; + clock-names =3D "serial"; + ti,oldi-io-ctrl =3D <&dss_oldi_io_ctrl>; + status =3D "disabled"; + power-domains =3D <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1_VD */ + }; + }; + }; + + dss1: dss@30220000 { + compatible =3D "ti,am62p-dss"; + reg =3D <0x00 0x30220000 0x00 0x1000>, /* common */ + <0x00 0x30222000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30226000 0x00 0x1000>, /* vid */ + <0x00 0x30227000 0x00 0x1000>, /* ovr1 */ + <0x00 0x30228000 0x00 0x1000>, /* ovr2 */ + <0x00 0x3022a000 0x00 0x1000>, /* vp1: Used for DPI/OLDI */ + <0x00 0x3022b000 0x00 0x1000>, /* vp2: Used DPI/DSI */ + <0x00 0x30221000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "vid", + "ovr1", "ovr2", "vp1", "vp2", "common1"; + power-domains =3D <&k3_pds 232 TI_SCI_PD_EXCLUSIVE>; /* DSS1 */ + clocks =3D <&k3_clks 232 8>, + <&dss1_vp1_clk>, + <&k3_clks 232 4>; + clock-names =3D "fck", "vp1", "vp2"; + interrupts =3D ; + ti,dpi-io-ctrl =3D <&main_conf 0x8300>; + status =3D "disabled"; + + oldi-transmitters { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dss1_oldi1: oldi@1 { + reg =3D <1>; + clocks =3D <&k3_clks 232 0>; + clock-names =3D "serial"; + ti,oldi-io-ctrl =3D <&dss_oldi_io_ctrl>; + status =3D "disabled"; + power-domains =3D <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1_VD */ + }; + }; + }; + + dphy_tx0: phy@301c0000 { + compatible =3D "ti,j721e-dphy"; + reg =3D <0x0 0x301c0000 0x0 0x1000>; + clocks =3D <&k3_clks 238 16>, <&k3_clks 238 1>; + clock-names =3D "psm", "pll_ref"; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 238 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 238 1>; + assigned-clock-parents =3D <&k3_clks 238 2>; + assigned-clock-rates =3D <25000000>; + status =3D "disabled"; + }; + + dsi0: dsi@30500000 { + compatible =3D "ti,j721e-dsi"; + reg =3D <0x0 0x30500000 0x0 0x100000>, <0x0 0x30270000 0x0 0x100>; + clocks =3D <&k3_clks 231 2>, <&k3_clks 231 5>; + clock-names =3D "dsi_p_clk", "dsi_sys_clk"; + power-domains =3D <&k3_pds 231 TI_SCI_PD_EXCLUSIVE>; + interrupt-parent =3D <&gic500>; + interrupts =3D ; + phys =3D <&dphy_tx0>; + phy-names =3D "dphy"; + status =3D "disabled"; + }; + vpu: video-codec@30210000 { compatible =3D "ti,j721s2-wave521c", "cnm,wave521c"; reg =3D <0x00 0x30210000 0x00 0x10000>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi b/arch/arm64/boot/dts/ti/= k3-am62p.dtsi index 9d6266d6ddb8..074dc44ec049 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi @@ -144,6 +144,22 @@ cbass_wakeup: bus@b00000 { }; }; =20 + dss0_vp1_clk: clock-divider-oldi-dss0 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 186 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + + dss1_vp1_clk: clock-divider-oldi-dss1 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 232 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + #include "k3-am62p-j722s-common-thermal.dtsi" }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/= k3-j722s.dtsi index 1b36dcf37925..e34e32ef8b8d 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -228,6 +228,22 @@ cbass_wakeup: bus@b00000 { }; }; =20 + dss0_vp1_clk: clock-divider-oldi-dss0 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 186 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + + dss1_vp1_clk: clock-divider-oldi-dss1 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 232 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + #include "k3-am62p-j722s-common-thermal.dtsi" }; =20 --=20 2.43.0 From nobody Mon Jun 8 12:14:07 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA1813C4B78; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260529-beagley-ai-display-v3-15-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> In-Reply-To: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen , Andrew Davis , Robert Nelson X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7536; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=Ge4aPjOaQi2GtYQmIurGaY0c8IXbvBUBn4UOL1Y1VfU=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBqGVKQbYdNh4QagCbQ5M7DAm9e2x+K1X9j0S5P1 LkJQUOs/pOJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCahlSkAAKCRD6PaqMvJYe 9YalEACaVfwiSw250f8We9JZAjWApwbtwDkh6rnlfLU7irzhDH7NlD+sbuoOs0L6FqSVfAnaUIW LWYr9+NJ8p7mCOSndxOAvvciFL8QN36iA3ZXY2F8UwVpNFLIG42hOTTBFmFKb0vEFEpIrohdBiT W4VDSK4rQbB3t7EWHn5Hxu7pkx/cmmXfTI/1VCSiPthzhcA6XB5HoZyNZi54vy5qtwham/9l/UY fe0YAern0KhjG7kfryDI8qzfMqc+34pBzd8qT3/2JHODQpXyslu01zyXggEp5bvAF7DsOV2p/dt TYuJ5V3Ml4n0FXRnK9nUMvlt/+CKZ134BdFY3zlyn4Rx0uMm7dPuZAFJTt9uhtSLhZefMbLVZXB zmJXAf8ZtsfnS7V3ufTBgGFP1jz9lQZ+zABeo44foe+0oCk1rryLSQeZLDg2xFFcalx40ewAxOo kMBE1TRbYpi2/FaJtaMLHYagnhqRq0Hlt036simluGRVuJP4jlfvxIYkSITJEub+9IQ82YyTWQe hXfmXf7SJHPoemI7Zi6IpdALxUjy0i8og2BnEHZPoZVd3oNpe9yyruy0McrRrz17jCGMy7BFMSR MeMqrpDTkIw+zQDtWvsiQ5hV2n6wCAg0mnDFUf3Z1jEVt7cykTgYS9zVE/XJo3g9fuwd6Rd/4Sq kuqbDKrLXVJKj3A== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Andrew Davis Enable HDMI support for BeagleY-AI platform. The display controller used is TIDSS and the HDMI bridge used is IT66122. Based on DT by: Robert Nelson Signed-off-by: Andrew Davis Signed-off-by: Swamil Jain [tomi.valkeinen: cosmetic fixes] Tested-by: Robert Nelson Tested-by: Swamil Jain Signed-off-by: Tomi Valkeinen --- arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 191 +++++++++++++++++++++= ++++ 1 file changed, 191 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/bo= ot/dts/ti/k3-am67a-beagley-ai.dts index 5255e04b9ac7..f97e3bddf28f 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -146,6 +146,34 @@ led-1 { default-state =3D "on"; }; }; + + hdmi0: connector-hdmi { + compatible =3D "hdmi-connector"; + label =3D "hdmi"; + type =3D "d"; + port { + hdmi_connector_in: endpoint { + remote-endpoint =3D <&it66122_out>; + }; + }; + }; + + sound0: sound { + compatible =3D "simple-audio-card"; + simple-audio-card,name =3D "it66122 HDMI"; + simple-audio-card,format =3D "i2s"; + simple-audio-card,bitclock-master =3D <&hdmi_dailink_master>; + simple-audio-card,frame-master =3D <&hdmi_dailink_master>; + + hdmi_dailink_master: simple-audio-card,cpu { + sound-dai =3D <&mcasp1>; + system-clock-direction-out; + }; + + simple-audio-card,codec { + sound-dai =3D <&it66122>; + }; + }; }; =20 &main_pmx0 { @@ -185,6 +213,14 @@ J722S_IOPAD(0x0240, PIN_INPUT, 7) /* (B24) MMC1_SDCD.G= PIO1_48 */ bootph-all; }; =20 + main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ + J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */ + >; + bootph-all; + }; + mdio_pins_default: mdio-default-pins { pinctrl-single,pins =3D < J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ @@ -227,6 +263,47 @@ vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins { J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ >; }; + + dss1_pins_default: dss1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AB23) VOUT0_VSYNC */ + J722S_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ + J722S_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC26) VOUT0_PCLK */ + J722S_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (AC27) VOUT0_DE */ + J722S_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (W27) VOUT0_DATA0 */ + J722S_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA1 */ + J722S_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA2 */ + J722S_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA3 */ + J722S_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA4 */ + J722S_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA5 */ + J722S_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y26) VOUT0_DATA6 */ + J722S_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (Y27) VOUT0_DATA7 */ + J722S_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA8 */ + J722S_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AA27) VOUT0_DATA9 */ + J722S_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA10 */ + J722S_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA11 */ + J722S_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA12 */ + J722S_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA22) VOUT0_DATA13 */ + J722S_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AB26) VOUT0_DATA14 */ + J722S_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AB27) VOUT0_DATA15 */ + J722S_IOPAD(0x005c, PIN_OUTPUT, 1) /* (AC25) GPMC0_AD8.VOUT0_DATA16 */ + J722S_IOPAD(0x0060, PIN_OUTPUT, 1) /* (U26) GPMC0_AD9.VOUT0_DATA17 */ + J722S_IOPAD(0x0064, PIN_OUTPUT, 1) /* (V27) GPMC0_AD10.VOUT0_DATA18 */ + J722S_IOPAD(0x0068, PIN_OUTPUT, 1) /* (V25) GPMC0_AD11.VOUT0_DATA19 */ + J722S_IOPAD(0x006c, PIN_OUTPUT, 1) /* (V26) GPMC0_AD12.VOUT0_DATA20 */ + J722S_IOPAD(0x0070, PIN_OUTPUT, 1) /* (V24) GPMC0_AD13.VOUT0_DATA21 */ + J722S_IOPAD(0x0074, PIN_OUTPUT, 1) /* (V22) GPMC0_AD14.VOUT0_DATA22 */ + J722S_IOPAD(0x0078, PIN_OUTPUT, 1) /* (V23) GPMC0_AD15.VOUT0_DATA23 */ + >; + }; + + main_mcasp1_pins_default: main-mcasp1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX = */ + J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */ + J722S_IOPAD(0x008c, PIN_OUTPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */ + >; + }; }; =20 &cpsw3g { @@ -284,6 +361,13 @@ J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WK= UP_I2C1_SDA */ >; bootph-all; }; + + hdmi_gpio_pins_default: hdmi-gpio-default-pins { + pinctrl-single,pins =3D < + J722S_MCU_IOPAD(0x0038, PIN_INPUT_PULLUP | PIN_DEBOUNCE_CONF6, 7) /* (D= 8) MCU_MCAN0_RX.MCU_GPIO0_14 HDMI_INTn */ + J722S_MCU_IOPAD(0x0034, PIN_OUTPUT_PULLUP, 7) /* (B2) MCU_MCAN0_TX.MCU_= GPIO0_13 HDMI_RSTn */ + >; + }; }; =20 &wkup_uart0 { @@ -385,6 +469,63 @@ rtc: rtc@68 { }; }; =20 +&main_i2c1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_i2c1_pins_default>; + clock-frequency =3D <400000>; + bootph-all; + + it66122: bridge-hdmi@4c { + compatible =3D "ite,it66122"; + reg =3D <0x4c>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmi_gpio_pins_default>; + vcn33-supply =3D <&vdd_3v3>; + vcn18-supply =3D <&buck2_reg>; + vrf12-supply =3D <&ldo2_reg>; + reset-gpios =3D <&mcu_gpio0 13 GPIO_ACTIVE_LOW>; + interrupt-parent =3D <&mcu_gpio0>; + interrupts =3D <14 IRQ_TYPE_EDGE_FALLING>; + #sound-dai-cells =3D <0>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* + * HDMI can be serviced with 3 potential VPs - + * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1). + * For now, we will service it with DSS1 VP0. + */ + port@0 { + reg =3D <0>; + + it66122_in: endpoint { + bus-width =3D <24>; + remote-endpoint =3D <&dss1_dpi0_out>; + }; + }; + + port@1 { + reg =3D <1>; + + it66122_out: endpoint { + remote-endpoint =3D <&hdmi_connector_in>; + }; + }; + }; + }; +}; + +&main_gpio0 { + status =3D "okay"; +}; + +&mcu_gpio0 { + status =3D "okay"; +}; + &sdhci1 { /* SD/MMC */ vmmc-supply =3D <&vdd_mmc1>; @@ -399,4 +540,54 @@ &sdhci1 { status =3D "okay"; }; =20 +&dss1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&dss1_pins_default>; + + clocks =3D <&k3_clks 232 8>, + <&k3_clks 232 0>, + <&k3_clks 232 4>; + + assigned-clocks =3D <&k3_clks 241 0>, /* DSS1-VP0 */ + <&k3_clks 240 0>, /* DSS1-VP1 */ + <&k3_clks 245 0>; /* DPI Output */ + + assigned-clock-parents =3D <&k3_clks 241 2>, /* PLL 17 HDMI */ + <&k3_clks 240 1>, /* PLL 18 DSI */ + <&k3_clks 245 2>; /* DSS1-DPI0 */ + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* DSS1-VP0: DPI/HDMI Output */ + port@0 { + reg =3D <0>; + + dss1_dpi0_out: endpoint { + remote-endpoint =3D <&it66122_in>; + }; + }; + }; +}; + +&mcasp1 { + status =3D "okay"; + #sound-dai-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_mcasp1_pins_default>; + auxclk-fs-ratio =3D <2177>; + op-mode =3D <0>; /* MCASP_IIS_MODE */ + tdm-slots =3D <2>; + serial-dir =3D < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 0 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt =3D <32>; + rx-num-evt =3D <32>; +}; + #include "k3-j722s-ti-ipc-firmware.dtsi" --=20 2.43.0