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It is a mandatory part of RVA23U64, but a system may provide 64-byte CMO block sizes without satisfying all profile requirements. The ISA string parser currently ignores Zic64b because the extension is not present in the cpufeature table. Add an ISA extension ID and table entry for Zic64b so it can be reported in /proc/cpuinfo when firmware advertises it. Validate the entry against the CBO block sizes discovered from firmware. Only check CBO block sizes that are present, since Zic64b constrains implemented CBO extensions to use 64-byte blocks but does not require all CBO extensions to exist. Signed-off-by: Qingwei Hu --- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 7ef8e5f55c8d..b17cae75c295 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -112,6 +112,7 @@ #define RISCV_ISA_EXT_ZCLSD 103 #define RISCV_ISA_EXT_ZICFILP 104 #define RISCV_ISA_EXT_ZICFISS 105 +#define RISCV_ISA_EXT_ZIC64B 106 =20 #define RISCV_ISA_EXT_XLINUXENVCFG 127 =20 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index f46aa5602d74..510ea6aa66ae 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -136,6 +136,19 @@ static int riscv_ext_zicbop_validate(const struct risc= v_isa_ext_data *data, return 0; } =20 +static int riscv_ext_zic64b_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + if ((riscv_cbom_block_size && riscv_cbom_block_size !=3D 64) || + (riscv_cbop_block_size && riscv_cbop_block_size !=3D 64) || + (riscv_cboz_block_size && riscv_cboz_block_size !=3D 64)) { + pr_err("Zic64b detected in ISA string, disabling as a present CBO block = size is not 64 bytes\n"); + return -EINVAL; + } + + return 0; +} + static int riscv_ext_f_validate(const struct riscv_isa_ext_data *data, const unsigned long *isa_bitmap) { @@ -499,6 +512,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D { __RISCV_ISA_EXT_SUPERSET(c, RISCV_ISA_EXT_c, riscv_c_exts), __RISCV_ISA_EXT_SUPERSET_VALIDATE(v, RISCV_ISA_EXT_v, riscv_v_exts, riscv= _ext_vector_float_validate), __RISCV_ISA_EXT_DATA(h, RISCV_ISA_EXT_h), + __RISCV_ISA_EXT_DATA_VALIDATE(zic64b, RISCV_ISA_EXT_ZIC64B, riscv_ext_zic= 64b_validate), __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicbom, RISCV_ISA_EXT_ZICBOM, riscv_xli= nuxenvcfg_exts, riscv_ext_zicbom_validate), __RISCV_ISA_EXT_DATA_VALIDATE(zicbop, RISCV_ISA_EXT_ZICBOP, riscv_ext_zic= bop_validate), __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xli= nuxenvcfg_exts, riscv_ext_zicboz_validate), base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d --=20 2.39.5