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Thu, 28 May 2026 06:47:58 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 1/3] arm64: dts: renesas: rzt2h-n2h-evk: Remove unused MII/GMII pins Date: Thu, 28 May 2026 14:47:50 +0100 Message-ID: <20260528134752.79813-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260528134752.79813-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20260528134752.79813-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Remove the unused TXER, RXER, CRS, and COL pinmux configurations from the gmac1 (ETH3) and gmac2 (ETH2) pin groups. The Ethernet interfaces on both the RZ/T2H and RZ/N2H EVK boards operate in RGMII mode, which does not utilize these extra MII/GMII sideband signal pins. Update the board switch configuration comments to accurately reflect the pin ranges that are actually in use. Fixes: b272b94fd2239 ("arm64: dts: renesas: rzt2h-n2h-evk: Enable Ethernet = support") Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- .../boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts | 14 ++------------ .../boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts | 15 ++------------- 2 files changed, 4 insertions(+), 25 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index e9ed2de128f6..987e44d0bf95 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -256,8 +256,7 @@ can0_pins: can0-pins { /* * GMAC1 Pin Configuration: * - * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and - * P35_0-P35_2 for Ethernet port 3 + * SW2[8] ON - use pins P33_2-P33_7 and P34_0-P34_5 for Ethernet port 3 */ gmac1_pins: gmac1-pins { pinmux =3D , /* ETH3_TXCLK */ @@ -272,10 +271,6 @@ gmac1_pins: gmac1-pins { , /* ETH3_RXD2 */ , /* ETH3_RXD3 */ , /* ETH3_RXDV */ - , /* ETH3_TXER */ - , /* ETH3_RXER */ - , /* ETH3_CRS */ - , /* ETH3_COL */ , /* GMAC1_MDC */ , /* GMAC1_MDIO */ , /* ETH3_REFCLK */ @@ -286,8 +281,7 @@ gmac1_pins: gmac1-pins { * GMAC2 Pin Configuration: * * SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 - * SW2[7] ON - use pins P29_1-P29_7, P30_0-P30_4, and P31_2-P31_5 - * for Ethernet port 2 + * SW2[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 */ gmac2_pins: gmac2-pins { pinmux =3D , /* ETH2_TXCLK */ @@ -302,10 +296,6 @@ gmac2_pins: gmac2-pins { , /* ETH2_RXD2 */ , /* ETH2_RXD3 */ , /* ETH2_RXDV */ - , /* ETH2_TXER */ - , /* ETH2_RXER */ - , /* ETH2_CRS */ - , /* ETH2_COL */ , /* GMAC2_MDC */ , /* GMAC2_MDIO */ , /* ETH2_REFCLK */ diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index ef6cc7497c2c..a66502d8d82b 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -339,9 +339,7 @@ can1_pins: can1-pins { /* * GMAC1 Pin Configuration: * - * DSW5[8] ON - use pins P00_0-P00_2, P33_2-P33_7, P34_0-P34_6 - * for Ethernet port 3 - * DSW12[1] OFF; DSW12[2] ON - use pin P00_3 for Ethernet port 3 + * DSW5[8] ON - use pins P33_2-P33_7 and P34_0-P34_6 for Ethernet port 3 */ gmac1_pins: gmac1-pins { pinmux =3D , /* ETH3_TXCLK */ @@ -356,10 +354,6 @@ gmac1_pins: gmac1-pins { , /* ETH3_RXD2 */ , /* ETH3_RXD3 */ , /* ETH3_RXDV */ - , /* ETH3_TXER */ - , /* ETH3_RXER */ - , /* ETH3_CRS */ - , /* ETH3_COL */ , /* GMAC1_MDC */ , /* GMAC1_MDIO */ , /* ETH3_REFCLK */ @@ -370,8 +364,7 @@ gmac1_pins: gmac1-pins { * GMAC2 Pin Configuration: * * DSW5[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 - * DSW5[7] ON - use pins P29_1-P29_7, P30_0-P30_4, P30_7, - * P31_2, P31_4 and P31_5 are used for Ethernet port 2 + * DSW5[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 * DSW13[7] OFF; DSW13[8] ON - use pin P13_7 for IRQ14 */ gmac2_pins: gmac2-pins { @@ -387,10 +380,6 @@ gmac2_pins: gmac2-pins { , /* ETH2_RXD2 */ , /* ETH2_RXD3 */ , /* ETH2_RXDV */ - , /* ETH2_TXER */ - , /* ETH2_RXER */ - , /* ETH2_CRS */ - , /* ETH2_COL */ , /* GMAC2_MDC */ , /* GMAC2_MDIO */ , /* ETH2_REFCLK */ --=20 2.54.0 From nobody Mon Jun 8 15:48:15 2026 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 357FD2749ED for ; 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charset="utf-8" From: Lad Prabhakar Update the gmac1 (ETH3) and gmac2 (ETH2) pin configurations on the RZ/T2H and RZ/N2H EVK boards to comply with the electrical specifications defined in Table 58.11 of the hardware user manual. While restructuring the nodes into pin groups, fix a copy-paste comment typo in the RZ/N2H device tree where the ETH3_TXD1 pin mux configuration was mistakenly labeled as ETH3_TXD0. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 130 +++++++++++++----- .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 129 ++++++++++++----- 2 files changed, 191 insertions(+), 68 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index 987e44d0bf95..46ae17d0795b 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -258,23 +258,54 @@ can0_pins: can0-pins { * * SW2[8] ON - use pins P33_2-P33_7 and P34_0-P34_5 for Ethernet port 3 */ - gmac1_pins: gmac1-pins { - pinmux =3D , /* ETH3_TXCLK */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD1 */ - , /* ETH3_TXD2 */ - , /* ETH3_TXD3 */ - , /* ETH3_TXEN */ - , /* ETH3_RXCLK */ - , /* ETH3_RXD0 */ - , /* ETH3_RXD1 */ - , /* ETH3_RXD2 */ - , /* ETH3_RXD3 */ - , /* ETH3_RXDV */ - , /* GMAC1_MDC */ - , /* GMAC1_MDIO */ - , /* ETH3_REFCLK */ - ; /* IRQ3 */ + gmac1_pins: gmac1-group { + txclk-pins { + pinmux =3D ; /* ETH3_TXCLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux =3D , /* ETH3_TXD0 */ + , /* ETH3_TXD1 */ + , /* ETH3_TXD2 */ + , /* ETH3_TXD3 */ + ; /* ETH3_TXEN */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + }; + + rx-pins { + pinmux =3D , /* ETH3_RXCLK */ + , /* ETH3_RXD0 */ + , /* ETH3_RXD1 */ + , /* ETH3_RXD2 */ + , /* ETH3_RXD3 */ + ; /* ETH3_RXDV */ + input-schmitt-disable; + }; + + md-pins { + pinmux =3D , /* GMAC1_MDC */ + ; /* GMAC1_MDIO */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux =3D ; /* ETH3_REFCLK */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <1>; + }; + + irq-pins { + pinmux =3D ; /* IRQ3 */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; }; =20 /* @@ -283,23 +314,54 @@ gmac1_pins: gmac1-pins { * SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 * SW2[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 */ - gmac2_pins: gmac2-pins { - pinmux =3D , /* ETH2_TXCLK */ - , /* ETH2_TXD0 */ - , /* ETH2_TXD1 */ - , /* ETH2_TXD2 */ - , /* ETH2_TXD3 */ - , /* ETH2_TXEN */ - , /* ETH2_RXCLK */ - , /* ETH2_RXD0 */ - , /* ETH2_RXD1 */ - , /* ETH2_RXD2 */ - , /* ETH2_RXD3 */ - , /* ETH2_RXDV */ - , /* GMAC2_MDC */ - , /* GMAC2_MDIO */ - , /* ETH2_REFCLK */ - ; /* IRQ13 */ + gmac2_pins: gmac2-group { + txclk-pins { + pinmux =3D ; /* ETH2_TXCLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux =3D , /* ETH2_TXD0 */ + , /* ETH2_TXD1 */ + , /* ETH2_TXD2 */ + , /* ETH2_TXD3 */ + ; /* ETH2_TXEN */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + }; + + rx-pins { + pinmux =3D , /* ETH2_RXCLK */ + , /* ETH2_RXD0 */ + , /* ETH2_RXD1 */ + , /* ETH2_RXD2 */ + , /* ETH2_RXD3 */ + ; /* ETH2_RXDV */ + input-schmitt-disable; + }; + + md-pins { + pinmux =3D , /* GMAC2_MDC */ + ; /* GMAC2_MDIO */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux =3D ; /* ETH2_REFCLK */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <1>; + }; + + irq-pins { + pinmux =3D ; /* IRQ13 */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; }; =20 /* diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/= arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index a66502d8d82b..174b8f728522 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -341,23 +341,54 @@ can1_pins: can1-pins { * * DSW5[8] ON - use pins P33_2-P33_7 and P34_0-P34_6 for Ethernet port 3 */ - gmac1_pins: gmac1-pins { - pinmux =3D , /* ETH3_TXCLK */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD2 */ - , /* ETH3_TXD3 */ - , /* ETH3_TXEN */ - , /* ETH3_RXCLK */ - , /* ETH3_RXD0 */ - , /* ETH3_RXD1 */ - , /* ETH3_RXD2 */ - , /* ETH3_RXD3 */ - , /* ETH3_RXDV */ - , /* GMAC1_MDC */ - , /* GMAC1_MDIO */ - , /* ETH3_REFCLK */ - ; /* IRQ15 */ + gmac1_pins: gmac1-group { + txclk-pins { + pinmux =3D ; /* ETH3_TXCLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux =3D , /* ETH3_TXD0 */ + , /* ETH3_TXD1 */ + , /* ETH3_TXD2 */ + , /* ETH3_TXD3 */ + ; /* ETH3_TXEN */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + }; + + rx-pins { + pinmux =3D , /* ETH3_RXCLK */ + , /* ETH3_RXD0 */ + , /* ETH3_RXD1 */ + , /* ETH3_RXD2 */ + , /* ETH3_RXD3 */ + ; /* ETH3_RXDV */ + input-schmitt-disable; + }; + + md-pins { + pinmux =3D , /* GMAC1_MDC */ + ; /* GMAC1_MDIO */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux =3D ; /* ETH3_REFCLK */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <1>; + }; + + irq-pins { + pinmux =3D ; /* IRQ15 */ + drive-strength-microamp =3D <5000>; + slew-rate =3D <0>; + input-schmitt-disable; + }; }; =20 /* @@ -367,24 +398,54 @@ gmac1_pins: gmac1-pins { * DSW5[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 * DSW13[7] OFF; DSW13[8] ON - use pin P13_7 for IRQ14 */ - gmac2_pins: gmac2-pins { - pinmux =3D , /* ETH2_TXCLK */ - , /* ETH2_TXD0 */ - , /* ETH2_TXD1 */ - , /* ETH2_TXD2 */ - , /* ETH2_TXD3 */ - , /* ETH2_TXEN */ - , /* ETH2_RXCLK */ - , /* ETH2_RXD0 */ - , /* ETH2_RXD1 */ - , /* ETH2_RXD2 */ - , /* ETH2_RXD3 */ - , /* ETH2_RXDV */ - , /* GMAC2_MDC */ - , /* GMAC2_MDIO */ - , /* ETH2_REFCLK */ - ; /* IRQ14 */ + gmac2_pins: gmac2-group { + txclk-pins { + pinmux =3D ; /* ETH2_TXCLK */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + input-schmitt-disable; + }; =20 + txd-en-pins { + pinmux =3D , /* ETH2_TXD0 */ + , /* ETH2_TXD1 */ + , /* ETH2_TXD2 */ + , /* ETH2_TXD3 */ + ; /* ETH2_TXEN */ + drive-strength-microamp =3D <11800>; + slew-rate =3D <1>; + }; + + rx-pins { + pinmux =3D , /* ETH2_RXCLK */ + , /* ETH2_RXD0 */ + , /* ETH2_RXD1 */ + , /* ETH2_RXD2 */ + , /* ETH2_RXD3 */ + ; /* ETH2_RXDV */ + input-schmitt-disable; + }; + + md-pins { + pinmux =3D , /* GMAC2_MDC */ + ; /* GMAC2_MDIO */ + drive-strength-microamp =3D <5000>; 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charset="utf-8" From: Lad Prabhakar Configure the drive strength, slew rate, and Schmitt trigger settings for the sci0 pin group shared by the RZ/T2H and RZ/N2H EVK boards. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/a= rm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index e86e6d3aa8a3..ceccddb92d40 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -257,6 +257,9 @@ &pinctrl { sci0_pins: sci0-pins { pinmux =3D , ; + drive-strength-microamp =3D <9000>; + slew-rate =3D <1>; + input-schmitt-disable; }; =20 #if SD0_EMMC --=20 2.54.0