From nobody Mon Jun 8 16:31:18 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5620C33FE02 for ; Thu, 28 May 2026 07:02:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779951766; cv=none; b=k6du78ydhW2G4kuUnvXSJDg1c0WAYEe24EKrnTCTI1Em+VRjF14Fd0X5niHuNfUoYUJ1jJ01V0ApYj215AOLfiFfoY5+cISCQxwTu9uw3HqCknl0PGmQBS2eWQUmmuF4q8DPM0gYwINLLyBSBJE/uNQX1xGEb+o/hQBhtF1RQdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779951766; c=relaxed/simple; bh=Jhc8qUWtSc1IrwDFgxavhQukC6b4/3jebcQu5s1mIXQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mJUVqk2jEbIXueEuSshjVQBKik7C9kzSJzqFcBFXBVHT6aXFNtiuS6UwRQUpynLrGrQX5uKRZWLl68NrsCsXiVuTygeb8uUid2NLCR81ukaIApSy5+JzU/G9XHq58OO336Grhp3FpkhebDDe6yf8iIYJ/p/jTzVCWIfBWOrPrhY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=km6DaGjr; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="km6DaGjr" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so130550695e9.0 for ; Thu, 28 May 2026 00:02:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779951763; x=1780556563; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=27noQEsp6n6LMgwARN2ogBjiIyea81AwQFILjhtoHss=; b=km6DaGjr4YMG+M8bOXSuk/bCo+AiChLYk9fwB+bHbAj4Fka+AAqVb49MBpm5XlGUul cZTuvSLBiFHdwY/2peZCpC4GZnH5s8vYVpQd6Ikbi2CcPQAQRJOxFt0PJs/kxJznwvwm DVp+Jw8QZ4hkcHDGt78w/DUTLZVhDEngYSY9sN05NFD/JoJ1247Gc0kiYHUjOhXBfwwA xOB/U9yOMAunt/eOjLndOIBfOxxkraRUTVnXVqgLwsIB1QJwZlLv3h9YLEmwmCaj+27p pxp+088mXTwkFYHufgrKShDjDguBdoGVoKNacj6PTok50T9lIVRUzKZmTAztJS7yARSW PFDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779951763; x=1780556563; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=27noQEsp6n6LMgwARN2ogBjiIyea81AwQFILjhtoHss=; b=LQU3OScwq+Jv21mc3OwQsLWhQyMnFsCYERgY9faFg/8ZvWCOYrbHZMmgWnug5/IBpt ywKY8Ne8w2/aMm2x1aZS/l+PRG7rMvJK1uR5R/5E9LHx4aHMXjMd/6EmK4kodFe/42VG E5SWr6JzzY1ndtGnUnlv9mhCLPUoAOU59egkEBk+8P2UxLJn6kYYiOA9+wxWwci4I2HZ 7vQ1V4Z1dCDuUvlGQBtGMgL8kavAbSsPb0m4VRtgl+/Yx6zcsc9KGv5PUGMk7r4NDBM4 rXKGnpxbJCtTe4HYJQwXktWnUbn+Tj73zqB6X7Q8Q/PAWBVTIKZjrnLT40A38qcrPNPf 9piQ== X-Forwarded-Encrypted: i=1; AFNElJ/xeVhz6pNytaMCYEPiObA37ij2Fn3wY57XP1moL5Oh1IqRQSf4b7Rzk37Y+Tj90vnLNNnt+QIwEB/XCUw=@vger.kernel.org X-Gm-Message-State: AOJu0YxBiAt5mrp+Kg6u9qfhj13RgymUXJsyBrfc6FbWD546RfChHX8j SZtOmRp/aMPR4g/zflU4fJOHLcP1IbdYFmvq3CmL8g1YMAma61Xqbpm/ X-Gm-Gg: Acq92OEZBrP5dAmh0v2+DIXhu0NEfSVHHM1Q5m6ivf8jP5Er2kvHZkEFtRjn7gdOeu7 Jx9NrDyZwf2uIrn53E2sV7o/oioI1XamFVgTZHJF3ooCc0zKW224UywQoz+CW+onfAwVLtgAiot PgXfuj8u0hbUXMScdWZh25CXBXmYn8o/V25WuVIGmY7ewK9+aFrNYWs+hhzj9bs4hJ1OAOFFOnp grBIxi8aIRCQIn21/YXXnlfYX11n5UYbCeVy45LC6ROOkQqxgwPR4eS7mZvIh69LGCJEZQfeKJd +bbNkfoQk59eom/enQMQONC18Iltec2fsDX3rZ9NM1GbTcxSSZrOXGlsX60VVH7Papx2BYDxlom sO4LwarDcGAgytzSOu7kuy7996VfGqTQxIALOvMz3prqRg40hPQeZeLneIatl7ONO5AcPtGOg96 29HlBTUflSrguqNWUpMerTPIzAj4/n+0lFCwR5k33v6u9Vx7345lLl8iCp7aM= X-Received: by 2002:a05:600c:3506:b0:488:d6eb:e63c with SMTP id 5b1f17b1804b1-490464eae0emr410227015e9.15.1779951762470; Thu, 28 May 2026 00:02:42 -0700 (PDT) Received: from localhost.localdomain ([2a00:23c4:a700:7301:c724:a823:10ad:6b85]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909235d4e5sm28528385e9.2.2026.05.28.00.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 00:02:42 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 1/2] arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys Date: Thu, 28 May 2026 08:02:34 +0100 Message-ID: <20260528070239.33352-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260528070239.33352-1-biju.das.jz@bp.renesas.com> References: <20260528070239.33352-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das RZ/G3L SMARC EVK has 3 user buttons called USER_SW1, USER_SW2 and USER_SW3. Instantiate the gpio-keys driver for these buttons by removing place holders and replacing proper pins for the buttons. The USER_SW{1,2,3} configured as wakeup-source, so it can wakeup the system during s2idle. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v1->v2: * Updated the macro value for RZ_BOOT_MODE3, so setting the switch ON pulls low, selecting SDIO {CD,IOVS,PWEN} and GPIO4 active. * Updated comment for SW_GPIO4 as it uses a single-pole double-throw switch. * Updated macro value for SW_GPIO4 such that SW_GPIO4 =3D=3D 1 would mean that GPIO4 is enabled. * Updated keys device node with !RZ_BOOT_MODE3 || !SW_GPIO4. --- .../boot/dts/renesas/r9a08g046l48-smarc.dts | 26 ++++++++++++++----- .../boot/dts/renesas/rzg3l-smarc-som.dtsi | 17 ++++++++++++ 2 files changed, 37 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a08g046l48-smarc.dts index 0ae052238b3b..ef00e316fbde 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts @@ -7,10 +7,18 @@ =20 /dts-v1/; =20 -/* Add place holder to avoid compilation error with renesas-smarc2.dtsi */ -#define KEY_1_GPIO 1 -#define KEY_2_GPIO 2 -#define KEY_3_GPIO 3 +/* Switch selection settings */ +#define RZ_BOOT_MODE3 1 +#define SW_DPI_EN 0 +#define SW_GPIO4 1 + +#define PMOD_GPIO4 0 +#define PMOD_GPIO6 0 +#define PMOD_GPIO7 0 + +#define KEY_1_GPIO RZG3L_GPIO(J, 3) +#define KEY_2_GPIO RZG3L_GPIO(6, 4) +#define KEY_3_GPIO RZG3L_GPIO(6, 5) =20 #include #include @@ -30,11 +38,17 @@ aliases { }; =20 &keys { - status =3D "disabled"; - +#if !RZ_BOOT_MODE3 || !SW_GPIO4 || PMOD_GPIO4 /delete-node/ key-1; +#endif + +#if SW_DPI_EN || PMOD_GPIO6 /delete-node/ key-2; +#endif + +#if SW_DPI_EN || PMOD_GPIO7 /delete-node/ key-3; +#endif }; =20 &pinctrl { diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/= boot/dts/renesas/rzg3l-smarc-som.dtsi index 7770de2064d9..06c6ccac5ad2 100644 --- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi @@ -5,6 +5,23 @@ * Copyright (C) 2026 Renesas Electronics Corp. */ =20 +/* + * Please set the below switch position on the SoM and the corresponding m= acro + * on the board DTS: + * + * Switch position SYS.5, Macro SW_DPI_EN: + * 0 - Select multiple SMARC signals active + * 1 - Select LCD + * + * Switch position BOOT.1, Macro RZ_BOOT_MODE3: + * 0 - Select JTAG enabled + * 1 - Select SDIO {CD,IOVS,PWEN} and GPIO4 Active + * + * Switch position SW_GPIO4, Macro SW_GPIO4: + * 0 - Select RZ_VBAT_TAMPER (position 2-1) + * 1 - Select GPIO4 (position 2-3) + */ + / { compatible =3D "renesas,rzg3l-smarcm", "renesas,r9a08g046l48", "renesas,r= 9a08g046"; =20 --=20 2.43.0 From nobody Mon Jun 8 16:31:18 2026 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2325A348C4C for ; Thu, 28 May 2026 07:02:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779951769; cv=none; b=q/G5uFco/OfNQ9OrTqjVbDIeqOEmjSpad0P3+XSonZws0r8jE9KHZvUGwMe9uVFibb+8vD1u3ULmEZ+PHaJS+x2lcOhIUrGvXenGBAR6kEi2WzTDJ0IUftri5ZQmb4SE2J7O3HhHy6wfgmosjffjiaKsLIUzTfN96YwcjSz+/ik= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779951769; c=relaxed/simple; bh=OSwO8Quw0mGn2zzjnQSe8oDeaDN8sCW2Vk3k8tor4cM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D6hAaAXy51E7w4ERURu7iyaRJzTVFr60r9uOE/FEpiwGtEy0uN1MhLt6x6IgkLwO1A2ThvHFU2vSLuTBgzNGjSGnBGMpHLIVGoo8TXavuxHtBd/UMO3tpIbm3E0TCN5FyHeWhdGiokF3ptiaL7i8inSfRnatpCYc9DYZvbu6KjM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EYla9j6e; arc=none smtp.client-ip=209.85.221.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EYla9j6e" Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-45ee5cdbd28so188781f8f.1 for ; Thu, 28 May 2026 00:02:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779951763; x=1780556563; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pHVNKCcJfHbhCv4abTmlnrVl7h7/qI/6wywlKQ29e1M=; b=EYla9j6e9jITKe4HCQ6MQ0/9VXGR+ucnfZzWertqbc4q3tn2gIFZSuue+OMWWu/1uC O81+tK2V0T1TV+Wswm0NfTxygX/UXpYM4OJYNzugXSHNPdYY9XymafOaGk0WSenkpHzO IwLyc/x2NJa5JIMz4Xo+9vlsT9+PZmMX/MDgVfDbhQXDhWYSq5Qhtyq5MdEoe1nOjD7b AaFB9pJOFh7J9Qgj8WfpJSz/pyGjoRAOkpRCUXs1mdmdSG2pMQBpxT9h/T9pHPAp3Ln1 Q8Y8eP1ihnGf43h/VbOpemmOlhEj/Uavapz34jjgBTviMClV0RmaGWCj69ZiRrtdbskf xhaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779951763; x=1780556563; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=pHVNKCcJfHbhCv4abTmlnrVl7h7/qI/6wywlKQ29e1M=; b=AmLM/H1q+BNBnb99Rj4Cs7TJof9N5graxOhhoLQgE3uIAGRC3aRPf4fjKqOEyztuML Djp7jF5+BkMLc91umtNZkTWC7XuGDQPTQ8GlkAPVUdA8U8z3JjLh479M1hUo7163Mi3c Jwfgl7tpl4gCmftmRCvSY49q65TFjsNI2k2CUvmRzKtOoTtc67vxI2KksK7ekCRZAz0h yc7d1CWNTqSHWQl7iQvkIZ0elDct6aqFKfk0APsAGf3NE8a6/22W4GP/P1MjjdwcMl2Z 5iwNYkgBGIsT2Fd6z1prMz3PV3LWqe+oHG5jJJOiAzHzU20Xe4oU0aLX5swGN0odnUI2 4t9g== X-Forwarded-Encrypted: i=1; AFNElJ9dTtOU1UXJQeTsFBXQpYVgBnjQ0YTwhsE9htU9XJkFoF1bSJOszDgwjKN7GVqq+v12zt1wDjFVnUCC5FQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yz7/asRGIGiKDnYUle7Eg/NaT7Q2qOIsfB2wpp71ZDpyb41FPrF 1Zlt3rdctGOVQqLwkkyLnhlf2mD7dCIBQPb5ewO/Tvo/Rqw9xUIBiz9W2NdRVg== X-Gm-Gg: Acq92OFoACqlZryXXDUMYVA35IwQM9MiuNJjQv2HMbpmwtXT0Xs48DnV78uGlDBPKKG oOJwUFThit00Myf1U2jDge/baU4Lg2DIejrunmuh+WX+WHmN74h1zAUAGg0xpTDJ5+kzo1QpGvE wbTHd5kjnhWaatxCHkoUYftlvozamS14pNxt832LM8/LMXmD1o701PDILzYE2r+1HwkcEwTaQgH OrDzaJcGUX4H0SB/UnXM2pL3rn4KOiG8ax2CXr1llOOxJG/tSFcch22/Asi/pCeRiJV4tWy7KWR IHxpXw9Aww36C0OyNEw4BaVeUll3QQRvE0zKmYEye9gtu/qwSNHd5RK1YYqU5SzLsoTXduXSeKH 66fg4wKVJ4Yrli3LY2AhWFJ7z8i+yGrAOGuXqLzXGOSQ59EBdWgpGwHZNrMhk+5DO1gl7fCf0qq cBEH8eKrLuO7OzTchF0lhMhnyBHrpF308w2Fv3np+u1vlidyTLipsdegxXoIY= X-Received: by 2002:a05:600c:3f18:b0:48f:d620:c27f with SMTP id 5b1f17b1804b1-4909478ed20mr5399365e9.4.1779951763248; Thu, 28 May 2026 00:02:43 -0700 (PDT) Received: from localhost.localdomain ([2a00:23c4:a700:7301:c724:a823:10ad:6b85]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4909235d4e5sm28528385e9.2.2026.05.28.00.02.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 00:02:43 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 2/2] arm64: dts: renesas: r9a08g046l48-smarc: Enable I2C{2,3} devices Date: Thu, 28 May 2026 08:02:35 +0100 Message-ID: <20260528070239.33352-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260528070239.33352-1-biju.das.jz@bp.renesas.com> References: <20260528070239.33352-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Enable I2C{2,3} on RZ/G3L SMARC EVK board. The I2C3 is enabled by setting SW SYS.2 to OFF position. Reviewed-by: Geert Uytterhoeven Signed-off-by: Biju Das --- v1->v2: * Collected tag. --- .../boot/dts/renesas/r9a08g046l48-smarc.dts | 29 +++++++++++++++++++ .../boot/dts/renesas/rzg3l-smarc-som.dtsi | 4 +++ 2 files changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a08g046l48-smarc.dts index ef00e316fbde..1512b7df39bd 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts @@ -11,6 +11,7 @@ #define RZ_BOOT_MODE3 1 #define SW_DPI_EN 0 #define SW_GPIO4 1 +#define SW_I3C_EN 0 =20 #define PMOD_GPIO4 0 #define PMOD_GPIO6 0 @@ -33,10 +34,28 @@ / { "renesas,r9a08g046l48", "renesas,r9a08g046"; =20 aliases { + i2c2 =3D &i2c2; + i2c3 =3D &i2c3; serial3 =3D &scif0; }; }; =20 +&i2c2 { + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +#if !SW_I3C_EN +&i2c3 { + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; +#endif + &keys { #if !RZ_BOOT_MODE3 || !SW_GPIO4 || PMOD_GPIO4 /delete-node/ key-1; @@ -52,6 +71,16 @@ &keys { }; =20 &pinctrl { + i2c2_pins: i2c2 { + pinmux =3D , /* RIIC2_SCL */ + ; /* RIIC2_SDA */ + }; + + i2c3_pins: i2c3 { + pinmux =3D , /* RIIC3_SCL */ + ; /* RIIC3_SDA */ + }; + scif0_pins: scif0 { pins =3D "SCIF0_TXD", "SCIF0_RXD"; power-source =3D <1800>; diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/= boot/dts/renesas/rzg3l-smarc-som.dtsi index 06c6ccac5ad2..17bf44778398 100644 --- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi @@ -9,6 +9,10 @@ * Please set the below switch position on the SoM and the corresponding m= acro * on the board DTS: * + * Switch position SYS.2, Macro SW_I3C_EN: + * 0 - SMARC_I2C_GP is enabled + * 1 - I3C is enabled + * * Switch position SYS.5, Macro SW_DPI_EN: * 0 - Select multiple SMARC signals active * 1 - Select LCD --=20 2.43.0