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Wed, 27 May 2026 21:10:49 -0700 (PDT) Received: from ryzen ([2601:644:8000:5b5d:b235:9fff:fe2d:7319]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-30452230b25sm18574374eec.15.2026.05.27.21.10.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 21:10:48 -0700 (PDT) From: Rosen Penev To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , linux-kernel@vger.kernel.org (open list) Subject: [PATCH] gpio: realtek-otto: fix kernel-doc warnings Date: Wed, 27 May 2026 21:10:31 -0700 Message-ID: <20260528041031.728557-1-rosenp@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the missing 'struct' keyword in the kernel-doc comment for realtek_gpio_ctrl, and document the @cpumask_base and @cpu_irq_maskable members that were added later but never described. Also fix the mismatch between documented @imr_line_pos and the actual member name line_imr_pos. Fixes W=3D1 warning: Warning: drivers/gpio/gpio-realtek-otto.c:66 cannot understand function pro= totype: 'struct realtek_gpio_ctrl' Assisted-by: Opencode:BigPickle Signed-off-by: Rosen Penev --- drivers/gpio/gpio-realtek-otto.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-realtek-otto.c b/drivers/gpio/gpio-realtek-o= tto.c index 5e3152c2e51a..37ef56f45318 100644 --- a/drivers/gpio/gpio-realtek-otto.c +++ b/drivers/gpio/gpio-realtek-otto.c @@ -40,16 +40,18 @@ #define REALTEK_GPIO_PORTS_PER_BANK 4 =20 /** - * realtek_gpio_ctrl - Realtek Otto GPIO driver data + * struct realtek_gpio_ctrl - Realtek Otto GPIO driver data * * @chip: Associated gpio_generic_chip instance * @base: Base address of the register block for a GPIO bank + * @cpumask_base: Base address of the per-CPU interrupt mask registers + * @cpu_irq_maskable: CPUs that can receive GPIO interrupts * @lock: Lock for accessing the IRQ registers and values * @intr_mask: Mask for interrupts lines * @intr_type: Interrupt type selection * @bank_read: Read a bank setting as a single 32-bit value * @bank_write: Write a bank setting as a single 32-bit value - * @imr_line_pos: Bit shift of an IRQ line's IMR value. + * @line_imr_pos: Bit shift of an IRQ line's IMR value. * * The DIR, DATA, and ISR registers consist of four 8-bit port values, pac= ked * into a single 32-bit register. Use @bank_read (@bank_write) to get (ass= ign) --=20 2.54.0