From nobody Mon Jun 8 14:37:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3671E3FCB15; Thu, 28 May 2026 15:15:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981309; cv=none; b=mcfrZwhtApzw/OQZ62A79oQY+Fc7BnEDg3DvYTtYi0XylWYKFmqrk7VXvS7AhqxOMgPaK3qsnHbMZeOnLq0a53dvhclDU5DF+Sz5gl207iCUwXtavbEysTY8YLziGLwklJSbjezSDzNdenKyyrDL5XXnOc7xENyvxB61rUXqAgo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981309; c=relaxed/simple; bh=sMKqOEhc3Htrb8khKTDT+DYKE/9pMZ3foMbdEF0FOW8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q2PslimGuJUVXNX5wedpJLvNhcui7NrCRjr9fXEUjHNl962o4WzZ8oKqsmW586lXnrI8RXvO2g9s5S2f3rw8Q8gVYhvTv/2pydLQp8ZimKR8ieW/R1JJ4Dd9s/T8G4lCgn68zPBgmZUnndbNflzLL29Bf7Knj81wqT7NouDVkQU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=I7K7vDGZ; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="I7K7vDGZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779981309; x=1811517309; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=sMKqOEhc3Htrb8khKTDT+DYKE/9pMZ3foMbdEF0FOW8=; b=I7K7vDGZDR4kozFnsdrk/Xt9pU/AHdLJp4mp/wjkjKd7U+q60lm8tPy3 VvdNW0S8hcdTd5hoKClPT+I7hmGTI4rwnNy1RkgBUHavr45+rnjHXPwnr 4ir2niq8bNI67c/0iHsIKCtQjWgu/c7+BShMhoi3URk2FLArK0dW/hafJ 7Uiyu5RGK7+uKzjWw0MtpwYgR7JOPDC8H+C+SaHG/xYMDiXVJAF8smowX kUeoDeaA0rk1KWfFka1azeKR4TBdgssXEVlVU2Fg678R2V+pTL3gxWKJe CRc9DCDtokJN0q4j9vMK8I2C4DjNNeToLZFvOHA5R/6T20b62dcR5w7OO A==; X-CSE-ConnectionGUID: x6y0h8MjQ9e5aKnd+IF/mg== X-CSE-MsgGUID: iNT4JTzsSdepX+5Le8uddQ== X-IronPort-AV: E=McAfee;i="6800,10657,11800"; a="80887335" X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="80887335" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:06 -0700 X-CSE-ConnectionGUID: Kj+A6K6TTj2D51KEZYnWYg== X-CSE-MsgGUID: APdnTfXjTvmDz8QQBWWMeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="241536815" Received: from unknown (HELO [172.25.112.21]) ([172.25.112.21]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:06 -0700 From: Ricardo Neri Date: Thu, 28 May 2026 08:25:42 -0700 Subject: [PATCH v2 1/5] thermal: intel: Fix dangling resources on thermal_throttle_online() failure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260528-rneri-directed-therm-intr-v2-1-8e2f9e0c1a36@linux.intel.com> References: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> In-Reply-To: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Lukasz Luba Cc: x86@kernel.org, Srinivas Pandruvada , Zhang Rui , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ricardo Neri , Ricardo Neri X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779981967; l=1675; i=ricardo.neri-calderon@linux.intel.com; s=20250602; h=from:subject:message-id; bh=sMKqOEhc3Htrb8khKTDT+DYKE/9pMZ3foMbdEF0FOW8=; b=rYG8QSlMGTIvwBoZTjjbooEIPwcv8o2YktFydz0SHkGb68unKVV0BcyCetYlIi7VWQ+QcTcjx Y+AejE0fb4lCaq93baBA6YptzEWHpP7F/n6M+dsedb/NIFPGzUe6b5g X-Developer-Key: i=ricardo.neri-calderon@linux.intel.com; a=ed25519; pk=NfZw5SyQ2lxVfmNMaMR6KUj3+0OhcwDPyRzFDH9gY2w= The function thermal_throttle_add_dev() may fail and abort a CPU hotplug online operation. Since the failure occurs within the online callback, thermal_throttle_online(), the CPU hotplug framework does not invoke the corresponding offline callback. As a result, the hardware and software resources set up during the failed operation are not torn down. Since only thermal_throttle_add_dev() can fail, call it before setting up the rest of the resources. Fixes: f6656208f04e ("x86/mce/therm_throt: Optimize notifications of therma= l throttle") Signed-off-by: Ricardo Neri --- Changes in v2: * Introduced this patch. --- drivers/thermal/intel/therm_throt.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/th= erm_throt.c index 44fa4dd15dd1..45a8ef4a608b 100644 --- a/drivers/thermal/intel/therm_throt.c +++ b/drivers/thermal/intel/therm_throt.c @@ -529,8 +529,13 @@ static int thermal_throttle_online(unsigned int cpu) { struct thermal_state *state =3D &per_cpu(thermal_state, cpu); struct device *dev =3D get_cpu_device(cpu); + int err; u32 l; =20 + err =3D thermal_throttle_add_dev(dev, cpu); + if (err) + return err; + state->package_throttle.level =3D PACKAGE_LEVEL; state->core_throttle.level =3D CORE_LEVEL; =20 @@ -548,7 +553,7 @@ static int thermal_throttle_online(unsigned int cpu) l =3D apic_read(APIC_LVTTHMR); apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); =20 - return thermal_throttle_add_dev(dev, cpu); + return err; } =20 static int thermal_throttle_offline(unsigned int cpu) --=20 2.43.0 From nobody Mon Jun 8 14:37:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72F883F787B; Thu, 28 May 2026 15:15:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981310; cv=none; b=FL44MXzriJfoafCcx+NE8udkMl3cGJWDNe6a0EpF0H4/mh4k9Usvj3YBgvMk7v/PPhGtfvPgIko/vMMI+DlLI5tgHwgwm69ibVPeAdwvQDAudaO4v85nna5e+2++BUOsqcVanTboNjLhymr8tUN3upE4pRyEup+TWpRkALbQK18= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981310; c=relaxed/simple; bh=JlzNdO/Tu0jxAOy1ftLyJ39j7H2gTMGVMTh7yjyZV0s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O4z7WVD0uShD3V6gKFDyQ0KLbxJk3I8bJvsXO6NuNHQeMEKSEk3Am0AWNsSI/TmbJSt1ayDeZGP+TpXfXCMhMOwVh70JVzoFscxx+lg0ZIXT3dWxVxbzsB/djVU1FgYXMJxjcpvEfW/XCvVuN/vtKVE2C+vitGqkm6z6g6nyAFE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=L1vICXjL; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="L1vICXjL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779981309; x=1811517309; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=JlzNdO/Tu0jxAOy1ftLyJ39j7H2gTMGVMTh7yjyZV0s=; b=L1vICXjLfUO9SuxCkKykmhPqxrDvIY7PCbokjUi6OrYSM9V0Yx73LWAZ nAbjdAoLkzirtufFoa1HdDVnQeiDwVtuCsqLtzqlLK3EwBMIOQrS5pgFG QNxNyJ3X49peMxx0i+SYUZY3F3IA6qk46M31XHfJXGi0eBVr/jB3dB8Ex LF5hJ1WJPdz3wi7SceevktDF2hPuWR3JGhDASXNDoXDoOLbKW1GMabyf3 PrpDwsoqByWoDWfYLYDWbFKoBuxmxZ7B/RqLX9Ap7BAdumNc9aV3pO8jE aTxBQOiOT5Y+NpUFG3Pew7Kkbgt/f/V7VRJ/DLS8w1vmD5iTjlvYumcGP g==; X-CSE-ConnectionGUID: +R3pVRXcTXqaobHSFA7f8A== X-CSE-MsgGUID: 6EmjAPUfTCeR5cl5ewHkdQ== X-IronPort-AV: E=McAfee;i="6800,10657,11800"; a="80887340" X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="80887340" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:07 -0700 X-CSE-ConnectionGUID: bSI6kyCWS860IzZHKmTL+Q== X-CSE-MsgGUID: icDUHT50RIOOj7tiYiNiGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="241536822" Received: from unknown (HELO [172.25.112.21]) ([172.25.112.21]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:07 -0700 From: Ricardo Neri Date: Thu, 28 May 2026 08:25:43 -0700 Subject: [PATCH v2 2/5] x86/thermal: Add bit definitions for Intel Directed Package Thermal Interrupt Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260528-rneri-directed-therm-intr-v2-2-8e2f9e0c1a36@linux.intel.com> References: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> In-Reply-To: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Lukasz Luba Cc: x86@kernel.org, Srinivas Pandruvada , Zhang Rui , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ricardo Neri , Ricardo Neri X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779981967; l=2410; i=ricardo.neri-calderon@linux.intel.com; s=20250602; h=from:subject:message-id; bh=JlzNdO/Tu0jxAOy1ftLyJ39j7H2gTMGVMTh7yjyZV0s=; b=BksjLS/tirNT/q9i5Xz3pOiXyfTViSBoDrfXk7WfZSMuE6YyMUgewQNlRLLhCIsoAapcQ5Rtk +DJI/PpoFPNAPaQ3zR1NvvHIlqpB3eaU8zOrl9ozl+w72lViffweGZx X-Developer-Key: i=ricardo.neri-calderon@linux.intel.com; a=ed25519; pk=NfZw5SyQ2lxVfmNMaMR6KUj3+0OhcwDPyRzFDH9gY2w= Add CPUID and MSR bit definitions required to support Intel Directed Package Thermal Interrupt. A CPU requests directed package-level thermal interrupts by setting bit 25 in IA32_THERM_INTERRUPT. Hardware acknowledges by setting bit 25 in IA32_PACKAGE_THERM_STATUS, indicating that only CPUs that opted in will receive the interrupt. If no CPU in the package requests it, delivery falls back to broadcast. Signed-off-by: Ricardo Neri --- Changes in v2: * Added an empty line to denote a hole in the feature definitions. (Boris) * Renamed definitions (Boris): X86_FEATURE_DIRECTED_PKG_THRM_INTR =3D> X86_FEATURE_DPTI THERM_DIRECTED_INTR_ENABLE =3D> THERM_INT_DPTI_ENABLE PACKAGE_THERM_STATUS_DIRECTED_INTR_ACK =3D> PACKAGE_THERM_STATUS_DPTI_ACK --- arch/x86/include/asm/cpufeatures.h | 2 ++ arch/x86/include/asm/msr-index.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 1d506e5d6f46..ead68fb9913b 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -365,6 +365,8 @@ #define X86_FEATURE_HWP_HIGHEST_PERF_CHANGE (14*32+15) /* HWP Highest perf= change */ #define X86_FEATURE_HFI (14*32+19) /* "hfi" Hardware Feedback Interface = */ =20 +#define X86_FEATURE_DPTI (14*32+24) /* Intel Directed Package Thermal Int= errupt */ + /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */ #define X86_FEATURE_NPT (15*32+ 0) /* "npt" Nested Page Table support */ #define X86_FEATURE_LBRV (15*32+ 1) /* "lbrv" LBR Virtualization support = */ diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index 86554de9a3f5..b67d90f46263 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1006,6 +1006,7 @@ #define THERM_INT_HIGH_ENABLE (1 << 0) #define THERM_INT_LOW_ENABLE (1 << 1) #define THERM_INT_PLN_ENABLE (1 << 24) +#define THERM_INT_DPTI_ENABLE (1 << 25) =20 #define MSR_IA32_THERM_STATUS 0x0000019c =20 @@ -1035,6 +1036,7 @@ =20 #define PACKAGE_THERM_STATUS_PROCHOT (1 << 0) #define PACKAGE_THERM_STATUS_POWER_LIMIT (1 << 10) +#define PACKAGE_THERM_STATUS_DPTI_ACK (1 << 25) #define PACKAGE_THERM_STATUS_HFI_UPDATED (1 << 26) =20 #define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2 --=20 2.43.0 From nobody Mon Jun 8 14:37:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9C4544CF4E; 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X-CSE-ConnectionGUID: Wp/j6N0dQQefG4gx387B7Q== X-CSE-MsgGUID: tZsBGbLhSiySqwFdLGOZ5Q== X-IronPort-AV: E=McAfee;i="6800,10657,11800"; a="80887344" X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="80887344" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:07 -0700 X-CSE-ConnectionGUID: KRE1T4CmQhyG6P0f62RdOQ== X-CSE-MsgGUID: AT/tbURESlyEkNozYtGoEA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="241536828" Received: from unknown (HELO [172.25.112.21]) ([172.25.112.21]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:07 -0700 From: Ricardo Neri Date: Thu, 28 May 2026 08:25:44 -0700 Subject: [PATCH v2 3/5] thermal: intel: Enable the Directed Package-level Thermal Interrupt Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260528-rneri-directed-therm-intr-v2-3-8e2f9e0c1a36@linux.intel.com> References: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> In-Reply-To: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Lukasz Luba Cc: x86@kernel.org, Srinivas Pandruvada , Zhang Rui , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ricardo Neri , Ricardo Neri X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779981967; l=11426; i=ricardo.neri-calderon@linux.intel.com; s=20250602; h=from:subject:message-id; bh=6T9MJHzw5RPUOZth29LWxorosegt11SaYrXukZrBVI8=; b=ZCeY4dfTMFW8ydhZftwXaFr5ybr79yLsIi2H/pebcKD3PuHSQGwHdmfuvFD8PxE/JLLV0fUvE 9P+8XGDL8NeCr5GBLQ/sDTlNg1OK2G9aqfUJR7N7Z/g1zEEVIBhMIwr X-Developer-Key: i=ricardo.neri-calderon@linux.intel.com; a=ed25519; pk=NfZw5SyQ2lxVfmNMaMR6KUj3+0OhcwDPyRzFDH9gY2w= Package-level thermal interrupts are broadcast to all online CPUs within a package, even though only one CPU needs to service them. This results in unnecessary wakeups, lock contention, and corresponding performance and power-efficiency penalties. When supported by hardware, a CPU requests to receive directed package- level thermal interrupts by setting a designated bit in IA32_THERM_INTERRUPT. The operating system must then verify that hardware has acknowledged this request by checking a designated bit in IA32_PACKAGE_THERM_STATUS. Enable directed package-level thermal interrupts on one CPU per package using the CPU hotplug infrastructure. Keep track of the CPUs handling package-level interrupts with an array. If the handling CPU goes offline, select a new CPU. Temporarily enable directed interrupts on both the current and new CPU until hardware acknowledges the new selection, then disable them on the outgoing CPU. Systems without directed-interrupt support continue to broadcast the package-level interrupt to all CPUs. Also, add a rollback mechanism in the CPU hotplug online callback to fall back to broadcast mode if the directed-interrupt acknowledgment fails in any package. This is most important during boot, when all CPUs in a package come online and would otherwise keep retrying on faulty hardware. A complete rollback is not needed in the CPU hotplug offline callback since at that point the hardware is known to work. While here, update an inline comment to point to the correct volume of the Intel Software Developer's Manual. Signed-off-by: Ricardo Neri --- When enabling the interrupt, the kernel may wait up to 15ms for hardware to acknowledge the directed thermal interrupt. In practice, hardware takes much less time. The table below shows latency measurements obtained from 10,000 cycles of CPU offline/online operations that resulted in the redirection of the package-level thermal interrupt. Percentile latency (ms) 50th (median) 0.441 90th 0.744 99th 1.174 99.9th 2.152 It usually takes less than 1ms and ~2ms in unusually long cases. Methodology: The value of the TSC counter is read just after redirecting the interrupt (i.e., writing to MSR_IA32_THERM_INTERRUPT) and again after hardware acknowledges the redirection (i.e., when the expected bit in MSR_IA32_PACKAGE_THERM_STATUS changes). The delta is converted to milliseconds. --- Changes in v2: * Used updated names of the Directed Package Thermal Interrupt CPUID and MSR bits. * Removed the unused argument from directed_thermal_pkg_intr_supported(). * Redesigned the rollback mechanism to handle all packages, not only the boot package. * Fixed the handling of the return value of cpumask_any_but(), which on failure returns small_cpumask_bits, not nr_cpu_ids. * Added measurements of the latency of setup acknowledgment from hardware. * Updated comment to point to the correct volume of the Intel SDM. --- drivers/thermal/intel/therm_throt.c | 220 ++++++++++++++++++++++++++++++++= +++- 1 file changed, 217 insertions(+), 3 deletions(-) diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/th= erm_throt.c index 45a8ef4a608b..dcb5d7051ac6 100644 --- a/drivers/thermal/intel/therm_throt.c +++ b/drivers/thermal/intel/therm_throt.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -244,16 +245,23 @@ static void thermal_intr_init_pkg_clear_mask(void) * IA32_PACKAGE_THERM_STATUS. */ =20 - /* All bits except BIT 26 depend on CPUID.06H: EAX[6] =3D 1 */ + /* All bits except BITs 25 and 26 depend on CPUID.06H: EAX[6] =3D 1 */ if (boot_cpu_has(X86_FEATURE_PTS)) therm_intr_pkg_clear_mask =3D (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9= ) | BIT(11)); =20 /* - * Intel SDM Volume 2A: Thermal and Power Management Leaf + * Intel SDM Volume 1: Thermal and Power Management Leaf * Bit 26: CPUID.06H: EAX[19] =3D 1 */ if (boot_cpu_has(X86_FEATURE_HFI)) therm_intr_pkg_clear_mask |=3D BIT(26); + + /* + * Intel SDM Volume 1: Thermal and Power Management Leaf + * Bit 25: CPUID.06H: EAX[24] =3D 1 + */ + if (boot_cpu_has(X86_FEATURE_DPTI)) + therm_intr_pkg_clear_mask |=3D BIT(25); } =20 /* @@ -524,6 +532,184 @@ static void thermal_throttle_remove_dev(struct device= *dev) sysfs_remove_group(&dev->kobj, &thermal_attr_group); } =20 +static int check_directed_thermal_pkg_intr_ack(void) +{ + unsigned int count =3D 15000; + u64 msr_val; + + /* + * Hardware acknowledges the directed interrupt setup in 10ms or less. + * Wait 15ms to be safe. + */ + do { + rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); + udelay(1); + } while (!(msr_val & PACKAGE_THERM_STATUS_DPTI_ACK) && --count); + + if (!count) + return -ETIMEDOUT; + + thermal_clear_package_intr_status(PACKAGE_LEVEL, + PACKAGE_THERM_STATUS_DPTI_ACK); + + return 0; +} + +static void config_directed_thermal_pkg_intr(void *info) +{ + bool enable =3D *((bool *)info); + u64 msr_val; + + rdmsrl(MSR_IA32_THERM_INTERRUPT, msr_val); + + if (enable) + msr_val |=3D THERM_INT_DPTI_ENABLE; + else + msr_val &=3D ~THERM_INT_DPTI_ENABLE; + + wrmsrl(MSR_IA32_THERM_INTERRUPT, msr_val); +} + +/* Only accessed from CPU hotplug callbacks. No extra locking needed. */ +static unsigned int *directed_intr_handler_cpus; + +static bool directed_thermal_pkg_intr_supported(void) +{ + if (!boot_cpu_has(X86_FEATURE_DPTI)) + return false; + + if (!directed_intr_handler_cpus) + return false; + + return true; +} + +/* + * Must be called with cpu_hotplug_lock held to prevent CPUs from going of= fline + * while iterating through packages. Also, interrupts must be enabled to a= void + * deadlocks in SMP function calls. + */ +static void disable_all_directed_thermal_pkg_intr(void) +{ + bool enable =3D false; + int i; + + if (!directed_thermal_pkg_intr_supported()) + return; + + for (i =3D 0; i < topology_max_packages(); i++) { + if (directed_intr_handler_cpus[i] =3D=3D nr_cpu_ids) + continue; + + smp_call_function_single(directed_intr_handler_cpus[i], + config_directed_thermal_pkg_intr, + &enable, true); + } + + kfree(directed_intr_handler_cpus); + directed_intr_handler_cpus =3D NULL; +} + +static void enable_directed_thermal_pkg_intr(unsigned int cpu) +{ + bool enable =3D true; + u16 pkg_id; + + if (!directed_thermal_pkg_intr_supported()) + return; + + pkg_id =3D topology_logical_package_id(cpu); + if (pkg_id >=3D topology_max_packages()) + return; + + /* Another CPU in this package already handles the directed interrupt. */ + if (directed_intr_handler_cpus[pkg_id] !=3D nr_cpu_ids) + return; + + thermal_clear_package_intr_status(PACKAGE_LEVEL, + PACKAGE_THERM_STATUS_DPTI_ACK); + + config_directed_thermal_pkg_intr(&enable); + if (!check_directed_thermal_pkg_intr_ack()) { + directed_intr_handler_cpus[pkg_id] =3D cpu; + return; + } + + /* + * A failure indicates faulty hardware. Roll back completely so that + * no other CPU tries. This is especially important during boot as all + * CPUs may come online and would otherwise keep trying. + */ + enable =3D false; + config_directed_thermal_pkg_intr(&enable); + + disable_all_directed_thermal_pkg_intr(); + + pr_info_once("Failed to direct package thermal interrupts. All CPUs will = receive it.\n"); +} + +static void disable_directed_thermal_pkg_intr(unsigned int cpu) +{ + unsigned int new_cpu; + bool enable; + u16 pkg_id; + + if (!directed_thermal_pkg_intr_supported()) + return; + + pkg_id =3D topology_logical_package_id(cpu); + if (pkg_id >=3D topology_max_packages()) + return; + + /* Not the CPU handling the directed interrupt. */ + if (directed_intr_handler_cpus[pkg_id] !=3D cpu) + return; + + /* + * The package-level interrupt must remain directed after this CPU goes + * offline. + */ + new_cpu =3D cpumask_any_but(topology_core_cpumask(cpu), cpu); + if (new_cpu < nr_cpu_ids) { + enable =3D true; + thermal_clear_package_intr_status(PACKAGE_LEVEL, + PACKAGE_THERM_STATUS_DPTI_ACK); + + /* + * We are here via CPU hotplug. Since we are holding the + * cpu_hotplug_lock, @new_cpu cannot go offline and interrupts + * are enabled, so the SMP function call is safe. + */ + smp_call_function_single(new_cpu, config_directed_thermal_pkg_intr, + &enable, true); + } + + /* + * If hardware does not acknowledge the directed interrupt setup on + * @new_cpu, disable the redirection. Since no other CPU is configured + * to receive the package-level interrupt, all CPUs in the package will + * receive it. + */ + enable =3D false; + if (new_cpu < nr_cpu_ids && check_directed_thermal_pkg_intr_ack()) { + smp_call_function_single(new_cpu, config_directed_thermal_pkg_intr, + &enable, true); + + pr_warn_once("Failed to redirect package thermal interrupt from CPU%u to= CPU%u; reverting to broadcast.\n", + cpu, new_cpu); + + new_cpu =3D nr_cpu_ids; + } + + /* + * Clear the directed interrupt on @cpu. Hardware acknowledgment can be + * ignored since @cpu is going offline. + */ + config_directed_thermal_pkg_intr(&enable); + + directed_intr_handler_cpus[pkg_id] =3D (new_cpu < nr_cpu_ids) ? new_cpu := nr_cpu_ids; +} + /* Get notified when a cpu comes on/off. Be hotplug friendly. */ static int thermal_throttle_online(unsigned int cpu) { @@ -549,6 +735,8 @@ static int thermal_throttle_online(unsigned int cpu) */ intel_hfi_online(cpu); =20 + enable_directed_thermal_pkg_intr(cpu); + /* Unmask the thermal vector after the above workqueues are initialized. = */ l =3D apic_read(APIC_LVTTHMR); apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); @@ -566,6 +754,8 @@ static int thermal_throttle_offline(unsigned int cpu) l =3D apic_read(APIC_LVTTHMR); apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED); =20 + disable_directed_thermal_pkg_intr(cpu); + intel_hfi_offline(cpu); =20 cancel_delayed_work_sync(&state->package_throttle.therm_work); @@ -578,6 +768,23 @@ static int thermal_throttle_offline(unsigned int cpu) return 0; } =20 +static __init void init_directed_pkg_intr(void) +{ + int i; + + if (!boot_cpu_has(X86_FEATURE_DPTI)) + return; + + directed_intr_handler_cpus =3D kmalloc_array(topology_max_packages(), + sizeof(*directed_intr_handler_cpus), + GFP_KERNEL); + if (!directed_intr_handler_cpus) + return; + + for (i =3D 0; i < topology_max_packages(); i++) + directed_intr_handler_cpus[i] =3D nr_cpu_ids; +} + static __init int thermal_throttle_init_device(void) { int ret; @@ -585,12 +792,19 @@ static __init int thermal_throttle_init_device(void) if (!atomic_read(&therm_throt_en)) return 0; =20 + init_directed_pkg_intr(); + intel_hfi_init(); =20 ret =3D cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/therm:online", thermal_throttle_online, thermal_throttle_offline); - return ret < 0 ? ret : 0; + if (ret >=3D 0) + return 0; + + disable_all_directed_thermal_pkg_intr(); + + return ret; } device_initcall(thermal_throttle_init_device); =20 --=20 2.43.0 From nobody Mon Jun 8 14:37:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D39644D00A; Thu, 28 May 2026 15:15:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981311; cv=none; b=UWNrN9ZUC/MNKe3shNZZpGUrIwKBTFKWeI1b1fFPIx1KFfJ/SHZVn3/gIphGYqMCbM7XiF9mBuSK4OHqAUiLupY0aD07yAjXMPwJI3uAX+kqS4k1hb0OXvMPOOyE4r/4TDpMgEUpHDfHdankbMHTsiYnOegaWOht6mKnDiMCIzs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981311; c=relaxed/simple; bh=USf6uG0GV/cK6H/yT32++OcuH1Ae5cD2yFuzoC+dViw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PlB4vnQVloQW6fT0/7pHzp/vYCus1TNcY7yvv8GsN9U+zDHclLP2nvSuMH2rpUcP9YSkrPtjh0FV5S7j77JUBInjlOk04g1ScGUzdbujn4ajW5NNd50/SOEWyKWXcF9tnCQ5abLdm/0XVUFwM/q+tvZJuc8Y+wtVOSDWh2zEjDE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=l7b5Em1y; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="l7b5Em1y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779981311; x=1811517311; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=USf6uG0GV/cK6H/yT32++OcuH1Ae5cD2yFuzoC+dViw=; b=l7b5Em1ynj5aMJs4X5HRZJWMloJ9XUit9QQb/ATXR9Uaasu7QWI90EO8 DWM4vFXK/OHGfPZNfOoqzz5Cx+jfNUxDiWkmpeYnmZREqYTdZXzvjs3kX DhARWucuaByX6QzD0eePFapnRvNS+1fk1WOJpXtToRnw5pkeT0SuFvV3A XDsK9gDhQ1h6XvNWw58QktHfpXuaLFyU3Xe+KdEHZkA10LRp+Nk8wx5mn 9sBVeyfrRz7fz6AZ8UU1xA/m7h5I1tLcWNiHH601hb4DxqhgCK7vSnrey jNHYcc26nC613D7E8TV0zuZTl2SGd159xRQNfs47GKUY8m2AbgFD6HfVk Q==; X-CSE-ConnectionGUID: uR5xgwVaRpWkp7gf6tgmEQ== X-CSE-MsgGUID: OSiIX0N+RSiMfwU6jwreoQ== X-IronPort-AV: E=McAfee;i="6800,10657,11800"; a="80887347" X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="80887347" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:08 -0700 X-CSE-ConnectionGUID: Ncufrco/Rki1bMk+n+9M0g== X-CSE-MsgGUID: xq0N802zQ3aEDZNUGy4oqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,173,1774335600"; d="scan'208";a="241536839" Received: from unknown (HELO [172.25.112.21]) ([172.25.112.21]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:07 -0700 From: Ricardo Neri Date: Thu, 28 May 2026 08:25:45 -0700 Subject: [PATCH v2 4/5] thermal: intel: Add syscore callbacks for suspend and resume Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260528-rneri-directed-therm-intr-v2-4-8e2f9e0c1a36@linux.intel.com> References: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> In-Reply-To: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Lukasz Luba Cc: x86@kernel.org, Srinivas Pandruvada , Zhang Rui , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ricardo Neri , Ricardo Neri X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779981967; l=4845; i=ricardo.neri-calderon@linux.intel.com; s=20250602; h=from:subject:message-id; bh=USf6uG0GV/cK6H/yT32++OcuH1Ae5cD2yFuzoC+dViw=; b=aO27WoAOHgfoYaVJEA4E62mtTTjtgjPeA6+Mmfx0FkfAEox3F0DvgoHFmhIaYzfALOx0NLrkC Cp9O6ybJKPuBLvBguAWGVlA5j6ehSlNXzApIX7m5XxxuRt3Bu1sRS9y X-Developer-Key: i=ricardo.neri-calderon@linux.intel.com; a=ed25519; pk=NfZw5SyQ2lxVfmNMaMR6KUj3+0OhcwDPyRzFDH9gY2w= Directed package-level thermal interrupts are serviced by a single CPU per package. These handler CPUs are selected at boot through the CPU hotplug infrastructure. This mechanism is sufficient to restore the directed interrupt configuration when resuming from suspend for non-boot packages. It also keeps the handler-tracking array updated. For the boot package, CPU0 is chosen during boot because its CPU hotplug online callback runs first. However, this callback is not invoked on resume. The directed package-level interrupt configuration for the boot package is not restored. Add a syscore resume callback to re-enable directed package-level interrupts for this package. Disabling directed interrupts during suspend is required to keep the handler-tracking array in a consistent state for the boot package, allowing the correct configuration to be restored on resume. The resume callback must busy-wait for hardware acknowledgment of the directed interrupt setup. Otherwise, the handler-tracking array could be left in an inconsistent state. This implies running with interrupts disabled for up to 15ms, though in practice it takes less than 1ms. Signed-off-by: Ricardo Neri --- While it may take up to 15ms for hardware to acknowledge the interrupt, latency measurements show that the latency has a median of 0.4ms. Please see the preceding patch for details. --- Changes in v2: * Relocated comment blocks for clarity. * Reworded the changelog for clarity and accuracy. --- drivers/thermal/intel/therm_throt.c | 41 +++++++++++++++++++++++++++++++++= +++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/th= erm_throt.c index dcb5d7051ac6..d4ea795e3c3b 100644 --- a/drivers/thermal/intel/therm_throt.c +++ b/drivers/thermal/intel/therm_throt.c @@ -14,6 +14,7 @@ * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c. * Inspired by Ross Biro's and Al Borchers' counter code. */ +#include #include #include #include @@ -570,7 +571,10 @@ static void config_directed_thermal_pkg_intr(void *inf= o) wrmsrl(MSR_IA32_THERM_INTERRUPT, msr_val); } =20 -/* Only accessed from CPU hotplug callbacks. No extra locking needed. */ +/* + * Only accessed from CPU hotplug and syscore callbacks. No extra locking + * needed. + */ static unsigned int *directed_intr_handler_cpus; =20 static bool directed_thermal_pkg_intr_supported(void) @@ -588,6 +592,10 @@ static bool directed_thermal_pkg_intr_supported(void) * Must be called with cpu_hotplug_lock held to prevent CPUs from going of= fline * while iterating through packages. Also, interrupts must be enabled to a= void * deadlocks in SMP function calls. + * + * The syscore resume callback may call this function but CPU hotplug is d= isabled + * in that context. It also runs with interrupts disabled, but no SMP func= tion + * calls are issued because the directed interrupt was torn down before su= spend. */ static void disable_all_directed_thermal_pkg_intr(void) { @@ -679,6 +687,10 @@ static void disable_directed_thermal_pkg_intr(unsigned= int cpu) * We are here via CPU hotplug. Since we are holding the * cpu_hotplug_lock, @new_cpu cannot go offline and interrupts * are enabled, so the SMP function call is safe. + * + * The syscore suspend callback runs with interrupts disabled, + * but it does not reach this path because all the secondary + * CPUs are offline. */ smp_call_function_single(new_cpu, config_directed_thermal_pkg_intr, &enable, true); @@ -768,6 +780,31 @@ static int thermal_throttle_offline(unsigned int cpu) return 0; } =20 +/* + * CPU0 may be handling the directed interrupt, but the CPU hotplug callba= cks + * are not called for CPU0 during suspend and resume. + */ +static void directed_pkg_intr_syscore_resume(void *data) +{ + enable_directed_thermal_pkg_intr(0); +} + +static int directed_pkg_intr_syscore_suspend(void *data) +{ + disable_directed_thermal_pkg_intr(0); + + return 0; +} + +static const struct syscore_ops directed_pkg_intr_pm_ops =3D { + .resume =3D directed_pkg_intr_syscore_resume, + .suspend =3D directed_pkg_intr_syscore_suspend, +}; + +static struct syscore directed_pkg_intr_pm =3D { + .ops =3D &directed_pkg_intr_pm_ops, +}; + static __init void init_directed_pkg_intr(void) { int i; @@ -783,6 +820,8 @@ static __init void init_directed_pkg_intr(void) =20 for (i =3D 0; i < topology_max_packages(); i++) directed_intr_handler_cpus[i] =3D nr_cpu_ids; + + register_syscore(&directed_pkg_intr_pm); } =20 static __init int thermal_throttle_init_device(void) --=20 2.43.0 From nobody Mon Jun 8 14:37:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F9003F8EAF; Thu, 28 May 2026 15:15:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779981311; cv=none; b=sH8+phFp7cKEN2oLJ0S7TXlJHRP9XffXF+0ITjnAF8Q3/QExw0U3TGlNpGjhlARSR9ERw0LgDqVMFOubX249wX5j9xStu9utn5VRddxxOFORUtV9VhSqREbST1Rip6iTyFm56/0rToKxtF2p+E2xPK7tIjRyPRPEkld840w2mwE= ARC-Message-Signature: i=1; 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d="scan'208";a="241536857" Received: from unknown (HELO [172.25.112.21]) ([172.25.112.21]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 May 2026 08:15:08 -0700 From: Ricardo Neri Date: Thu, 28 May 2026 08:25:46 -0700 Subject: [PATCH v2 5/5] thermal: intel: Add a syscore shutdown callback for kexec reboot Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260528-rneri-directed-therm-intr-v2-5-8e2f9e0c1a36@linux.intel.com> References: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> In-Reply-To: <20260528-rneri-directed-therm-intr-v2-0-8e2f9e0c1a36@linux.intel.com> To: "Rafael J. Wysocki" , Daniel Lezcano , Lukasz Luba Cc: x86@kernel.org, Srinivas Pandruvada , Zhang Rui , linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Ricardo Neri , Ricardo Neri X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779981967; l=1597; i=ricardo.neri-calderon@linux.intel.com; s=20250602; h=from:subject:message-id; bh=sbgbN5et6lPL53iUMBbkOwiCET6rPb90p8S0xtg33Lk=; b=Poy+ZzyVDFUIakpnd06w0jYnauvbHWVV+fJ8sfcJ++fTHs27r1M/kSh3pOp8zLtVEhCJQ3tyb GbUBZ1wovy8BO+CQ46i6WxblMKmp+ofR12Lyopf5749hkcZGsFAXPpR X-Developer-Key: i=ricardo.neri-calderon@linux.intel.com; a=ed25519; pk=NfZw5SyQ2lxVfmNMaMR6KUj3+0OhcwDPyRzFDH9gY2w= A kexec reboot may load a kernel that does not support directed package- level thermal interrupts. Without a shutdown callback, the directed interrupt configuration remains enabled across kexec but will not be handled correctly. In particular, if the CPU designated to receive the directed interrupt goes offline, no other CPU in the package will receive it. Add a syscore shutdown callback to disable directed package-level thermal interrupts on all packages before a kexec reboot. If the post-kexec kernel does not enable directed interrupts, it falls back to broadcasting the interrupt to all CPUs. Signed-off-by: Ricardo Neri --- Changes in v2: * Used the disable_all_directed_thermal_pkg_intr() function introduced in patch 3. --- drivers/thermal/intel/therm_throt.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/thermal/intel/therm_throt.c b/drivers/thermal/intel/th= erm_throt.c index d4ea795e3c3b..14ac3c892f2f 100644 --- a/drivers/thermal/intel/therm_throt.c +++ b/drivers/thermal/intel/therm_throt.c @@ -796,9 +796,15 @@ static int directed_pkg_intr_syscore_suspend(void *dat= a) return 0; } =20 +static void directed_pkg_intr_syscore_shutdown(void *data) +{ + disable_all_directed_thermal_pkg_intr(); +} + static const struct syscore_ops directed_pkg_intr_pm_ops =3D { .resume =3D directed_pkg_intr_syscore_resume, .suspend =3D directed_pkg_intr_syscore_suspend, + .shutdown =3D directed_pkg_intr_syscore_shutdown, }; =20 static struct syscore directed_pkg_intr_pm =3D { --=20 2.43.0