From nobody Mon Jun 8 23:59:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A286733F5B2; Mon, 25 May 2026 10:12:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779703934; cv=none; b=Kmcsdt3GKmYC3nVPmGsUIovtNClwRDN0SVTnnq3EKyXnGNGL1+ZjBJE2ZSvSGJnalxuIdrWrCardF8jeboqd16knMwFynpS233ZFyHxmpH6zUa2RJ0SSDQjTGiyt3JGp4ORomh+Co4ad0yNnqM+Zm6QX+D3GfKKoU76Qgve2Ys8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779703934; c=relaxed/simple; bh=R1GgFe59YMZX6danIrFGUoWQKiOB3++Y2+t6P2g9wRo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=XIe6v7Xc/3/kJ02ekAVSfXhqYthLKToBAvayQ6+YdypZTsaU6okGEsh8mK0BtGgn7XStWtCEHfdEsvqUUJEJOhiSaNlgYpwYCNMkvlmxkcp7geqkNlwqs5KbZGnHKwtgphADIVb3SU6g/m1hWSPN/yrRiCSA/qVK+k+HhHP/dVU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NiJtpp1J; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NiJtpp1J" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2A8E9C2BCB7; Mon, 25 May 2026 10:12:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779703934; bh=R1GgFe59YMZX6danIrFGUoWQKiOB3++Y2+t6P2g9wRo=; h=From:Date:Subject:To:Cc:Reply-To:From; b=NiJtpp1JxeiDN7T4QZ9Qez9xO/ym5qQAquuF6u0Ej/NvKNyG6x5WOTyQHQqcLpUw1 i8a49TlJBrPOOCkJaq7VZ2XN8MEogdoA/4hn2xAiWuq7IHGBfqiwMVmwdweWnL8Y/o 1cHVa1zhKwCAzSDsoykOz8d+U1jvCvH67ilSdCdKF1sRE1eb8NYuWrb3aCgLUrgwJU FDNcVMdA2Lp8Dhi5QSVaI4f9bMhIZ/89ZNtXwwQXHOgo5oVpEQkloVYaQiy4Oi+PLg Hw2w8Hu0HZE+RAM0p03UQ/YBDZLzMKWRdC0Ev2mU/KNf7DJNbcztD4LVX/ZRkU/R5N 7huBJ4tvl9K2Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2278ACD5BD0; Mon, 25 May 2026 10:12:14 +0000 (UTC) From: Ricardo Pardini via B4 Relay Date: Mon, 25 May 2026 12:12:12 +0200 Subject: [PATCH] arm64: dts: rockchip: describe PCIe Ethernet controllers on NanoPC-T6 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260525-rk3588-dts-rtl-eth-describe-dt-alias-v1-1-a6fcda563ac7@pardini.net> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXNSw7CMAxF0a1UHmMpCQ2N2ApikI+hhqogO6BKV fdOgOF5g/tWUBImhWO3gtCblR9zg911kMc4Xwm5NIMz7mC861Huex8ClqoodUKqIxbSLJyojRg njorZUrFhSEP2BlrqKXTh5XdzOv+tr3SjXL9t2LYPxz+gY4gAAAA= X-Change-ID: 20260524-rk3588-dts-rtl-eth-describe-dt-alias-c1ed187b7c50 To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Sebastian Reichel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Ricardo Pardini X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3532; i=ricardo@pardini.net; h=from:subject:message-id; bh=ATDxgV+aVRYA1qwVl5QQNVkoTUqIMI+aNMm96MahMCc=; b=owEBiQF2/pANAwAIATteP+Oex+3pAcsmYgBqFCB9KNIKy16b9ZOZvEfenPlRdjMemK/hkmuEK v7F67/+EWSJAU8EAAEIADkWIQSsGCMM9q/qytxIiJM7Xj/jnsft6QUCahQgfRsUgAAAAAAEAA5t YW51MiwyLjUrMS4xMiwwLDMACgkQO14/457H7ekCeAgAhETNghtgglmhDGNt9QFfL3n73Tw10Gc FzHh8hLZmz5mFgbpWN31ixqkFdOtvj6xz4ba3rSh/T0zezG3EObvlNMtmyPe9YfaDtOtSndYlMZ 4mKo83ioOZWwzJJMxuXdWWxe6siI7IWEQ7Zz0861Tf1qDaGyeDMj45dKMZq5bFhpsg8n619HJNd IVF7Mhc9uWFnTmE3V0xxaVl2sOc60rjztOgkT8EgUH9gEhk9ygegkxGOPs+jDIUDvYo+frdpe5c UVuwbJ6ax1BCseH9JqPOpLh38agQGmxWxXQBXlNAtVA2GEz8yfLj/qLIlfgjz89zkNa9C6f9q+F u96ZM+5/MSg== X-Developer-Key: i=ricardo@pardini.net; a=openpgp; fpr=AC18230CF6AFEACADC4888933B5E3FE39EC7EDE9 X-Endpoint-Received: by B4 Relay for ricardo@pardini.net/default with auth_id=588 X-Original-From: Ricardo Pardini Reply-To: ricardo@pardini.net From: Ricardo Pardini The FriendlyElec NanoPC-T6 carries two on-board Realtek RTL8125BG (r8169 family, PCI 10ec:8125) NICs, each behind its own RK3588 PCIe2x1 controller (pcie2x1l1 and pcie2x1l2). Both host bridges were already enabled by the board DT, but the Ethernet function nodes themselves were not described, leaving the kernel without DT handles on the two NICs. Describe the fixed PCI function nodes and attach ethernet0/ethernet1 aliases to them. Signed-off-by: Ricardo Pardini --- This describes the two on-board Realtek RTL8125BG PCIe Ethernet controllers on the FriendlyElec NanoPC-T6 (RK3588) board and aliases them to ethernet0/ethernet1. Many Rockchip boards have on-board RTL8125 PCIe NICs, wired to pcie2x1l1 and pcie2x1l2. The controllers were already enabled in the board DT, but the Ethernet function nodes themselves are not described, so the kernel (and u-boot) has no DT handle on the NICs. Adding the function nodes lets us: - expose stable ethernet0/ethernet1 aliases for the two NICs, the same way other rk3588 boards alias their GMAC interfaces; and - let U-Boot's fdt_fixup_ethernet() patch mac-address properties in at boot time from its ethaddr/eth1addr environment - useful on boards (like this one) whose on-NIC EEPROM is not pre-programmed with a unique MAC. The kernel and U-Boot then agree on the MAC, which matters for network-boot setups. Checkpatch warnings: - WARNING: DT compatible string "pci10ec,8125" appears un-documented - WARNING: DT compatible string vendor "pci10ec" appears un-documented Both are expected. "pciVVVV,DDDD" is the Open Firmware PCI Bus Binding spelling, where VVVV/DDDD are the PCI vendor and device IDs allocated by the PCI-SIG (10ec =3D Realtek, 8125 =3D RTL8125). It is not a DT vendor prefix. If this is seen as a good thing, it would apply very similarly to the Radxa Rock 5 series and others. --- arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 30 ++++++++++++++++++= ++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm6= 4/boot/dts/rockchip/rk3588-nanopc-t6.dtsi index 84b6b53f016ab..5d28c74847c58 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi @@ -20,6 +20,8 @@ / { compatible =3D "friendlyarm,nanopc-t6", "rockchip,rk3588"; =20 aliases { + ethernet0 =3D &rtl_eth0; + ethernet1 =3D &rtl_eth1; mmc0 =3D &sdhci; mmc1 =3D &sdmmc; }; @@ -643,6 +645,20 @@ &pcie2x1l1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie2_1_rst>; status =3D "okay"; + + pcie@0,0 { + reg =3D <0x200000 0 0 0 0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + device_type =3D "pci"; + bus-range =3D <0x20 0x2f>; + + rtl_eth0: ethernet@0,0 { + compatible =3D "pci10ec,8125"; + reg =3D <0x210000 0 0 0 0>; + }; + }; }; =20 &pcie2x1l2 { @@ -651,6 +667,20 @@ &pcie2x1l2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie2_2_rst>; status =3D "okay"; + + pcie@0,0 { + reg =3D <0x400000 0 0 0 0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + device_type =3D "pci"; + bus-range =3D <0x40 0x4f>; + + rtl_eth1: ethernet@0,0 { + compatible =3D "pci10ec,8125"; + reg =3D <0x410000 0 0 0 0>; + }; + }; }; =20 &pcie30phy { --- base-commit: e7ae89a0c97ce2b68b0983cd01eda67cf373517d change-id: 20260524-rk3588-dts-rtl-eth-describe-dt-alias-c1ed187b7c50 Best regards, -- =20 Ricardo Pardini