.../boot/dts/renesas/rzg3e-smarc-som.dtsi | 49 +++++++++---------- 1 file changed, 24 insertions(+), 25 deletions(-)
From: Biju Das <biju.das.jz@bp.renesas.com>
Sort the pinmux entries for both GMAC ctrl nodes in port order (A/B/C and
D/E/F respectively) and remove the extra blank line before the second
pinmux assignment.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../boot/dts/renesas/rzg3e-smarc-som.dtsi | 49 +++++++++----------
1 file changed, 24 insertions(+), 25 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index d978619155d2..2e1d9686df88 100644
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -193,20 +193,20 @@ clk {
};
ctrl {
- pinmux = <RZG3E_PORT_PINMUX(A, 1, 1)>, /* MDC */
- <RZG3E_PORT_PINMUX(A, 0, 1)>, /* MDIO */
- <RZG3E_PORT_PINMUX(C, 2, 15)>, /* PHY_INTR (IRQ2) */
- <RZG3E_PORT_PINMUX(C, 1, 1)>, /* RXD3 */
- <RZG3E_PORT_PINMUX(C, 0, 1)>, /* RXD2 */
- <RZG3E_PORT_PINMUX(B, 7, 1)>, /* RXD1 */
- <RZG3E_PORT_PINMUX(B, 6, 1)>, /* RXD0 */
- <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */
+ pinmux = <RZG3E_PORT_PINMUX(A, 0, 1)>, /* MDIO */
+ <RZG3E_PORT_PINMUX(A, 1, 1)>, /* MDC */
<RZG3E_PORT_PINMUX(A, 2, 1)>, /* RX_CTL */
- <RZG3E_PORT_PINMUX(B, 5, 1)>, /* TXD3 */
- <RZG3E_PORT_PINMUX(B, 4, 1)>, /* TXD2 */
- <RZG3E_PORT_PINMUX(B, 3, 1)>, /* TXD1 */
+ <RZG3E_PORT_PINMUX(A, 3, 1)>, /* TX_CTL */
+ <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */
<RZG3E_PORT_PINMUX(B, 2, 1)>, /* TXD0 */
- <RZG3E_PORT_PINMUX(A, 3, 1)>; /* TX_CTL */
+ <RZG3E_PORT_PINMUX(B, 3, 1)>, /* TXD1 */
+ <RZG3E_PORT_PINMUX(B, 4, 1)>, /* TXD2 */
+ <RZG3E_PORT_PINMUX(B, 5, 1)>, /* TXD3 */
+ <RZG3E_PORT_PINMUX(B, 6, 1)>, /* RXD0 */
+ <RZG3E_PORT_PINMUX(B, 7, 1)>, /* RXD1 */
+ <RZG3E_PORT_PINMUX(C, 0, 1)>, /* RXD2 */
+ <RZG3E_PORT_PINMUX(C, 1, 1)>, /* RXD3 */
+ <RZG3E_PORT_PINMUX(C, 2, 15)>; /* PHY_INTR (IRQ2) */
};
};
@@ -217,21 +217,20 @@ clk {
};
ctrl {
-
- pinmux = <RZG3E_PORT_PINMUX(D, 1, 1)>, /* MDC */
- <RZG3E_PORT_PINMUX(D, 0, 1)>, /* MDIO */
- <RZG3E_PORT_PINMUX(F, 2, 15)>, /* PHY_INTR (IRQ15) */
- <RZG3E_PORT_PINMUX(F, 1, 1)>, /* RXD3 */
- <RZG3E_PORT_PINMUX(F, 0, 1)>, /* RXD2 */
- <RZG3E_PORT_PINMUX(E, 7, 1)>, /* RXD1 */
- <RZG3E_PORT_PINMUX(E, 6, 1)>, /* RXD0 */
- <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */
+ pinmux = <RZG3E_PORT_PINMUX(D, 0, 1)>, /* MDIO */
+ <RZG3E_PORT_PINMUX(D, 1, 1)>, /* MDC */
<RZG3E_PORT_PINMUX(D, 2, 1)>, /* RX_CTL */
- <RZG3E_PORT_PINMUX(E, 5, 1)>, /* TXD3 */
- <RZG3E_PORT_PINMUX(E, 4, 1)>, /* TXD2 */
- <RZG3E_PORT_PINMUX(E, 3, 1)>, /* TXD1 */
+ <RZG3E_PORT_PINMUX(D, 3, 1)>, /* TX_CTL */
+ <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */
<RZG3E_PORT_PINMUX(E, 2, 1)>, /* TXD0 */
- <RZG3E_PORT_PINMUX(D, 3, 1)>; /* TX_CTL */
+ <RZG3E_PORT_PINMUX(E, 3, 1)>, /* TXD1 */
+ <RZG3E_PORT_PINMUX(E, 4, 1)>, /* TXD2 */
+ <RZG3E_PORT_PINMUX(E, 5, 1)>, /* TXD3 */
+ <RZG3E_PORT_PINMUX(E, 6, 1)>, /* RXD0 */
+ <RZG3E_PORT_PINMUX(E, 7, 1)>, /* RXD1 */
+ <RZG3E_PORT_PINMUX(F, 0, 1)>, /* RXD2 */
+ <RZG3E_PORT_PINMUX(F, 1, 1)>, /* RXD3 */
+ <RZG3E_PORT_PINMUX(F, 2, 15)>; /* PHY_INTR (IRQ15) */
};
};
--
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