[PATCH v6 RESEND 0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework

Ajay Kumar Nandam posted 2 patches 1 day, 22 hours ago
drivers/pinctrl/qcom/Kconfig                  |   1 +
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c      | 144 ++++++++++++------
.../pinctrl/qcom/pinctrl-milos-lpass-lpi.c    |   7 +
.../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c   |  19 ++-
.../pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c |  15 +-
.../pinctrl/qcom/pinctrl-sdm660-lpass-lpi.c   |   7 +
.../pinctrl/qcom/pinctrl-sdm670-lpass-lpi.c   |   7 +
.../pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c   |   7 +
.../pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c   |   7 +
.../pinctrl/qcom/pinctrl-sm6350-lpass-lpi.c   |   7 +
.../pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c   |  15 +-
.../pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c   |  15 +-
.../pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c   |  15 +-
.../pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c   |  15 +-
14 files changed, 209 insertions(+), 72 deletions(-)
[PATCH v6 RESEND 0/2] pinctrl: qcom: lpass-lpi: Switch to PM clock framework
Posted by Ajay Kumar Nandam 1 day, 22 hours ago
This series converts LPASS LPI pinctrl runtime clock handling to the PM
clock framework and ensures GPIO register accesses runtime-resume the
block before MMIO.

The series is intentionally ordered for bisect safety:
- patch 1 wires runtime PM ops in LPASS LPI variant drivers
- patch 2 updates the shared core to use pm_clk + runtime PM guarded
  register access paths and adds the PM_CLK Kconfig dependency

After this conversion, LPASS LPI variants sharing the common core use a
consistent DT clock flow via of_pm_clk_add_clks() together with
pm_clk_suspend()/pm_clk_resume() and autosuspend.

Testing:
- Runtime behavior validated on Kodiak (sc7280).
- Wider runtime testing on other LPASS LPI variants is welcome.

Link: https://lore.kernel.org/r/20260513140009.3841770-1-ajay.nandam@oss.qualcomm.com

Resend only: previous post was mistakenly sent as an inline reply; no
code changes.

Changes since v5:
- Rebased to current linux-next and refreshed the shared-core conversion
  patch to apply cleanly on top of latest LPASS LPI mux-path updates
- Include SM6350 in the preparatory LPASS LPI per-SoC runtime PM hook
  wiring set so all in-tree LPASS LPI variants are covered
- Keep PM_CLK dependency under PINCTRL_LPASS_LPI where shared core PM
  clock APIs are introduced

Ajay Kumar Nandam (2):
  pinctrl: qcom: lpass-lpi: Enable runtime PM hooks on LPASS LPI SoCs
  pinctrl: qcom: lpass-lpi: Switch to PM clock framework for runtime PM

 drivers/pinctrl/qcom/Kconfig                  |   1 +
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c      | 144 ++++++++++++------
 .../pinctrl/qcom/pinctrl-milos-lpass-lpi.c    |   7 +
 .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c   |  19 ++-
 .../pinctrl/qcom/pinctrl-sc8280xp-lpass-lpi.c |  15 +-
 .../pinctrl/qcom/pinctrl-sdm660-lpass-lpi.c   |   7 +
 .../pinctrl/qcom/pinctrl-sdm670-lpass-lpi.c   |   7 +
 .../pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c   |   7 +
 .../pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c   |   7 +
 .../pinctrl/qcom/pinctrl-sm6350-lpass-lpi.c   |   7 +
 .../pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c   |  15 +-
 .../pinctrl/qcom/pinctrl-sm8450-lpass-lpi.c   |  15 +-
 .../pinctrl/qcom/pinctrl-sm8550-lpass-lpi.c   |  15 +-
 .../pinctrl/qcom/pinctrl-sm8650-lpass-lpi.c   |  15 +-
 14 files changed, 209 insertions(+), 72 deletions(-)

-- 
2.34.1