From nobody Sun May 24 19:34:22 2026 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22FEE2D94B5; Fri, 22 May 2026 17:20:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779470429; cv=none; b=chwgPoTVx3CBjg5WtkXav1r12Wfwa2AoaDpd/Zw4HCu57HqCw5E7AtfEo5NvxirS9s9sYbwMUohJ0BB2LrJfRKqvEFuOp7eDtsDcGPQsTkpG1gi3YLouABh69XKOk9j+MptRuyEWPqVQG5y5TEd7shK4yl7Oit9dvuBTl0fdAJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779470429; c=relaxed/simple; bh=DANtceujiGoj2POLX5MbBNJT+cQy8ghBhZ0mDPBWyYY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kg/k6vwlaw3MG3ZU4iVV0OJEzJpWZmglLWVQazMevpClFZfBxmljdC3YUf4k423/bFvzGgDeDhLCBGuBlXOSJv2qXKLnXQKcOR90WyL9nRnbttSy+3suHvsI80JS4ZFJu/mEk91H51GeykUzkkemB1X0dTLyLMrt/G9c4DK/wtY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=hbnJAJwA; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=aD6Ea5pZ; arc=none smtp.client-ip=80.241.56.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="hbnJAJwA"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="aD6Ea5pZ" Received: from smtp102.mailbox.org (smtp102.mailbox.org [10.196.197.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4gMX8x19rjz9spn; Fri, 22 May 2026 19:20:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1779470417; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RRUXz6EPHvSlNCo/xjx+JIckd1Ua8opeBCSfiKKE/Sc=; b=hbnJAJwAPOFVD0LU9gvdBbFlnyzbRsOuPPCj6Nxu+J37bp+TSn17d9TZRtZ1hATqXuR0Rh xavl+XL8gbCIgd+M+GA19gD+sT65SzL+Ee0sVdvu8Q1/n2NcRVcHIyX25VX4YX0wq40Vns /f6/ktKif9fXf6MFriPG0swrvcsD247SN1pEjv/eSXuGqAjkhXXuErPRabksqW5I1w8DP4 myqpK4I3p61bxbbyterd7lqE/Si4tgS9LtiDhjeDpEgbaS6gv7FISK6QCi0RX6+0aMwI1S h8NBJdYMM2gozjpIyspepDYelMmkUmbD9i9nRSwyvxLrXWVvD9jpThvXidQ40Q== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1779470415; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RRUXz6EPHvSlNCo/xjx+JIckd1Ua8opeBCSfiKKE/Sc=; b=aD6Ea5pZ7qX7Y9McsOXIi++i8FDkp3/oj1avawMgKSMNoQqW2pReit4rfgaN6jLW8x50Ys 9NPaDs7Vws3EqrpsJ48mYIiUfYzsBpkkIEQgg/QAspQdKOTWw1h2whVBDxPJz8v5lXCl+D 1Y25ogKSzUs2URne9RD2fsWwADaSxbFD5dxM7/NQUEQkcAeaWE6KzbcrvTbjjfur3IRljp i7UJFHBnENC/RxLqchT9pGn4OClYnvYFFMIkNSqutdWVV194qwJucfP+UFjj3MvWrZpunw H4aTB3tiJYsDWDa9WpDW4H0SsoAiKMRflo/f8eunn24buUt/+5C1IJFwuc2HSg== To: linux-arm-kernel@lists.infradead.org Cc: Nguyen Tran , Geert Uytterhoeven , Marek Vasut , Brian Masney , Conor Dooley , Krzysztof Kozlowski , Kuninori Morimoto , Magnus Damm , Michael Turquette , Rob Herring , Stephen Boyd , Ulf Hansson , Wolfram Sang , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v3] arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist Date: Fri, 22 May 2026 19:19:57 +0200 Message-ID: <20260522172000.15096-1-marek.vasut+renesas@mailbox.org> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MBO-RS-ID: 2561115298b3447d8b3 X-MBO-RS-META: a31ckyqay9xo7ja8x8sgf5i7apn5kwsp Content-Type: text/plain; charset="utf-8" From: Nguyen Tran Add support for the Geist board based on the Renesas R-Car R8A779MD (M3Le) SoC, a register-compatible variant of the R8A77965 (M3-N) with reduced set of peripherals. Reviewed-by: Geert Uytterhoeven Signed-off-by: Nguyen Tran Signed-off-by: Marek Vasut --- Cc: Brian Masney Cc: Conor Dooley Cc: Geert Uytterhoeven Cc: Krzysztof Kozlowski Cc: Kuninori Morimoto Cc: Magnus Damm Cc: Michael Turquette Cc: Rob Herring Cc: Stephen Boyd Cc: Ulf Hansson Cc: Wolfram Sang Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mmc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- V2: - Drop CS2500 variant suffix - Drop cells from rcar_sound ports {} - Drop ehci1, ohci1, usb2_phy1 - Drop Salvator-X reference from commit message - Split panel DTO into separate patch - Drop FCNL node - Add another memory node for the second 2 GiB of DRAM, although the DRAM layout is patched in by U-Boot - Drop FIXME from audio-clkout {} - Sort nodes without unit address - Rename regulators, use npmv suffix for n.m V regulators - Rename x12 node to x12-clock node - Add PHY compatible string - Use interrupts-extended in PHY node - Rename clk_multiplier/clock-generator to clock-controller - Use interrupts-extended - Reinstate port@0 to rsound - Drop iommus from SDHI2 - Drop DU until it can be tested V3: - Drop pwm2 and pwm2_pins - Follow KSZ9031RNX tSR for reset assert time, FIGURE 7-5 Note 2 for reset post-deassert time - Add RB from Geert --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../arm64/boot/dts/renesas/r8a779md-geist.dts | 720 ++++++++++++++++++ 2 files changed, 721 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a779md-geist.dts diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/ren= esas/Makefile index ca45d2857ea7f..8bf155badd111 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -60,6 +60,7 @@ r8a77965-salvator-xs-panel-aa104xd12-dtbs :=3D r8a77965-s= alvator-xs.dtb salvator-p dtb-$(CONFIG_ARCH_R8A77965) +=3D r8a77965-salvator-xs-panel-aa104xd12.dtb dtb-$(CONFIG_ARCH_R8A77965) +=3D r8a77965-ulcb.dtb dtb-$(CONFIG_ARCH_R8A77965) +=3D r8a77965-ulcb-kf.dtb +dtb-$(CONFIG_ARCH_R8A77965) +=3D r8a779md-geist.dtb =20 dtb-$(CONFIG_ARCH_R8A77970) +=3D r8a77970-eagle.dtb dtb-$(CONFIG_ARCH_R8A77970) +=3D r8a77970-eagle-function-expansion.dtbo diff --git a/arch/arm64/boot/dts/renesas/r8a779md-geist.dts b/arch/arm64/bo= ot/dts/renesas/r8a779md-geist.dts new file mode 100644 index 0000000000000..11024bd12eb63 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a779md-geist.dts @@ -0,0 +1,720 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the Geist board with R-Car M3Le + * + * Copyright (C) 2025-2026 Renesas Electronics Corp. + */ + +/dts-v1/; +#include +#include +#include "r8a779md.dtsi" + +/ { + model =3D "Renesas Geist board based on r8a779md"; + compatible =3D "renesas,geist", "renesas,r8a779md", "renesas,r8a77965"; + + aliases { + serial0 =3D &scif2; + serial1 =3D &hscif1; + ethernet0 =3D &avb; + mmc0 =3D &sdhi2; + mmc1 =3D &sdhi0; + }; + + chosen { + bootargs =3D "ignore_loglevel rw root=3D/dev/nfs ip=3Don"; + stdout-path =3D "serial0:115200n8"; + }; + + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2500/rcar_sound probe dead-lock + */ + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <12288000>; + }; + + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm1 0 50000>; + + brightness-levels =3D <256 128 64 16 8 4 0>; + default-brightness-level =3D <6>; + + power-supply =3D <®_12v>; + enable-gpios =3D <&gpio6 7 GPIO_ACTIVE_HIGH>; + }; + + cvbs-in { + compatible =3D "composite-video-connector"; + label =3D "CVBS IN"; + + port { + cvbs_con: endpoint { + remote-endpoint =3D <&adv7482_ain7>; + }; + }; + }; + + hdmi-in { + compatible =3D "hdmi-connector"; + label =3D "HDMI IN"; + type =3D "a"; + + port { + hdmi_in_con: endpoint { + remote-endpoint =3D <&adv7482_hdmi>; + }; + }; + }; + + keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&keys_pins>; + pinctrl-names =3D "default"; + + key-1 { + gpios =3D <&gpio5 17 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "SW4-1"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-2 { + gpios =3D <&gpio5 20 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "SW4-2"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-3 { + gpios =3D <&gpio5 22 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "SW4-3"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-4 { + gpios =3D <&gpio5 23 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "SW4-4"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-a { + gpios =3D <&gpio6 11 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "TSW0"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-b { + gpios =3D <&gpio6 12 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "TSW1"; + wakeup-source; + debounce-interval =3D <20>; + }; + + key-c { + gpios =3D <&gpio6 13 GPIO_ACTIVE_LOW>; + linux,code =3D ; + label =3D "TSW2"; + wakeup-source; + debounce-interval =3D <20>; + }; + }; + + memory@48000000 { + device_type =3D "memory"; + /* first 128MB is reserved for secure area. */ + reg =3D <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@480000000 { + device_type =3D "memory"; + reg =3D <0x4 0x80000000 0x0 0x80000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_12v: regulator-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-12V"; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + vbus0_usb2: regulator-vbus0-usb2 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "USB20_VBUS0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + + gpio =3D <&gpio6 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "SDHI0 Vcc"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible =3D "regulator-gpio"; + + regulator-name =3D "SDHI0 VccQ"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + gpios =3D <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states =3D <1>; + states =3D <3300000 1>, <1800000 0>; + }; + + sound_card: sound { + compatible =3D "audio-graph-card"; + + label =3D "rcar-sound"; + dais =3D <&rsnd_port0>; /* AK4619 Audio Codec */ + }; + + x12_clk: x12-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24576000>; + }; + + /* External DU dot clocks */ + x21_clk: x21-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <33000000>; + }; + + x22_clk: x22-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <33000000>; + }; + + x23_clk: x23-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <25000000>; + }; + + x3013_clk: x3013-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <25000000>; + }; +}; + +&audio_clk_a { + clock-frequency =3D <22579200>; +}; + +&avb { + pinctrl-0 =3D <&avb_pins>; + pinctrl-names =3D "default"; + phy-handle =3D <&phy0>; + tx-internal-delay-ps =3D <2000>; + status =3D "okay"; + + phy0: ethernet-phy@0 { + compatible =3D "ethernet-phy-id0022.1622"; + rxc-skew-ps =3D <1500>; + reg =3D <0>; + interrupts-extended =3D <&gpio2 11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <10000>; + reset-deassert-us =3D <300>; + }; +}; + +&csi40 { + status =3D "okay"; + + ports { + port@0 { + csi40_in: endpoint { + clock-lanes =3D <0>; + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&adv7482_txa>; + }; + }; + }; +}; + +&ehci0 { + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&extalr_clk { + clock-frequency =3D <32768>; +}; + +&extal_clk { + clock-frequency =3D <16666666>; +}; + +&hscif1 { + pinctrl-0 =3D <&hscif1_pins>; + pinctrl-names =3D "default"; + + uart-has-rtscts; + /* Please only enable hscif1 or scif1 */ + status =3D "okay"; +}; + +&hsusb { + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&i2c2 { + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + clock-frequency =3D <100000>; + status =3D "okay"; + + ak4619: codec@10 { + compatible =3D "asahi-kasei,ak4619"; + reg =3D <0x10>; + clocks =3D <&rcar_sound 3>; + clock-names =3D "mclk"; + #sound-dai-cells =3D <0>; + + port { + ak4619_endpoint: endpoint { + remote-endpoint =3D <&rsnd_endpoint0>; + }; + }; + }; + + /* Pin-to-pin, register map, and control compatible with CS2000 and CS220= 0 */ + cs2500: clock-controller@4f { + #clock-cells =3D <0>; + compatible =3D "cirrus,cs2500", "cirrus,cs2000-cp"; + reg =3D <0x4f>; + clocks =3D <&audio_clkout>, <&x12_clk>; + clock-names =3D "clk_in", "ref_clk"; + + assigned-clocks =3D <&cs2500>; + assigned-clock-rates =3D <24576000>; /* 1/1 divide */ + }; +}; + +&i2c4 { + clock-frequency =3D <400000>; + status =3D "okay"; + + versaclock3: clock-controller@68 { + compatible =3D "renesas,5p35023"; + reg =3D <0x68>; + #clock-cells =3D <1>; + clocks =3D <&x3013_clk>; + assigned-clocks =3D <&versaclock3 4>, <&versaclock3 5>; + assigned-clock-rates =3D <100000000>, <100000000>; + }; + + versaclock5: clock-controller@6a { + compatible =3D "idt,5p49v5923"; + reg =3D <0x6a>; + #clock-cells =3D <1>; + clocks =3D <&x23_clk>; + clock-names =3D "xin"; + }; + + video-receiver@70 { + compatible =3D "adi,adv7482"; + reg =3D <0x70 0x71 0x72 0x73 0x74 0x75 + 0x60 0x61 0x62 0x63 0x64 0x65>; + reg-names =3D "main", "dpll", "cp", "hdmi", "edid", "repeater", + "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; + + interrupts-extended =3D <&gpio6 30 IRQ_TYPE_LEVEL_LOW>, + <&gpio6 31 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "intrq1", "intrq2"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@7 { + reg =3D <7>; + + adv7482_ain7: endpoint { + remote-endpoint =3D <&cvbs_con>; + }; + }; + + port@8 { + reg =3D <8>; + + adv7482_hdmi: endpoint { + remote-endpoint =3D <&hdmi_in_con>; + }; + }; + + port@a { + reg =3D <10>; + + adv7482_txa: endpoint { + clock-lanes =3D <0>; + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&csi40_in>; + }; + }; + }; + }; + + csa_vdd: adc@7c { + compatible =3D "maxim,max9611"; + reg =3D <0x7c>; + + shunt-resistor-micro-ohms =3D <5000>; + }; + + csa_dvfs: adc@7f { + compatible =3D "maxim,max9611"; + reg =3D <0x7f>; + + shunt-resistor-micro-ohms =3D <5000>; + }; +}; + +&i2c_dvfs { + status =3D "okay"; + + clock-frequency =3D <400000>; + + eeprom@50 { + compatible =3D "rohm,br24t01", "atmel,24c01"; + reg =3D <0x50>; + pagesize =3D <8>; + }; +}; + +&ohci0 { + dr_mode =3D "otg"; + status =3D "okay"; +}; + +&pcie_bus_clk { + status =3D "disabled"; +}; + +&pciec0 { + clocks =3D <&cpg CPG_MOD 319>, <&versaclock3 4>; + status =3D "okay"; +}; + +&pciec0_rp { + clocks =3D <&versaclock3 5>; +}; + +&pfc { + pinctrl-0 =3D <&scif_clk_pins>; + pinctrl-names =3D "default"; + + avb_pins: avb { + mux { + groups =3D "avb_link", "avb_mdio", "avb_mii"; + function =3D "avb"; + }; + + pins_mdio { + groups =3D "avb_mdio"; + drive-strength =3D <24>; + }; + + pins_mii_tx { + pins =3D "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength =3D <12>; + }; + }; + + hscif1_pins: hscif1 { + groups =3D "hscif1_data_a", "hscif1_ctrl_a"; + function =3D "hscif1"; + }; + + i2c2_pins: i2c2 { + groups =3D "i2c2_a"; + function =3D "i2c2"; + }; + + irq0_pins: irq0 { + groups =3D "intc_ex_irq0"; + function =3D "intc_ex"; + }; + + keys_pins: keys { + pins =3D "GP_5_17", "GP_5_20", "GP_5_22"; + bias-pull-up; + }; + + pwm1_pins: pwm1 { + groups =3D "pwm1_a"; + function =3D "pwm1"; + }; + + scif1_pins: scif1 { + groups =3D "scif1_data_a", "scif1_ctrl"; + function =3D "scif1"; + }; + + scif2_pins: scif2 { + groups =3D "scif2_data_a"; + function =3D "scif2"; + }; + + scif_clk_pins: scif_clk { + groups =3D "scif_clk_a"; + function =3D "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups =3D "sdhi0_data4", "sdhi0_ctrl"; + function =3D "sdhi0"; + power-source =3D <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups =3D "sdhi0_data4", "sdhi0_ctrl"; + function =3D "sdhi0"; + power-source =3D <1800>; + }; + + sdhi2_pins: sd2 { + groups =3D "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; + function =3D "sdhi2"; + power-source =3D <1800>; + }; + + sound_pins: sound { + groups =3D "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function =3D "ssi"; + }; + + sound_clk_pins: sound_clk { + groups =3D "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a", "audio_clkout3_a"; + function =3D "audio_clk"; + }; + + usb0_pins: usb0 { + groups =3D "usb0"; + function =3D "usb0"; + }; +}; + +&pwm1 { + pinctrl-0 =3D <&pwm1_pins>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&rcar_sound { + pinctrl-0 =3D <&sound_pins>, <&sound_clk_pins>; + pinctrl-names =3D "default"; + + /* Single DAI */ + #sound-dai-cells =3D <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells =3D <1>; + clock-frequency =3D <12288000 11289600>; + + status =3D "okay"; + + /* update to */ + clocks =3D <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2500>, + <&audio_clk_c>, + <&cpg CPG_MOD 922>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + rsnd_port0: port@0 { + reg =3D <0>; + + rsnd_endpoint0: endpoint { + remote-endpoint =3D <&ak4619_endpoint>; + dai-format =3D "left_j"; + bitclock-master =3D <&rsnd_endpoint0>; + frame-master =3D <&rsnd_endpoint0>; + playback =3D <&ssi0>, <&src0>, <&dvc0>; + capture =3D <&ssi1>, <&src1>, <&dvc1>; + }; + }; + }; +}; + +&rwdt { + timeout-sec =3D <60>; + status =3D "okay"; +}; + +&scif1 { + pinctrl-0 =3D <&scif1_pins>; + pinctrl-names =3D "default"; + + uart-has-rtscts; + /* Please only enable hscif1 or scif1 */ + /* status =3D "okay"; */ +}; + +&scif2 { + pinctrl-0 =3D <&scif2_pins>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&scif_clk { + clock-frequency =3D <14745600>; +}; + +&sdhi0 { + pinctrl-0 =3D <&sdhi0_pins>; + pinctrl-1 =3D <&sdhi0_pins_uhs>; + pinctrl-names =3D "default", "state_uhs"; + + vmmc-supply =3D <&vcc_sdhi0>; + vqmmc-supply =3D <&vccq_sdhi0>; + cd-gpios =3D <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios =3D <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width =3D <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status =3D "okay"; +}; + +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 =3D <&sdhi2_pins>; + pinctrl-1 =3D <&sdhi2_pins>; + pinctrl-names =3D "default", "state_uhs"; + + vmmc-supply =3D <®_3p3v>; + vqmmc-supply =3D <®_1p8v>; + bus-width =3D <8>; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + fixed-emmc-driver-type =3D <1>; + full-pwr-cycle-in-suspend; + status =3D "okay"; +}; + +&ssi1 { + shared-pin; +}; + +&usb_extal_clk { + clock-frequency =3D <50000000>; +}; + +&usb2_phy0 { + pinctrl-0 =3D <&usb0_pins>; + pinctrl-names =3D "default"; + + vbus-supply =3D <&vbus0_usb2>; + status =3D "okay"; +}; + +&vin0 { + status =3D "okay"; +}; + +&vin1 { + status =3D "okay"; +}; + +&vin2 { + status =3D "okay"; +}; + +&vin3 { + status =3D "okay"; +}; + +&vin4 { + status =3D "okay"; +}; + +&vin5 { + status =3D "okay"; +}; + +&vin6 { + status =3D "okay"; +}; + +&vin7 { + status =3D "okay"; +}; + +&vspb { + status =3D "okay"; +}; + +&vspi0 { + status =3D "okay"; +}; --=20 2.53.0