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Fri, 22 May 2026 08:18:19 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84164fe97c0sm2083042b3a.53.2026.05.22.08.18.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 May 2026 08:18:19 -0700 (PDT) From: Imran Shaik Date: Fri, 22 May 2026 20:46:22 +0530 Subject: [PATCH v4 1/2] dt-bindings: cpufreq: Document Qualcomm Shikra SoC EPSS Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-shikra-cpufreq-scaling-v4-1-f042a25896c5@oss.qualcomm.com> References: <20260522-shikra-cpufreq-scaling-v4-0-f042a25896c5@oss.qualcomm.com> In-Reply-To: <20260522-shikra-cpufreq-scaling-v4-0-f042a25896c5@oss.qualcomm.com> To: "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Imran Shaik , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Authority-Analysis: v=2.4 cv=Fus1OWrq c=1 sm=1 tr=0 ts=6a1073bd cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=sA6xLUNpRn-UYiqxgCcA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: 7hOZdPrXU01WhmXuZ7BDrjapRAG4LHAw X-Proofpoint-GUID: 7hOZdPrXU01WhmXuZ7BDrjapRAG4LHAw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIyMDE1MiBTYWx0ZWRfX8yh+X19RNuq7 VbMLckUIZiVzwkgl73wiwCUp27nqs3OqwuO06CinyKxGgLBkyhxt7x3WpRUkAA3xDIr7PoxiKGI Cjf8HwwlQGJ9mUwxWagTtYrBy1AoMg7NeVtX5N/pRdJcHSjhtBVVH2EZRk/p16+y0HxALloXnOi r1oE8LCI18qOTubF5b4eL04Hj0FkcuzZhVqgPRn4wDJFWlXBQ7DYAXJGeuGFU9/JtCa1zBEtk7a mONB/K0ZN20kewA1SDdCvJQKwDKcDBWPKYePAMO1MrMoWqiNTxUz3LBoxxmON+m52m+E7nCoLma wsoKJdyvM+gdGKOKlIQ6To/0hZf8h/9S6YVKfWTAPASXdI5BldodpMVAj/pC72LRttmxk67k32i ApFAIqARTLY2E7rxndLrZAZfhIHQH3t1V6UhG25mOOu5nXVdDUlI0cfeANhoWPp+JYN1MRFsfuX TDz/DBq2nDGHuQ1v7Xw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-22_04,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 suspectscore=0 spamscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605220152 The Qualcomm Shikra cpufreq hardware is functionally identical to EPSS, but supports only up to 12 frequency lookup table (LUT) entries. Introduce Shikra specific bindings to represent this constrained EPSS variant. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Imran Shaik --- .../bindings/cpufreq/qcom,shikra-epss.yaml | 96 ++++++++++++++++++= ++++ 1 file changed, 96 insertions(+) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yam= l b/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..1a3105e86980a14069f8fb40c92= d1f9cc71c6c1c --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cpufreq/qcom,shikra-epss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Shikra SoC EPSS + +maintainers: + - Imran Shaik + - Taniya Das + +description: | + EPSS is a hardware engine used by some Qualcomm SoCs to manage + frequency in hardware. It is capable of controlling frequency for + multiple clusters. + + The Qualcomm Shikra SoC EPSS supports up to 12 frequency lookup table + (LUT) entries. + +properties: + compatible: + enum: + - qcom,shikra-epss + + reg: + items: + - description: Frequency domain 0 register region + - description: Frequency domain 1 register region + + reg-names: + items: + - const: freq-domain0 + - const: freq-domain1 + + clocks: + items: + - description: XO Clock + - description: GPLL0 Clock + + clock-names: + items: + - const: xo + - const: alternate + + interrupts: + items: + - description: IRQ line for DCVSH 0 + - description: IRQ line for DCVSH 1 + + interrupt-names: + items: + - const: dcvsh-irq-0 + - const: dcvsh-irq-1 + + '#freq-domain-cells': + const: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - '#freq-domain-cells' + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells =3D <1>; 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Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Imran Shaik , Konrad Dybcio X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: QgwOH2rnLlK3adp1Nx3ZMRhk4JpASU7t X-Authority-Analysis: v=2.4 cv=Zekt8MVA c=1 sm=1 tr=0 ts=6a1073c2 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=8xPgF8R1Jm-cxLKBqHoA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIyMDE1MiBTYWx0ZWRfX2lCYp+wonXJN vXC3EpTPzQsaASx9LDySQQVKAuNkj60+fCak5CNZ2vRyKWt25WGqjq0xSQOx3SsmgNupmxdcldU tkJ0mUOGKY83EvujQvqk4fBAcmpS0peZ1QJ3VY3kh9TMbK9hgZgKkLDiFF+OYvBVg+mDulB1zWm c2IBVsWjHJB4lFZ4hAc5qwYdTJgI4Sr7P6vFGV+kMtRUYQDKvd/Sz5i0eVZjpD9zvqS/K4F7mT1 1HwCQYRZ4f8RvIxg2UZUtQKsWi5gzYBj58pU0Ng4RCeLxZAJW7hjoyQuzp/GBA6Cql4kyUM/BLs jjwM8ef+MOByPZ5qnFPQD3Ev52rOXFcoZC1P2dBKqBUzi6IBmjEWSKMINCHZcRblaPULvLEBDeA J/YmsxRRpqbBX0yTik7tD1rXwaziJ79W1aJG2wb3xEslqjMdZZsitzqIPbcDHvq7OFZM9s95eWG D/U/T4PTT6JC9oaHD6A== X-Proofpoint-GUID: QgwOH2rnLlK3adp1Nx3ZMRhk4JpASU7t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-22_04,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 spamscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605220152 From: Taniya Das The Qualcomm Shikra cpufreq hardware is functionally identical to EPSS, but supports only up to 12 frequency lookup table (LUT) entries. When all 12 entries are populated, the existing repetitive LUT entry check may read beyond valid entries and expose incorrect frequencies. Hence, introduce shikra_epss_soc_data that reuses EPSS configuration with appropriate LUT entries limit. Signed-off-by: Taniya Das Reviewed-by: Konrad Dybcio Signed-off-by: Imran Shaik --- drivers/cpufreq/qcom-cpufreq-hw.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufr= eq-hw.c index ea9a20d27b8fdceb9341ee53e5fa27b7a6d92483..3d5a865fb8a35e112cb4d040fb5= 19e2c122a91dc 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ =20 #include @@ -40,6 +41,7 @@ struct qcom_cpufreq_soc_data { u32 reg_intr_clr; u32 reg_current_vote; u32 reg_perf_state; + u32 lut_max_entries; u8 lut_row_size; }; =20 @@ -156,7 +158,7 @@ static unsigned int qcom_cpufreq_get_freq(struct cpufre= q_policy *policy) soc_data =3D qcom_cpufreq.soc_data; =20 index =3D readl_relaxed(data->base + soc_data->reg_perf_state); - index =3D min(index, LUT_MAX_ENTRIES - 1); + index =3D min(index, soc_data->lut_max_entries - 1); =20 return policy->freq_table[index].frequency; } @@ -211,7 +213,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_= dev, struct qcom_cpufreq_data *drv_data =3D policy->driver_data; const struct qcom_cpufreq_soc_data *soc_data =3D qcom_cpufreq.soc_data; =20 - table =3D kzalloc_objs(*table, LUT_MAX_ENTRIES + 1); + table =3D kzalloc_objs(*table, soc_data->lut_max_entries + 1); if (!table) return -ENOMEM; =20 @@ -236,7 +238,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_= dev, icc_scaling_enabled =3D false; } =20 - for (i =3D 0; i < LUT_MAX_ENTRIES; i++) { + for (i =3D 0; i < soc_data->lut_max_entries; i++) { data =3D readl_relaxed(drv_data->base + soc_data->reg_freq_lut + i * soc_data->lut_row_size); src =3D FIELD_GET(LUT_SRC, data); @@ -405,6 +407,7 @@ static const struct qcom_cpufreq_soc_data qcom_soc_data= =3D { .reg_current_vote =3D 0x704, .reg_perf_state =3D 0x920, .lut_row_size =3D 32, + .lut_max_entries =3D LUT_MAX_ENTRIES, }; =20 static const struct qcom_cpufreq_soc_data epss_soc_data =3D { @@ -416,11 +419,25 @@ static const struct qcom_cpufreq_soc_data epss_soc_da= ta =3D { .reg_intr_clr =3D 0x308, .reg_perf_state =3D 0x320, .lut_row_size =3D 4, + .lut_max_entries =3D LUT_MAX_ENTRIES, +}; + +static const struct qcom_cpufreq_soc_data shikra_epss_soc_data =3D { + .reg_enable =3D 0x0, + .reg_domain_state =3D 0x20, + .reg_dcvs_ctrl =3D 0xb0, + .reg_freq_lut =3D 0x100, + .reg_volt_lut =3D 0x200, + .reg_intr_clr =3D 0x308, + .reg_perf_state =3D 0x320, + .lut_row_size =3D 4, + .lut_max_entries =3D 12, }; =20 static const struct of_device_id qcom_cpufreq_hw_match[] =3D { { .compatible =3D "qcom,cpufreq-hw", .data =3D &qcom_soc_data }, { .compatible =3D "qcom,cpufreq-epss", .data =3D &epss_soc_data }, + { .compatible =3D "qcom,shikra-epss", .data =3D &shikra_epss_soc_data }, {} }; MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match); --=20 2.34.1