From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36342388E43; Fri, 22 May 2026 21:23:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779484997; cv=none; b=tzOrreaTs7awwLQgHZ94bvIJLHSEu73W/Hpw/8woT2WyqRap2UM4WNPtJ3zqEHDJ+Lx/Eet8uN3yYWez99+bW/v9EY/dOnFNVcYp79FZ2apiFfpjmOmRl3Dj/JHlhfCvDUn7PkRfCYsmpB4nUqput/YDFS11UfS6d9Y6mIz8dfU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779484997; c=relaxed/simple; bh=xqstT+tlRHEtyGEXYmO+4LeTddNMwJiokiAD7V7J5UA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q2TBxWAzd+i3FKETZlz+sGREBqZhLmIDiMvR7FlAT4oqX4WqB9rxJq+wAkV9MukuQpZN5inWxqXqAtsmxJxYkVk7+X8/ZGIR7E0i8EU5/YPnOuYiC1fM3tHpG32Lx9zxOYlulyJvFnUup4n0ufL1Mvby6BQIcHgMlp0wxToyRDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=H4OXmgSW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="H4OXmgSW" Received: by smtp.kernel.org (Postfix) with ESMTPS id A9C4CC2BCB3; Fri, 22 May 2026 21:23:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779484996; bh=xqstT+tlRHEtyGEXYmO+4LeTddNMwJiokiAD7V7J5UA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=H4OXmgSWyM1KA2ID0+4h7fy4WWs469AXQvYBfYEi4cJ3eM6gLjMAf8Uo/1XpBJoAL ZC/VnMTN2VIuV3I2UToS0oLXJSXQCJ52BPeoi6cZCaWeC4287/WAxglQgHlUONJx93 AUFLylRL0pBOJvIyrZDdjG8GtiExExr+dXBhQF9puLjZ5ywXpromg0YaJH+I3BfEVL s0LDe4c9e1n7b/Cd6HZBRPKtFc4RqbFOH5Crh0KX+JBSJbcN7ElPJfmLx6MxjqaAZy OwKQAuudrFNx317YN+svFGUcADwW8/CUhgraAHHuoRG06NbUwbh9Y2qYozAN6GRAq3 Xk6mIB16z35wQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90838CD4F3D; Fri, 22 May 2026 21:23:16 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 22 May 2026 23:23:07 +0200 Subject: [PATCH v5 1/8] Documentation: admin-guide: media: add rk3588 vicap Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-1-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=4871; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=eS5mY4EZ7XDsw0jrDI/5w4/ofpel/2YcT5yOuU60IhQ=; b=N2pUoKptdlhLJYmC0x8IoCAFVpqaQxisqzjMxTaylG4mLUSPTY9g/7vxBKCsU7O/mJhmivWMP L/ZBO6ZK1rzCL/vfsAo0XnwuGGFKQP1eas0CWXXE51tbx/xS05JvHDn X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add a section that describes the Rockchip RK3588 VICAP. Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch --- .../admin-guide/media/rkcif-rk3588-vicap.dot | 29 ++++++++++++++++++= ++ Documentation/admin-guide/media/rkcif.rst | 32 ++++++++++++++++++= ++++ 2 files changed, 61 insertions(+) diff --git a/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot b/Docum= entation/admin-guide/media/rkcif-rk3588-vicap.dot new file mode 100644 index 0000000000000000000000000000000000000000..f6d3404920b544f921987d3240f= 89987b340e138 --- /dev/null +++ b/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot @@ -0,0 +1,29 @@ +digraph board { + rankdir=3DTB + n00000007 [label=3D"{{ 0} | rkcif-mipi2\n/dev/v4l-subdev0 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000007:port1 -> n0000000a + n00000007:port1 -> n00000010 [style=3Ddashed] + n00000007:port1 -> n00000016 [style=3Ddashed] + n00000007:port1 -> n0000001c [style=3Ddashed] + n0000000a [label=3D"rkcif-mipi2-id0\n/dev/video0", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000010 [label=3D"rkcif-mipi2-id1\n/dev/video1", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000016 [label=3D"rkcif-mipi2-id2\n/dev/video2", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000001c [label=3D"rkcif-mipi2-id3\n/dev/video3", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000025 [label=3D"{{ 0} | rkcif-mipi4\n/dev/v4l-subdev1 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000025:port1 -> n00000028 + n00000025:port1 -> n0000002e [style=3Ddashed] + n00000025:port1 -> n00000034 [style=3Ddashed] + n00000025:port1 -> n0000003a [style=3Ddashed] + n00000028 [label=3D"rkcif-mipi4-id0\n/dev/video4", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000002e [label=3D"rkcif-mipi4-id1\n/dev/video5", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000034 [label=3D"rkcif-mipi4-id2\n/dev/video6", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000003a [label=3D"rkcif-mipi4-id3\n/dev/video7", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000043 [label=3D"{{ 0} | dw-mipi-csi2rx fdd30000.csi\n/d= ev/v4l-subdev2 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000043:port1 -> n00000007:port0 + n00000048 [label=3D"{{ 0} | dw-mipi-csi2rx fdd50000.csi\n/d= ev/v4l-subdev3 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000048:port1 -> n00000025:port0 + n0000004d [label=3D"{{} | imx415 3-001a\n/dev/v4l-subdev4 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n0000004d:port0 -> n00000043:port0 + n00000051 [label=3D"{{} | imx415 4-001a\n/dev/v4l-subdev5 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000051:port0 -> n00000048:port0 +} diff --git a/Documentation/admin-guide/media/rkcif.rst b/Documentation/admi= n-guide/media/rkcif.rst index 2558c121abc466393b4a132e0d9abd2d37f2d25b..313a0ea45d16fe9bbb79d0798e8= f8b1dbe1cb83f 100644 --- a/Documentation/admin-guide/media/rkcif.rst +++ b/Documentation/admin-guide/media/rkcif.rst @@ -77,3 +77,35 @@ and the following video devices: .. kernel-figure:: rkcif-rk3568-vicap.dot :alt: Topology of the RK3568 Video Capture (VICAP) unit :align: center + +Rockchip RK3588 Video Capture (VICAP) +------------------------------------- + +The RK3588 Video Capture (VICAP) unit features a digital video port and six +MIPI CSI-2 capture interfaces that can receive video data independently. +The DVP accepts parallel video data, BT.656 and BT.1120. +Since the BT.1120 protocol may feature more than one stream, the RK3588 VI= CAP +DVP features four DMA engines that can capture different streams. +Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines = each +to handle different Virtual Channels (VCs). + +The rkcif driver represents this hardware variant by exposing the following +V4L2 subdevices: + +* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0 +* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1 +* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY0 +* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY1 + +and the following video devices: + +* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2 + INTERFACE/CROP block. +* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4 + INTERFACE/CROP block. + +.. kernel-figure:: rkcif-rk3588-vicap.dot + :alt: Topology of the RK3588 Video Capture (VICAP) unit + :align: center --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DDEF389107; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-2-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=6436; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=im+o/JIpnBODW83u7tZJGsEttv7DKCVZnFjWMn7O7Ds=; b=/9Z4cuEnd7E2AIBT2dyZPM9JBgN6OunMh7RhUwHCZ/PZLElRjwjqMv8Rei8T6aofmB//fOg0r TuvyywQ8ME3AQR6gN+dTh21InrQQ0GhQcVSzs+vDFX6Bfz7HO+bl0WS X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add documentation for the Rockchip RK3588 Video Capture (VICAP) unit. To that end, make the existing rockchip,rk3568-vicap documentation more general and introduce variant specific constraints. Acked-by: Conor Dooley Signed-off-by: Michael Riesch --- .../bindings/media/rockchip,rk3568-vicap.yaml | 173 +++++++++++++++++= +--- 1 file changed, 154 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.= yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml index 18cd0a5a5318174910e04f6ef7558c92cbfec899..080b64503b1bc44d0cfa796db8e= c0eb369ed4c52 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml @@ -15,9 +15,15 @@ description: the data from camera sensors, video decoders, or other companion ICs and transfers it into system main memory by AXI bus. =20 + The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568 + counterpart, but features six MIPI CSI-2 ports and additional connections + to the image signal processor (ISP) blocks. + properties: compatible: - const: rockchip,rk3568-vicap + enum: + - rockchip,rk3568-vicap + - rockchip,rk3588-vicap =20 reg: maxItems: 1 @@ -26,11 +32,8 @@ properties: maxItems: 1 =20 clocks: - items: - - description: ACLK - - description: HCLK - - description: DCLK - - description: ICLK + minItems: 4 + maxItems: 5 =20 clock-names: items: @@ -38,25 +41,19 @@ properties: - const: hclk - const: dclk - const: iclk + - const: iclk1 + minItems: 4 =20 iommus: maxItems: 1 =20 resets: - items: - - description: ARST - - description: HRST - - description: DRST - - description: PRST - - description: IRST + minItems: 5 + maxItems: 9 =20 reset-names: - items: - - const: arst - - const: hrst - - const: drst - - const: prst - - const: irst + minItems: 5 + maxItems: 9 =20 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -67,8 +64,15 @@ properties: =20 ports: $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false =20 properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + port@0: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false @@ -100,13 +104,75 @@ properties: =20 port@1: $ref: /schemas/graph.yaml#/properties/port - description: Port connected to the MIPI CSI-2 receiver output. + description: Port connected to the MIPI CSI-2 receiver 0 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 1 output. =20 properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false =20 + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 2 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@4: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 3 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@5: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 4 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@6: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 5 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@10: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP0 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@11: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP1 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false required: - compatible - reg @@ -114,6 +180,75 @@ required: - clocks - ports =20 +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3568-vicap + then: + properties: + clocks: + maxItems: 4 + + clock-names: + maxItems: 4 + + resets: + maxItems: 5 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: prst + - const: irst + + ports: + properties: + port@2: false + + port@3: false + + port@4: false + + port@5: false + + port@6: false + + port@10: false + + port@11: false + + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-vicap + then: + properties: + clocks: + minItems: 5 + + clock-names: + minItems: 5 + + resets: + minItems: 9 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: irst0 + - const: irst1 + - const: irst2 + - const: irst3 + - const: irst4 + - const: irst5 + additionalProperties: false =20 examples: --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) 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smtp.lore.kernel.org (Postfix) with ESMTP id BD952CD5BB0; Fri, 22 May 2026 21:23:16 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 22 May 2026 23:23:09 +0200 Subject: [PATCH v5 3/8] media: rockchip: rkcif: add support for rk3588 vicap mipi capture Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-3-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=8953; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=CfNdaneRy6lnhykP/prf28P4vC/N3S76qlnPJBIE9BU=; b=i+oFtvetrbZwgjudBMCACA3AeKDhFkvTy8QgWv/nxNrsRBUlbUGMGWpBCr4zNt+w9x2sYihhr jne6qxXxrt9B9NcC8Ex+epA+9wuMwj3jLHK4sTHb8vl24majDXVgRCf X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP) and six MIPI CSI-2 capture interfaces. Add initial support for this variant to the rkcif driver and enable the MIPI CSI-2 capture interfaces. Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch --- .../platform/rockchip/rkcif/rkcif-capture-mipi.c | 148 +++++++++++++++++= +++- .../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 + .../media/platform/rockchip/rkcif/rkcif-common.h | 2 +- drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++ 4 files changed, 163 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c index 9e67160a16e468401af32ed5672da8b6a0d86ef2..bc9518f8db50757390c917f433a= e35bdd330927b 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c @@ -30,6 +30,14 @@ #define RK3568_MIPI_CTRL0_CROP_EN BIT(5) #define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1) =20 +#define RK3588_MIPI_CTRL0_DMA_EN BIT(28) +#define RK3588_MIPI_CTRL0_HIGH_ALIGN BIT(27) +#define RK3588_MIPI_CTRL0_WRDDR(type) ((type) << 5) +#define RK3588_MIPI_CTRL0_CROP_EN BIT(4) +#define RK3588_MIPI_CTRL0_PARSE(type) ((type) << 1) + +#define RK3588_MIPI_CTRL_CAP_EN BIT(0) + #define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10) #define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8) #define RKCIF_MIPI_CTRL0_CAP_EN BIT(0) @@ -375,11 +383,8 @@ static u32 rkcif_rk3568_mipi_ctrl0(struct rkcif_stream *stream, const struct rkcif_output_fmt *active_out_fmt) { - u32 ctrl0 =3D 0; - - ctrl0 |=3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); - ctrl0 |=3D RKCIF_MIPI_CTRL0_CAP_EN; - ctrl0 |=3D RK3568_MIPI_CTRL0_CROP_EN; + u32 ctrl0 =3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt) | + RKCIF_MIPI_CTRL0_CAP_EN | RK3568_MIPI_CTRL0_CROP_EN; =20 if (active_out_fmt->mipi.compact) ctrl0 |=3D RK3568_MIPI_CTRL0_COMPACT_EN; @@ -481,6 +486,132 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap= _mipi_match_data =3D { }, }; =20 +static u32 +rkcif_rk3588_mipi_ctrl0(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt) +{ + u32 ctrl0 =3D 0; + + ctrl0 |=3D RK3588_MIPI_CTRL0_DMA_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); + ctrl0 |=3D RK3588_MIPI_CTRL0_CROP_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_CAP_EN; + + switch (active_out_fmt->mipi.type) { + case RKCIF_MIPI_TYPE_RAW8: + break; + case RKCIF_MIPI_TYPE_RAW10: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x1); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RAW12: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x2); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RGB888: + break; + case RKCIF_MIPI_TYPE_YUV422SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x4); + break; + case RKCIF_MIPI_TYPE_YUV420SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x5); + break; + case RKCIF_MIPI_TYPE_YUV400: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x3); + break; + default: + break; + } + + return ctrl0; +} + +const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data =3D { + .mipi_num =3D 6, + .mipi_ctrl0 =3D rkcif_rk3588_mipi_ctrl0, + .regs =3D { + [RKCIF_MIPI_CTRL] =3D 0x20, + [RKCIF_MIPI_INTEN] =3D 0x74, + [RKCIF_MIPI_INTSTAT] =3D 0x78, + }, + .regs_id =3D { + [RKCIF_ID0] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x00, + [RKCIF_MIPI_CTRL1] =3D 0x04, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x24, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x2c, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x34, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x28, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x30, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x8c, + }, + [RKCIF_ID1] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x08, + [RKCIF_MIPI_CTRL1] =3D 0x0c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x38, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x40, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x48, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x3c, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x44, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x90, + }, + [RKCIF_ID2] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x10, + [RKCIF_MIPI_CTRL1] =3D 0x14, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x4c, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x54, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x5c, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x50, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x58, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x94, + }, + [RKCIF_ID3] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x18, + [RKCIF_MIPI_CTRL1] =3D 0x1c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x60, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x68, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x70, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x64, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x6c, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x98, + }, + }, + .blocks =3D { + { + .offset =3D 0x100, + }, + { + .offset =3D 0x200, + }, + { + .offset =3D 0x300, + }, + { + .offset =3D 0x400, + }, + { + .offset =3D 0x500, + }, + { + .offset =3D 0x600, + }, + }, +}; + static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *inte= rface, unsigned int index) { @@ -631,6 +762,13 @@ static int rkcif_mipi_start_streaming(struct rkcif_str= eam *stream) rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1); rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0); =20 + /* + * TODO: This bit has a different meaning on the RK3568, but it is + * set there by default anyway. While correct, this is not exactly + * nice and shall be reworked during the next refactoring. + */ + rkcif_mipi_write(interface, RKCIF_MIPI_CTRL, RK3588_MIPI_CTRL_CAP_EN); + ret =3D 0; =20 out: diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h index 7f16eadc474c3b40078b8e9074dbfbd13ce95317..7edaca44f653ca405562ac1d91d= 0fea721eff3ce 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h @@ -13,6 +13,7 @@ #include "rkcif-common.h" =20 extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_da= ta; +extern const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_da= ta; =20 int rkcif_mipi_register(struct rkcif_device *rkcif); =20 diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers= /media/platform/rockchip/rkcif/rkcif-common.h index dd92cfbc879f01fec0983cc722c86c8da239a987..4d9211ba9bda8d8018c99fa3595= ff7cac70be3c7 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -27,7 +27,7 @@ #include "rkcif-regs.h" =20 #define RKCIF_DRIVER_NAME "rockchip-cif" -#define RKCIF_CLK_MAX 4 +#define RKCIF_CLK_MAX 5 =20 enum rkcif_format_type { RKCIF_FMT_TYPE_INVALID, diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/me= dia/platform/rockchip/rkcif/rkcif-dev.c index b4cf1146f13118ef77a49005af1edad96b793c41..be3a174b9aab021c81cf98a01c0= 599b71492149c 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -53,6 +53,20 @@ static const struct rkcif_match_data rk3568_vicap_match_= data =3D { .mipi =3D &rkcif_rk3568_vicap_mipi_match_data, }; =20 +static const char *const rk3588_vicap_clks[] =3D { + "aclk", + "hclk", + "dclk", + "iclk", + "iclk1", +}; + +static const struct rkcif_match_data rk3588_vicap_match_data =3D { + .clks =3D rk3588_vicap_clks, + .clks_num =3D ARRAY_SIZE(rk3588_vicap_clks), + .mipi =3D &rkcif_rk3588_vicap_mipi_match_data, +}; + static const struct of_device_id rkcif_plat_of_match[] =3D { { .compatible =3D "rockchip,px30-vip", @@ -62,6 +76,10 @@ static const struct of_device_id rkcif_plat_of_match[] = =3D { .compatible =3D "rockchip,rk3568-vicap", .data =3D &rk3568_vicap_match_data, }, + { + .compatible =3D "rockchip,rk3588-vicap", + .data =3D &rk3588_vicap_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3643B388E48; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-4-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=2720; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=dZdZT5orbsEANcy4d6TWcsk4E00WD7gaPMXPl877FMo=; b=p78o0A7laj4AhONI1X5AWIm/FJ1HmquBlGR4+lVeDa6dpsjk+Oi9DvBRvMHMIpeh7AFYMNPG4 0wNd/NI7rKzAomwbIe/c0w6lyBySkLvAoup3ZJ/pecafjh5+JZuwcmv X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch This patch is discussed over at https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collab= ora.com included here for testing purposes only. The Rockchip RK3588 features six MIPI CSI-2 receiver units: - MIPI0: connected to MIPI DCPHY0 (not supported) - MIPI1: connected to MIPI DCPHY1 (not supported) - MIPI2: connected to MIPI DPHY0 - MIPI3: connected to MIPI DPHY0-1 (not supported) - MIPI4: connected to MIPI DPHY1 - MIPI5: connected to MIPI DPHY1-1 (not supported) As the MIPI DCPHYs as well as the split DPHY mode of the DPHYs are not yet supported, add only the device tree nodes for the MIPI2 and MIPI4 units. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 52 +++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 4fb8888c281c8c7ce31e90e91abe1fd703804dd2..4d80e5e1f0339b6e91adf40da6c= c8389ffd4ddc9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,58 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + csi2: csi@fdd30000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd30000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_2>; + phys =3D <&csi_dphy0>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_2>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi2_in: port@0 { + reg =3D <0>; + }; + + csi2_out: port@1 { + reg =3D <1>; + }; + }; + }; + + csi4: csi@fdd50000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd50000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_4>; + phys =3D <&csi_dphy1>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_4>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi4_in: port@0 { + reg =3D <0>; + }; + + csi4_out: port@1 { + reg =3D <1>; + }; + }; + }; + vop: vop@fdd90000 { compatible =3D "rockchip,rk3588-vop"; reg =3D <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>; --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E315138A70B; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-5-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=3302; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=b/JPknTi57RvPKXxe7hO2AELGPmkoSjW8sarGr2DoLo=; b=IQr8ff1GNVzA20henso2tdEpSgZGkB8cjc72gDGV5E8DCRJM60gsQ30GL2+zkrwnpLsv6HUzz RmrRoHOvxADALn27gWu3ghXlSlM7uYn1rcACRKlD3F4apmCSUGAdBm7 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK3588 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 91 +++++++++++++++++++++++= ++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 4d80e5e1f0339b6e91adf40da6cc8389ffd4ddc9..87b0ac0893a9fe404a6274067bc= 142d782e3366e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,89 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + vicap: video-capture@fdce0000 { + compatible =3D "rockchip,rk3588-vicap"; + reg =3D <0x0 0xfdce0000 0x0 0x800>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_CSIHOST0>, + <&cru ICLK_CSIHOST1>; + clock-names =3D "aclk", "hclk", "dclk", "iclk", "iclk1"; + iommus =3D <&vicap_mmu>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_CSIHOST0_VICAP>, + <&cru SRST_CSIHOST1_VICAP>, + <&cru SRST_CSIHOST2_VICAP>, + <&cru SRST_CSIHOST3_VICAP>, + <&cru SRST_CSIHOST4_VICAP>, + <&cru SRST_CSIHOST5_VICAP>; + reset-names =3D "arst", "hrst", "drst", "irst0", "irst1", + "irst2", "irst3", "irst4", "irst5"; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vicap_dvp: port@0 { + reg =3D <0>; + }; + + vicap_mipi0: port@1 { + reg =3D <1>; + }; + + vicap_mipi1: port@2 { + reg =3D <2>; + }; + + vicap_mipi2: port@3 { + reg =3D <3>; + + vicap_mipi2_input: endpoint { + remote-endpoint =3D <&csi2_output>; + }; + }; + + vicap_mipi3: port@4 { + reg =3D <4>; + }; + + vicap_mipi4: port@5 { + reg =3D <5>; + + vicap_mipi4_input: endpoint { + remote-endpoint =3D <&csi4_output>; + }; + }; + + vicap_mipi5: port@6 { + reg =3D <6>; + }; + + vicap_toisp0: port@10 { + reg =3D <16>; + }; + + vicap_toisp1: port@11 { + reg =3D <17>; + }; + }; + }; + + vicap_mmu: iommu@fdce0800 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdce0800 0x0 0x40>, <0x0 0xfdce0900 0x0 0x40>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_VI>; + rockchip,disable-mmu-reset; + status =3D "disabled"; + }; + csi2: csi@fdd30000 { compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; reg =3D <0x0 0xfdd30000 0x0 0x10000>; @@ -1452,6 +1535,10 @@ csi2_in: port@0 { =20 csi2_out: port@1 { reg =3D <1>; + + csi2_output: endpoint { + remote-endpoint =3D <&vicap_mipi2_input>; + }; }; }; }; @@ -1478,6 +1565,10 @@ csi4_in: port@0 { =20 csi4_out: port@1 { reg =3D <1>; + + csi4_output: endpoint { + remote-endpoint =3D <&vicap_mipi4_input>; + }; }; }; }; --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EC3F38AC96; Fri, 22 May 2026 21:23:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-6-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=4379; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=3FVePkpPkw9zXNZmHFNf4wZoNKo/VGldfB5CgIPNdtw=; b=dXlPWHRhG7N7qb1aI6XvzLAM05XK0ttu4qAeAF2h57WMpeIbuiImP0+prMxXejmCJP5dLTbiA jKNx1T6L1CVC/GsMirVc7ClOPrcxHGNxMS73Q4pAD+YbooRpn2Xltzk X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM0 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 5 ++ .../rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso | 99 ++++++++++++++++++= ++++ 2 files changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index cb55c6b70d0e569abd9efc4e88ff908b6a682cf1..d4ff476fb9814b18c74c6d59d73= cf5d8e6ee9ca7 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -206,6 +206,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -321,6 +322,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-s= rns.dtb rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ rk3588-rock-5b-pcie-srns.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb +rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ rk3588-tiger-haikou-video-demo.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am0.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 0.dtso new file mode 100644 index 0000000000000000000000000000000000000000..ee9ecf68a88663a04e1c33a7188= 94490ef475203 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM0 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + savdd_cam0: regulator-savdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + regulator-name =3D "savdd_cam0"; + vin-supply =3D <&vcc_3v3_s3>; + }; + + sdvdd_cam0: regulator-sdvdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-name =3D "sdvdd_cam0"; + vin-supply =3D <&vcc5v0_sys>; + }; + + siovdd_cam0: regulator-siovdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "siovdd_cam0"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&savdd_cam0>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + dvdd-supply =3D <&sdvdd_cam0>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&siovdd_cam0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam0_rstn &mipim0_camera3_clk>; + reset-gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + + port { + imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi2_input>; + }; + }; + }; +}; + +&pinctrl { + cam0 { + cam0_rstn: cam0-rstn-pinctrl { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi2 { + status =3D "okay"; +}; + +&csi2_in { + csi2_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&imx415_output>; + }; +}; + +&csi_dphy0 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E566B38A717; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-7-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=4389; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=8GAq5xF2a9zwM/Nc+joNIeEA9N/887jxc8QNxty3Km0=; b=LLIeL+0it+uLfSwIx0TGBlVfXYPouf/FTxonhsGHnCJ2C05JWwB53nZtOBtzsodQYKixcIknO EcscyfGQ9ScC5bffX1vw/NYTsB6FSz/cXWmV7RuYxbBPLTdKiu8me90 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM1 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 4 +- .../rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso | 99 ++++++++++++++++++= ++++ 2 files changed, 102 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index d4ff476fb9814b18c74c6d59d73cf5d8e6ee9ca7..761d82b4f4f2ac7f0f4ba5e1f94= f495b2160a059 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -207,6 +207,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep= .dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -324,7 +325,8 @@ rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ - rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo \ + rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am1.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 1.dtso new file mode 100644 index 0000000000000000000000000000000000000000..8a4cf3fdbf8ebde8b2939c6126d= 169074431588a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM1 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + savdd_cam1: regulator-savdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + regulator-name =3D "savdd_cam1"; + vin-supply =3D <&vcc_3v3_s3>; + }; + + sdvdd_cam1: regulator-sdvdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-name =3D "sdvdd_cam1"; + vin-supply =3D <&vcc5v0_sys>; + }; + + siovdd_cam1: regulator-siovdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "siovdd_cam1"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + cam1_imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&savdd_cam1>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + dvdd-supply =3D <&sdvdd_cam1>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&siovdd_cam1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam1_rstn &mipim0_camera4_clk>; + reset-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + + port { + cam1_imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi4_input>; + }; + }; + }; +}; + +&pinctrl { + cam1 { + cam1_rstn: cam1-rstn-pinctrl { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi4 { + status =3D "okay"; +}; + +&csi4_in { + csi4_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&cam1_imx415_output>; + }; +}; + +&csi_dphy1 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.47.3 From nobody Sun May 24 20:36:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E59B38AC92; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JFPDQ332" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4416EC2BCC9; Fri, 22 May 2026 21:23:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779484997; bh=HY6HXz1rUxunVE83orvuh0gY4psjWh1saEXwMh/vrh4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JFPDQ332VK/XtDPabk8fNoHSESgwzZjBUUbyotUVWAcuyiBQ/PkLAdB6o8c6Dhh6b 1xmR87vSarPT+2xab+Dt/O9wBPXT1RjeVWk1M8/Km00oqAI6RvbmMbHTuyIl7iZ/6Z 0FkqvRt00DNGKekWq5clt2+coo1jv8FmuNi2YJ5Tyc5m/aSDhEBnIbMqv1Qa//Rg5r BEknQaodQd5i3xZGdBIQNJv1rVEnd008cQKebE74tDoYj/icNACTdZUHy9eyHbMMlo DIEQGxxxjQKNqPuXq/kPQ37T0+xYhm8Cb8Mp4raJS+xAYaCdP2vaqoRdUYk08koCgu q+tLKM4Ro6IyQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B029CD4F3D; Fri, 22 May 2026 21:23:17 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 22 May 2026 23:23:14 +0200 Subject: [PATCH v5 8/8] arm64: defconfig: enable designware mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260522-rk3588-vicap-v5-8-d1d1f5265c56@collabora.com> References: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779484994; l=1048; i=michael.riesch@collabora.com; s=20260428; h=from:subject:message-id; bh=a8sioWJftfSyXN0rqDXq8bBppSiXX8eZImBE70llAi8=; b=IqmzJqKJkEHjtsNbaC/h3Bc2jLgWi0PGoQF+I307c9pB+aqLWY0c76oUHf57BbpVC+xz2Wtsh bNMI9SKvxgcD9ja101x3XnKmRLP60yM7U5tQL+Aq5v7j30/QtXQDhrT X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=tAbmpPTE1MELYweXqqDU40fa18uCO6s32GJL/RzyW2Y= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20260428 with auth_id=759 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Synopsys DesignWare MIPI CSI-2 Receiver is integrated into recent Rockchip SoCs, such as the RK3568 and the RK3588. As a consequence, they are used on a lot of Rockchip-based single board computers and/or corresponding camera modules, such as the Radxa Camera 4K. Enable the driver for it in the default configuration. Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d905a0777f939c51cc39df6230591a31058b765f..9171f750337e540f0feec998c7a= a33d3444b806e 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -918,6 +918,7 @@ CONFIG_SDR_PLATFORM_DRIVERS=3Dy CONFIG_V4L_MEM2MEM_DRIVERS=3Dy CONFIG_VIDEO_AMPHION_VPU=3Dm CONFIG_VIDEO_CADENCE_CSI2RX=3Dm +CONFIG_VIDEO_DW_MIPI_CSI2RX=3Dm CONFIG_VIDEO_MEDIATEK_JPEG=3Dm CONFIG_VIDEO_MEDIATEK_VCODEC=3Dm CONFIG_VIDEO_WAVE_VPU=3Dm --=20 2.47.3