From nobody Sun May 24 20:36:32 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7B782E11C7 for ; Thu, 21 May 2026 14:06:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779372389; cv=none; b=sY5oKX0dIqqqSuvwApqlMA+D5As48HUViPGxqyM0fNl70vzUG2GB+VEHDb4l81AnBlQ9Qe9Zh7MotJbzPGLKcORzwE6mda9CKD1/+XbkVnLANOi02fIN7ZOtYT4F1nCnXIPE5T//jfcnltKlkXZiSxskE7Z6kMX0b6NX57UilMs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779372389; c=relaxed/simple; bh=q6/uXjQ/XPAer0/bzSYSlACp4MPDCgjTYubdTYSseks=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NnlZqyMPGYcAJcce5qA2BBy77a5ahdTNyKRXc99nMBBJ8NqB+Ym6FztFTTToa3NDzbrW9h0s1gnbPF2cgTJzWu+YAolVwjUOMGIPWT5lrI6x2cX8wKbVIE6+W4f2GnkaJZy3+wxoZQrcs5jDqsTste1zuk9an40b49Sz2dniJeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=dxUxF6tJ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=gwfEtq/D; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="dxUxF6tJ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="gwfEtq/D" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64L99n973118534 for ; Thu, 21 May 2026 14:06:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= +LbFZlJpygkKRNnq4cZd2WgvzDUunEa6SjSNWENQD28=; b=dxUxF6tJiF4JOU0F C7K+Xg92czk1OTWjaITjIKcP2mI1FvyXbL7DOXxhtNz1x6gFYT+5CX8UENdNOr+F KfE5H5CJrdyYurZ1AdDd5c2LK0mkI9Mfk10A68SmfRKJPt1E1bLTwXa6l7MdUIq+ qW69NM4BVAAok4Da6cimmDObxHKIExvkFb7Tl5x1DJrRXqXF7ETkL2KLBW/Ru5Wt M1EHZ1sd/f1zVPXT+rggvCkewDUZWzoeTENcCDliPtoXQCcGcynaQ2awve8VTW5f +ohmEu6zeAaMutYOf6bag6iIGJjYH1ZhwgYzuraOBe9H9FcxXga6fAAUbiwY77nJ 7Xny5g== Received: from mail-yw1-f197.google.com (mail-yw1-f197.google.com [209.85.128.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e9r962t67-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 21 May 2026 14:06:26 +0000 (GMT) Received: by mail-yw1-f197.google.com with SMTP id 00721157ae682-7bd5c9e2e4aso63519297b3.2 for ; Thu, 21 May 2026 07:06:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779372386; x=1779977186; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+LbFZlJpygkKRNnq4cZd2WgvzDUunEa6SjSNWENQD28=; b=gwfEtq/DHKZXDo6gizZZG/H95lF4XeVikttCVSdo3ZxCRbakk6OSsHwBtdFZSQ47kQ sVuOmT79iChK79TSNXtEAJ5GPkcKb6RfZgUVA7NxGq4m8PkGOPTt+U6g1e3yme91LLZ/ ABo8CRoPc4VjqFA1UzbPlrrb/7IgFD8NE4o1i04SvGCmMZlCf/q4XE8Vj3Os5ehkI+Et q57aWozVExCf6e7F9Nkn1Tx6j8chIc5OhMuyjKNDgrIoXUOJKxS7TAaMdngyKmovz5r1 JlasGNeKB5Y6OITsivrDCAASLL2vO0I8cKRyFspm/PyeHWZVnS57OvYDpp9Is9djC6Kh DmSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779372386; x=1779977186; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=+LbFZlJpygkKRNnq4cZd2WgvzDUunEa6SjSNWENQD28=; b=M0cz9BNDtOXoQ5UULPwJ3nr6JdUq8/gAC1IAvuBg+HVAnWZmXIYTRUlqjCqzd5VTUN usuwSCsrP0YSqkv3j+RqSmoRbj3o3OSkr+AUHWzdfWYHcBcR6uUyk2kteAR9A/D02CD1 ohFZCPBmSPvKzhaDlcvZIWKdX7mUVUnO77W+LEQzoZD73l2Rm5Os1ZSPzG9IuvFnQ89D MDbMVJRSj5tlK7+5gcQ1FrpjSbQU5AdnHlLLhLZj82IzzizTYNUmxIDw0E0dxL+gWP+z LEiq1xrYxmcuCuE3F/Yz+5vUwNYH57kA5fjCv6azi97z9588jSPpuerBEseAjCBvRbsi GRAw== X-Forwarded-Encrypted: i=1; AFNElJ9ZhTh/Y/HKXZ+vB7x4MHT6Q7rcYncYs3VhT3kFYBz6UXYXr+xYXlLr0ObnzpWfVXkOeEkGdvXjHQ6+SXw=@vger.kernel.org X-Gm-Message-State: AOJu0Yx5e3zC/bpSAyOfBiAAGLon0lXz88+ZC2DyS1+Oh6h5fOsgYW+S 883y78qTU4Cbd4V3W25hdcEjz78EoU2FV0mcYkTj8sdBELNBfOEpQt4bNUeOQ1n3w4NPrrDr1IC uUy6waUXQuPuK9JsUk79GnG/YNunU00H5/ALIf1DRSOeuRQ5MIpPSgDweuNr/lmfIJcJHO12tmp A= X-Gm-Gg: Acq92OFJDiJ3ywRcJjJmtrMytV4t5w3ytmiMG0rvkTCvzkWEcRKHzY2Z0VFfe1ICxB9 4ecSE+U21SzqnSdNDBE0lYYc+0eUtMVKO7bq4I0jt9T6hHj67D3feZCpEWaMCy9HxjzpB8AUi1n QaNsgGpmyzvZjn0wITgaf2jPtDoWqLVVuAtLqjKRSWr3gi3q9yKqDUlJRYUKMhMK8ZEscdMPUgr Q11wcCBCjWxjpiUgNLCAYDj0UXzLw+y8btiID1fVBkaXNrHTeH4AT2jBwObQlaUyTRriHS/LGQf hsMvUJK3MDiJmNxQnxkOvzOgmPtng6XvFU3FoJYxHBomvTpUgTbnltAfNKggaFRJfEGdhcO/aic mF3MouECE+PH89C27UozS6TqcxUB5TjJYzVIHnKwQi/qhj+X/Xxlq X-Received: by 2002:a05:690c:c4f5:b0:79a:5fb9:62ad with SMTP id 00721157ae682-7d20d604f21mr29085217b3.43.1779372385964; Thu, 21 May 2026 07:06:25 -0700 (PDT) X-Received: by 2002:a05:690c:c4f5:b0:79a:5fb9:62ad with SMTP id 00721157ae682-7d20d604f21mr29084577b3.43.1779372385356; Thu, 21 May 2026 07:06:25 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 00721157ae682-7d2cab7a5f9sm2920677b3.39.2026.05.21.07.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 07:06:24 -0700 (PDT) From: Imran Shaik Date: Thu, 21 May 2026 19:36:04 +0530 Subject: [PATCH v3 1/2] dt-bindings: cpufreq: qcom-hw: Document Shikra CPUFREQ Hardware Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-shikra-cpufreq-scaling-v3-1-883c13d1e514@oss.qualcomm.com> References: <20260521-shikra-cpufreq-scaling-v3-0-883c13d1e514@oss.qualcomm.com> In-Reply-To: <20260521-shikra-cpufreq-scaling-v3-0-883c13d1e514@oss.qualcomm.com> To: "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Imran Shaik X-Mailer: b4 0.14.2 X-Proofpoint-ORIG-GUID: PINeBSNY-Oo5uNONS-D96Zm2nTu6f7ci X-Proofpoint-GUID: PINeBSNY-Oo5uNONS-D96Zm2nTu6f7ci X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIxMDE0MiBTYWx0ZWRfXwLdeYwXsUch6 npmt6+buFRifJjdjQW+i0QXzVX/eUQCwp1fcZVV7fDFmCg53HCZU55oPhdMs4Yihe/dakExGrP6 gf10q7bnxP6reZc6bx49IkIGD34mUAdP8y42ta61gnFgGKtFNSZYTx5bcLPjSV8z8WUdON/2jBM GWkSWa+EGArhtxbHkiQPnxd8CtGxQwfwFh0rdPzXSjU8r9QmyfFI6vEgwm49hQhNfxjy/bvwbqA rwKeACwhGwJEI0/V669RLg0i0H0bzxqZGR0GJr7JvsfldlnFu+JX3nPtcs3iYWRYZK+RGn2tuEi 1QiOFOjN4H7JJ5ukGWV98oFSKtnsIzxttmqBsp2PR56QB/jMv1QMdC67Htn7ZE65cB8DeQOCsrK 7Cpbv4yD5g6XP6qofJctADbQTqZkDrje0o+03W5W/fQzD+Y2dED8JZRO6tgbD3cW06mvH1J8Akl 8SAKKfuWeBE7DtNtURA== X-Authority-Analysis: v=2.4 cv=GqFyPE1C c=1 sm=1 tr=0 ts=6a0f1162 cx=c_pps a=0mLRTIufkjop4KoA/9S1MA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=sA6xLUNpRn-UYiqxgCcA:9 a=QEXdDO2ut3YA:10 a=WgItmB6HBUc_1uVUp3mg:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-21_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 clxscore=1015 impostorscore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605210142 The Qualcomm Shikra cpufreq hardware is functionally identical to EPSS, but supports only up to 12 frequency lookup table (LUT) entries. Introduce Shikra specific bindings to represent this constrained EPSS variant. Signed-off-by: Imran Shaik Reviewed-by: Krzysztof Kozlowski --- .../bindings/cpufreq/qcom,shikra-epss.yaml | 96 ++++++++++++++++++= ++++ 1 file changed, 96 insertions(+) diff --git a/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yam= l b/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml new file mode 100644 index 0000000000000000000000000000000000000000..8543fd00d82acdbb3422bde4624= 17118aa4c49d1 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/cpufreq/qcom,shikra-epss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPUFREQ HW for Qualcomm Shikra SoC + +maintainers: + - Imran Shaik + - Taniya Das + +description: | + CPUFREQ HW is a hardware engine used by some Qualcomm SoCs to manage + frequency in hardware. It is capable of controlling frequency for + multiple clusters. + + The Qualcomm Shikra CPUFREQ HW supports up to 12 frequency lookup table + (LUT) entries. + +properties: + compatible: + enum: + - qcom,shikra-epss + + reg: + items: + - description: Frequency domain 0 register region + - description: Frequency domain 1 register region + + reg-names: + items: + - const: freq-domain0 + - const: freq-domain1 + + clocks: + items: + - description: XO Clock + - description: GPLL0 Clock + + clock-names: + items: + - const: xo + - const: alternate + + interrupts: + items: + - description: IRQ line for DCVSH 0 + - description: IRQ line for DCVSH 1 + + interrupt-names: + items: + - const: dcvsh-irq-0 + - const: dcvsh-irq-1 + + '#freq-domain-cells': + const: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - '#freq-domain-cells' + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells =3D <1>; + #size-cells =3D <1>; + + cpufreq@fd91000 { + compatible =3D "qcom,shikra-epss"; + reg =3D <0x0fd91000 0x1000>, <0x0fd92000 0x1000>; + reg-names =3D "freq-domain0", "freq-domain1"; + clocks =3D <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gpll0>; + clock-names =3D "xo", "alternate"; + interrupts =3D , + ; + interrupt-names =3D "dcvsh-irq-0", "dcvsh-irq-1"; + #freq-domain-cells =3D <1>; + #clock-cells =3D <1>; + }; + }; +... --=20 2.34.1 From nobody Sun May 24 20:36:32 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42EA631283E for ; Thu, 21 May 2026 14:06:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779372394; cv=none; b=dxpONI4M6fJbYncvGxOUD41lhHFYGc9SAtmHHqywJ+9iRsjzcJrY0/PAgexTuDXuSXdBqCOKTrSGcdA/8PgnmvTgrJ9nrj1M0HQh1Dlc2kW0GBHtljsLn685uiVLaVSdc9+PvNlfdn+Vo/J+5fvKQF00TC70/8jiHBFjFzKizxk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779372394; c=relaxed/simple; bh=2fruTuJGgso+AVSjN86SFOWYtIxEi2oXmlzdSiu8LiQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fsGYoY8nuFpUuP4Og/VrAtlvF5nblEnPLY7q99RMbp7zsIbH0uk/zggrVd1HJ4s0r0DMe2TeUhFk002KTfZ+9jclVDdGktoUcZVw1C4i3BGV9fl5LCdq66EhpdwHNpOuXXvRgZ/rMn8qeCDyO8L7vRYYycNbJcC46xJX6UGm2p0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=DZb3c1U4; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=XDQ08mDe; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="DZb3c1U4"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="XDQ08mDe" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64L99kok3527330 for ; Thu, 21 May 2026 14:06:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= c4wgPZzl341OGf2dUgGOsYttbVFxmjqeXYFCtkA02/8=; b=DZb3c1U4hANrkUez MWm5LxJ7zfcX6bniI46n54ufgbPmzvvoR52OhokQlOP1Qkq2MIcvAg/j4b3itzPS d7YoJmcMb/RvrRwDWtAmIcrOCRiNB/ehC/1zaHlXQa0tA0498pLdSr/jOhpiLzWo +sz9PLV9/43EZ0TUq1csNxUlbhcPdOSbK2ejTnDyTOq+2Fh6KnqHjiA/SjQ7H/mb 6nCu1bhl+S+RVkw1fFGJhqbPYgtGmdyUrYcH1ycoh1GgaQUkx1HyLOh/3atyDztN bMtkzAbvEfGVqWs7AYpbSsfFtbRZpvS8Eau2IfPSmsxN+zoszwbz4RxfKepZGhlD CeGkxg== Received: from mail-yw1-f199.google.com (mail-yw1-f199.google.com [209.85.128.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e9vhbhxx8-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 21 May 2026 14:06:32 +0000 (GMT) Received: by mail-yw1-f199.google.com with SMTP id 00721157ae682-7bd5c267082so49384667b3.0 for ; Thu, 21 May 2026 07:06:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779372392; x=1779977192; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=c4wgPZzl341OGf2dUgGOsYttbVFxmjqeXYFCtkA02/8=; b=XDQ08mDesHFURKb/KLTJw9D0fsLKcheWKC5NCgUzswOJX7PB7offQsmhUDWF2hOdkg zZoLHifLXPCUJaNDuzCn94Mqjw4FOmovzBxcnwe0iIn2zMDthNK33sRi/EjPdyDyGinT NsFuXuTZYN+RcExp89J5TQz3pQWEX09q4a1ZlKmRX3udispAV+Uguo7qaPmZU7duunAL yhOuqGrSfWWycdIwTspCAKtKoll7S5sLkGYJoekkY+CvwINq67KYzxMszE6dS3nUgd2k mxRRKT0u6hhWEhzpeh7OP6kXp/LmXeBccD8hKgW+JigNhYCATqve+37lHn9zuh0bfeqt vMoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779372392; x=1779977192; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=c4wgPZzl341OGf2dUgGOsYttbVFxmjqeXYFCtkA02/8=; b=SXB35hDdp8pLiOjxJ22wBRoATB9EJ6aL7AiLb4mhm4u/Xqj/2SRN7Bj6hwFK8X/HBJ j5e5FR9+9w17DtFEBX54tgRg1yr7ic19O7+cY4lKzZeTRc4hh4xHWUahoORq7cLbBiGW 3EhWgNlTk68bEkXRJSgE6d73CUhfBSH8Rv5VVAMrHGD8hHV1wokvkE76viwhrvaBX0LR 2D+VhLF+oonGLjUsdFUmrl+C+p+MTWbA0sYK+wmUlVZ4aXWYki6TYQE+cJo6Rxfkmrxi P8ypVrszJt3wPLBjiKK80qaPxr/8ZUBKdtUUd3xhKYmCF+sv7kH6wIfrk535v6IyGF+/ G9gw== X-Forwarded-Encrypted: i=1; AFNElJ/STMbL7D2FnuvQUMIEUTUX867yhGJ6Lcekxnk/QxuNbxVRKGGCymTURukPMhHclDjq9CH5V69zJ3RVW9c=@vger.kernel.org X-Gm-Message-State: AOJu0YzhbzudXeDZPsr2L4oiBpr7XL6Hj0VdT06EZa3diCRsrH+TQmsA 5ZgnujAVyo0jcPUe9GyKO6Q/SDkKW+MnulvbHbs9VQTlekKiSnT4duBCYCPhvGXnnV5va7Iu9+5 nFHoE2WD702qwoI87dQjuZZFgb7s06PC/rJoMo/zndJRnucJ1l5OEulBpjsQkT0vxNRI= X-Gm-Gg: Acq92OFiVtKGCPDCgujwN2HU6sMH8DSyrqhTc3eyIHkGdNdkGYLo9sFkv4E7ISnkomP t+08l1DPEGPOPrT++xjOkMtm9iOrEhmgVNzAKrqfD8V4sJEgCmzUUCCXQIw8zx6VKxK0Mse+s79 JWuzoX+8ZvE/SB1O+/P3qbavyWoHh7xkTAbVY6r1LoJRtbK5VuEIVSfl9bZ0GSuik+42LsDlXyb euwV+4kwhLxFD9W3KnFYtxw2yEKiNC7iU3725uCrZKuKg48LVvh0mqw/K20YK+fY0OX+2NhPQbQ l7GXCcFbweyFihb4gyY6B1YQVVmBR/MzBR7YAvvHIbQcsAbY49uV4wiR5U7VLso7ERBH1FnFCOy t426/vV4Ue0bCrcoWn/EzSxPe2jfzkqCOI9RCvhIGtKVZrqbfSfvF X-Received: by 2002:a05:690c:6213:b0:7cf:d9bc:808b with SMTP id 00721157ae682-7d20c940a74mr29415927b3.23.1779372391667; Thu, 21 May 2026 07:06:31 -0700 (PDT) X-Received: by 2002:a05:690c:6213:b0:7cf:d9bc:808b with SMTP id 00721157ae682-7d20c940a74mr29415057b3.23.1779372391070; Thu, 21 May 2026 07:06:31 -0700 (PDT) Received: from hu-imrashai-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 00721157ae682-7d2cab7a5f9sm2920677b3.39.2026.05.21.07.06.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 07:06:30 -0700 (PDT) From: Imran Shaik Date: Thu, 21 May 2026 19:36:05 +0530 Subject: [PATCH v3 2/2] cpufreq: qcom: Add cpufreq scaling support for Qualcomm Shikra SoC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260521-shikra-cpufreq-scaling-v3-2-883c13d1e514@oss.qualcomm.com> References: <20260521-shikra-cpufreq-scaling-v3-0-883c13d1e514@oss.qualcomm.com> In-Reply-To: <20260521-shikra-cpufreq-scaling-v3-0-883c13d1e514@oss.qualcomm.com> To: "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Imran Shaik , Konrad Dybcio X-Mailer: b4 0.14.2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIxMDE0MiBTYWx0ZWRfX9ER7lHZI+EGC PfBjW5o/2/19AyrAk6CcCDiLwoamlHvgt54VcBpCvaZc1FnjkhgTAYfLcfzpfE2ADElyrrrMEO+ kM3khGmREvZsGCVzzTdHPHZGlkDh4/jZoeuJGVs6lG/aT0gCKswpBk37sDtueHDDMybxPYEey5W oYCXymcvTREMDEhHiW1b6QnqTMGYCiiitUto/Rz7zkKoIdGgO6O0KotsTOJcHCL3omB63Pl/met gm5pslD4CvfADvX9mjSk9M48XWJO2pgSBYgU5SnxPeaR5eCS9ahEEaj4drFApWVmpFBvbCksFbm dwqYSg7xp3OhlBq2ZwDM8xlQMnztZKohgaI6dZUToVmarU0dZ9ugTxaN1Rc/M/s1IcnkJj2pHZP 3iVI7pUCBr26X0bD7/4oXnEYV9c6+TcDWcvQodpkAoEvYzGhNgbPIgg7b11KfEgiMDyvzJrqk1h myX3zFZdX+gwfO4q2aw== X-Authority-Analysis: v=2.4 cv=GYAnWwXL c=1 sm=1 tr=0 ts=6a0f1168 cx=c_pps a=72HoHk1woDtn7btP4rdmlg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=8xPgF8R1Jm-cxLKBqHoA:9 a=QEXdDO2ut3YA:10 a=kA6IBgd4cpdPkAWqgNAz:22 X-Proofpoint-GUID: zxgPWA6gKIM30ryQUKIEPGrflRW5LEHe X-Proofpoint-ORIG-GUID: zxgPWA6gKIM30ryQUKIEPGrflRW5LEHe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-21_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605210142 From: Taniya Das The Qualcomm Shikra cpufreq hardware is functionally identical to EPSS, but supports only up to 12 frequency lookup table (LUT) entries. When all 12 entries are populated, the existing repetitive LUT entry check may read beyond valid entries and expose incorrect frequencies. Hence, introduce shikra_epss_soc_data that reuses EPSS configuration with appropriate LUT entries limit. Signed-off-by: Taniya Das Reviewed-by: Konrad Dybcio Signed-off-by: Imran Shaik --- drivers/cpufreq/qcom-cpufreq-hw.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufr= eq-hw.c index ea9a20d27b8fdceb9341ee53e5fa27b7a6d92483..3d5a865fb8a35e112cb4d040fb5= 19e2c122a91dc 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ =20 #include @@ -40,6 +41,7 @@ struct qcom_cpufreq_soc_data { u32 reg_intr_clr; u32 reg_current_vote; u32 reg_perf_state; + u32 lut_max_entries; u8 lut_row_size; }; =20 @@ -156,7 +158,7 @@ static unsigned int qcom_cpufreq_get_freq(struct cpufre= q_policy *policy) soc_data =3D qcom_cpufreq.soc_data; =20 index =3D readl_relaxed(data->base + soc_data->reg_perf_state); - index =3D min(index, LUT_MAX_ENTRIES - 1); + index =3D min(index, soc_data->lut_max_entries - 1); =20 return policy->freq_table[index].frequency; } @@ -211,7 +213,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_= dev, struct qcom_cpufreq_data *drv_data =3D policy->driver_data; const struct qcom_cpufreq_soc_data *soc_data =3D qcom_cpufreq.soc_data; =20 - table =3D kzalloc_objs(*table, LUT_MAX_ENTRIES + 1); + table =3D kzalloc_objs(*table, soc_data->lut_max_entries + 1); if (!table) return -ENOMEM; =20 @@ -236,7 +238,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_= dev, icc_scaling_enabled =3D false; } =20 - for (i =3D 0; i < LUT_MAX_ENTRIES; i++) { + for (i =3D 0; i < soc_data->lut_max_entries; i++) { data =3D readl_relaxed(drv_data->base + soc_data->reg_freq_lut + i * soc_data->lut_row_size); src =3D FIELD_GET(LUT_SRC, data); @@ -405,6 +407,7 @@ static const struct qcom_cpufreq_soc_data qcom_soc_data= =3D { .reg_current_vote =3D 0x704, .reg_perf_state =3D 0x920, .lut_row_size =3D 32, + .lut_max_entries =3D LUT_MAX_ENTRIES, }; =20 static const struct qcom_cpufreq_soc_data epss_soc_data =3D { @@ -416,11 +419,25 @@ static const struct qcom_cpufreq_soc_data epss_soc_da= ta =3D { .reg_intr_clr =3D 0x308, .reg_perf_state =3D 0x320, .lut_row_size =3D 4, + .lut_max_entries =3D LUT_MAX_ENTRIES, +}; + +static const struct qcom_cpufreq_soc_data shikra_epss_soc_data =3D { + .reg_enable =3D 0x0, + .reg_domain_state =3D 0x20, + .reg_dcvs_ctrl =3D 0xb0, + .reg_freq_lut =3D 0x100, + .reg_volt_lut =3D 0x200, + .reg_intr_clr =3D 0x308, + .reg_perf_state =3D 0x320, + .lut_row_size =3D 4, + .lut_max_entries =3D 12, }; =20 static const struct of_device_id qcom_cpufreq_hw_match[] =3D { { .compatible =3D "qcom,cpufreq-hw", .data =3D &qcom_soc_data }, { .compatible =3D "qcom,cpufreq-epss", .data =3D &epss_soc_data }, + { .compatible =3D "qcom,shikra-epss", .data =3D &shikra_epss_soc_data }, {} }; MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match); --=20 2.34.1