From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50EFC3F44C9; Wed, 20 May 2026 17:58:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299894; cv=none; b=cQ8HkOshIs4RfOOjSZVZzAyXhdhGfaOZZK95xBoAYvYxJE26ygyT+vpEjVsMKFDLwNl2b1S/Mw7O4ZO8WsF6Ra7wDJ0do7JZvmkHSbStOXVvK4Kykymw5TW1dJWjhgwzvcLotZhm+VnadQTQeFEdzW3jMc1zfdoxsT5QNjHhXmg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299894; c=relaxed/simple; bh=I4SVOFAquh5eiYlUMlgdeL/TMUgvDKa+l2LFRekB3lE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qcJUaj+mEO0jORxw+rsyHo/ziSGzTYmHTh5FD9BseFyt53w4TX/3IsppBWtBPOLCGkBBa36Jjg7sFh+Jgxw1P1LdSKi+bkWlC7077+1EoAXXTJyRsw37Rrm0OsywINmWHv0zErmw4i8EBc3PdJq1RvZBlv3nYwd/HZ5sVTYJJpk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=fqoNS3IV; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="fqoNS3IV" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 50036277B1; Wed, 20 May 2026 19:58:05 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id 4BUuOXuJMrPc; Wed, 20 May 2026 19:58:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1779299884; bh=I4SVOFAquh5eiYlUMlgdeL/TMUgvDKa+l2LFRekB3lE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=fqoNS3IVjSH9frZ/hbmiTZwHjDnBIkCW5YAS8cy9EGQc7JURmGDnPVYFRXw2WX6yH aaTSs2I1Nm1IGGNXeJ2ks9cpSqNpK+IA4LMKo5Xt9OR8BK7+toztJKPm53TQoOlWGi Zq627NXmj1WhscB3iuEiKDFeviy7Oxsv4O6GC4qFlGfSXn3mNy1BSAWsHJjYct92G2 t15nTOKT/VK5StVn/10JMRwdHXNL0PcBmDNTBoqjrEYxGSb5b/kb2SBySi1asW8lZq 4NQe5PyzVO11WVKb7+sTljiVSdfGyCr1sc1iVMSUEiTJAHJRnqVwZ44XwQnm+z5ai6 yuFeYjotM646A== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov , Michael Zavertkin Subject: [PATCH v6 1/6] phy: realtek: usb2: introduce vstatus/new_reg_req variables to driver data Date: Wed, 20 May 2026 22:57:23 +0500 Message-ID: <20260520175728.720877-2-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In RTL9607C SoC, the vstatus register is located at a certain offset from the base and so introduce the vstatus_offset to handle it. Busy bit of the vstatus and new_reg_req bit are also different and so introduce these variables to the driver data as well. Add these variables to the pre-existing phy cfg structs for RTD SoCs and assign them the default values. Co-developed-by: Michael Zavertkin Signed-off-by: Michael Zavertkin Signed-off-by: Rustam Adilov --- drivers/phy/realtek/phy-rtk-usb2.c | 68 +++++++++++++++++++++++------- 1 file changed, 53 insertions(+), 15 deletions(-) diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-r= tk-usb2.c index 248550ef98ca..bd9ee895b9f9 100644 --- a/drivers/phy/realtek/phy-rtk-usb2.c +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -64,6 +64,9 @@ struct phy_reg { void __iomem *reg_wrap_vstatus; void __iomem *reg_gusb2phyacc0; int vstatus_index; + int vstatus_offset; + u32 vstatus_busy; + u32 new_reg_req; }; =20 struct phy_data { @@ -96,6 +99,9 @@ struct phy_cfg { bool do_toggle_driving; bool use_default_parameter; bool is_double_sensitivity_mode; + int vstatus_offset; + u32 vstatus_busy; + u32 new_reg_req; }; =20 struct phy_parameter { @@ -162,21 +168,21 @@ static char rtk_phy_read(struct phy_reg *phy_reg, cha= r addr) addr -=3D OFFEST_PHY_READ; =20 /* polling until VBusy =3D=3D 0 */ - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return (char)ret; =20 - /* VCtrl =3D low nibble of addr, and set PHY_NEW_REG_REQ */ - val =3D PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + /* VCtrl =3D low nibble of addr, and set phy_reg->new_reg_req */ + val =3D phy_reg->new_reg_req | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); writel(val, reg_gusb2phyacc0); - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return (char)ret; =20 - /* VCtrl =3D high nibble of addr, and set PHY_NEW_REG_REQ */ - val =3D PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + /* VCtrl =3D high nibble of addr, and set phy_reg->new_reg_req */ + val =3D phy_reg->new_reg_req | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); writel(val, reg_gusb2phyacc0); - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return (char)ret; =20 @@ -194,25 +200,26 @@ static int rtk_phy_write(struct phy_reg *phy_reg, cha= r addr, char data) int ret =3D 0; =20 /* write data to VStatusOut2 (data output to phy) */ - writel((u32)data << shift_bits, reg_wrap_vstatus); + writel((u32)data << shift_bits, + reg_wrap_vstatus + phy_reg->vstatus_offset); =20 - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return ret; =20 - /* VCtrl =3D low nibble of addr, set PHY_NEW_REG_REQ */ - val =3D PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + /* VCtrl =3D low nibble of addr, set phy_reg->new_reg_req */ + val =3D phy_reg->new_reg_req | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); =20 writel(val, reg_gusb2phyacc0); - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return ret; =20 - /* VCtrl =3D high nibble of addr, set PHY_NEW_REG_REQ */ - val =3D PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + /* VCtrl =3D high nibble of addr, set phy_reg->new_reg_req */ + val =3D phy_reg->new_reg_req | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); =20 writel(val, reg_gusb2phyacc0); - ret =3D utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) return ret; =20 @@ -957,6 +964,7 @@ static int get_phy_data_by_efuse(struct rtk_phy *rtk_ph= y, =20 static int parse_phy_data(struct rtk_phy *rtk_phy) { + struct phy_cfg *phy_cfg =3D rtk_phy->phy_cfg; struct device *dev =3D rtk_phy->dev; struct device_node *np =3D dev->of_node; struct phy_parameter *phy_parameter; @@ -974,6 +982,9 @@ static int parse_phy_data(struct rtk_phy *rtk_phy) phy_parameter->phy_reg.reg_wrap_vstatus =3D of_iomap(np, 0); phy_parameter->phy_reg.reg_gusb2phyacc0 =3D of_iomap(np, 1) + index; phy_parameter->phy_reg.vstatus_index =3D index; + phy_parameter->phy_reg.vstatus_offset =3D phy_cfg->vstatus_offset; + phy_parameter->phy_reg.vstatus_busy =3D phy_cfg->vstatus_busy; + phy_parameter->phy_reg.new_reg_req =3D phy_cfg->new_reg_req; =20 if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock")) phy_parameter->inverse_hstx_sync_clock =3D true; @@ -1085,6 +1096,9 @@ static const struct phy_cfg rtd1295_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D false, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1395_phy_cfg =3D { @@ -1109,6 +1123,9 @@ static const struct phy_cfg rtd1395_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D false, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1395_phy_cfg_2port =3D { @@ -1133,6 +1150,9 @@ static const struct phy_cfg rtd1395_phy_cfg_2port =3D= { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D false, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1619_phy_cfg =3D { @@ -1155,6 +1175,9 @@ static const struct phy_cfg rtd1619_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D false, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1319_phy_cfg =3D { @@ -1181,6 +1204,9 @@ static const struct phy_cfg rtd1319_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1312c_phy_cfg =3D { @@ -1206,6 +1232,9 @@ static const struct phy_cfg rtd1312c_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0xf, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1619b_phy_cfg =3D { @@ -1231,6 +1260,9 @@ static const struct phy_cfg rtd1619b_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0x8, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1319d_phy_cfg =3D { @@ -1256,6 +1288,9 @@ static const struct phy_cfg rtd1319d_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0x8, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct phy_cfg rtd1315e_phy_cfg =3D { @@ -1282,6 +1317,9 @@ static const struct phy_cfg rtd1315e_phy_cfg =3D { .driving_updated_for_dev_dis =3D 0x8, .use_default_parameter =3D false, .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0, + .vstatus_busy =3D PHY_VSTS_BUSY, + .new_reg_req =3D PHY_NEW_REG_REQ, }; =20 static const struct of_device_id usbphy_rtk_dt_match[] =3D { --=20 2.54.0 From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65BD53F4DD7; Wed, 20 May 2026 17:58:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299892; cv=none; b=BR+NlHyy/7cweEFjlSwv7+Nrl5N80WXpv7Mhz4oiHWEPVtC3cMJO/e5MnnWSwYaE85BFflF0gSJviBcdbcjxPbu8NMPtBAuyShsqnfdmg3p8xKUWeiGxAXW/wKStJWFHQRTMMuMsRW7wxHN3P/cBDgukscyIcfBHLbL0AIx+BAE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299892; c=relaxed/simple; bh=uMsv9LNQ6VHteVIpcvNZgbtwRtD4fWQkuov8UaIRSgU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oXUWA712duPBmR/u7pE3qQoBlAdSt5mT60XM/3K8iYk4E+0/ekF+Faw59S/sZ50I77uLmnw4kAmr+1Pqqp+MYcZcUbwACDDoiHc0sFDxEDuCL7pAylRd/e9al2xkySYb3Kwd9OltxeOp7burwhEUiHBSFCtNZpyJRxhgFZiWCaI= ARC-Authentication-Results: i=1; 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s=mail; t=1779299887; bh=uMsv9LNQ6VHteVIpcvNZgbtwRtD4fWQkuov8UaIRSgU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=KQ1F2OH9n10E8RJAmX7tgcXuPFB5rgZhEChZx1VvFDt7yvrLzVOXyCqm0PDzdTK91 XHr1KzyaIx4njldjBV+G74g6DOnFWOpVRvu9azsTOEdCx1+sLHH6IexQLLad8mrguI WwxoiilNBUAvDLp6v8rkt+sDJYpoHJchG3OXrDqzwnVe1CW5plLI5QcRIz85L45lYE 3K3Rpc4Co+7utjVD5bUFkECkpLsoUCHTN+est2rqQhRQVbzskiWnZ0zGu+VacKulvo G2QcMrQkZAONvWlWPMivdlPXsHXUVDrGp8jWb9O3FYokKIbgUtbGKYFZST6h4l0y5w P9tF1Oq+7MMUw== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov , Michael Zavertkin Subject: [PATCH v6 2/6] phy: realtek: usb2: introduce read and write functions to driver data Date: Wed, 20 May 2026 22:57:24 +0500 Message-ID: <20260520175728.720877-3-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RTL9607C is a big endian SoC with little endian USB host controller but vstatus register is from big endian memory region and thus existing writel doesn't work. It needs either __raw_writel or iowrite32be instead. To handle this situation, introduce read and write function to the driver data and create a default variation for the current RTD SoCs. Assign the existing phy configuration for RTD SoCs to the default read and write function. Co-developed-by: Michael Zavertkin Signed-off-by: Michael Zavertkin Signed-off-by: Rustam Adilov --- drivers/phy/realtek/phy-rtk-usb2.c | 40 ++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-r= tk-usb2.c index bd9ee895b9f9..a9e29d2f7e6f 100644 --- a/drivers/phy/realtek/phy-rtk-usb2.c +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -67,6 +67,9 @@ struct phy_reg { int vstatus_offset; u32 vstatus_busy; u32 new_reg_req; + + u32 (*read)(void __iomem *reg); + void (*write)(u32 val, void __iomem *reg); }; =20 struct phy_data { @@ -102,6 +105,9 @@ struct phy_cfg { int vstatus_offset; u32 vstatus_busy; u32 new_reg_req; + + u32 (*read)(void __iomem *reg); + void (*write)(u32 val, void __iomem *reg); }; =20 struct phy_parameter { @@ -128,6 +134,16 @@ struct rtk_phy { struct dentry *debug_dir; }; =20 +static u32 rtk_usb2phy_read(void __iomem *reg) +{ + return readl(reg); +} + +static void rtk_usb2phy_write(u32 val, void __iomem *reg) +{ + writel(val, reg); +} + /* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ static inline int page_addr_to_array_index(u8 addr) { @@ -200,8 +216,8 @@ static int rtk_phy_write(struct phy_reg *phy_reg, char = addr, char data) int ret =3D 0; =20 /* write data to VStatusOut2 (data output to phy) */ - writel((u32)data << shift_bits, - reg_wrap_vstatus + phy_reg->vstatus_offset); + phy_reg->write((u32)data << shift_bits, + reg_wrap_vstatus + phy_reg->vstatus_offset); =20 ret =3D utmi_wait_register(reg_gusb2phyacc0, phy_reg->vstatus_busy, 0); if (ret) @@ -985,6 +1001,8 @@ static int parse_phy_data(struct rtk_phy *rtk_phy) phy_parameter->phy_reg.vstatus_offset =3D phy_cfg->vstatus_offset; phy_parameter->phy_reg.vstatus_busy =3D phy_cfg->vstatus_busy; phy_parameter->phy_reg.new_reg_req =3D phy_cfg->new_reg_req; + phy_parameter->phy_reg.read =3D phy_cfg->read; + phy_parameter->phy_reg.write =3D phy_cfg->write; =20 if (of_property_read_bool(np, "realtek,inverse-hstx-sync-clock")) phy_parameter->inverse_hstx_sync_clock =3D true; @@ -1099,6 +1117,8 @@ static const struct phy_cfg rtd1295_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1395_phy_cfg =3D { @@ -1126,6 +1146,8 @@ static const struct phy_cfg rtd1395_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1395_phy_cfg_2port =3D { @@ -1153,6 +1175,8 @@ static const struct phy_cfg rtd1395_phy_cfg_2port =3D= { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1619_phy_cfg =3D { @@ -1178,6 +1202,8 @@ static const struct phy_cfg rtd1619_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1319_phy_cfg =3D { @@ -1207,6 +1233,8 @@ static const struct phy_cfg rtd1319_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1312c_phy_cfg =3D { @@ -1235,6 +1263,8 @@ static const struct phy_cfg rtd1312c_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1619b_phy_cfg =3D { @@ -1263,6 +1293,8 @@ static const struct phy_cfg rtd1619b_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1319d_phy_cfg =3D { @@ -1291,6 +1323,8 @@ static const struct phy_cfg rtd1319d_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct phy_cfg rtd1315e_phy_cfg =3D { @@ -1320,6 +1354,8 @@ static const struct phy_cfg rtd1315e_phy_cfg =3D { .vstatus_offset =3D 0, .vstatus_busy =3D PHY_VSTS_BUSY, .new_reg_req =3D PHY_NEW_REG_REQ, + .read =3D rtk_usb2phy_read, + .write =3D rtk_usb2phy_write, }; =20 static const struct of_device_id usbphy_rtk_dt_match[] =3D { --=20 2.54.0 From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 561813F65E6; Wed, 20 May 2026 17:58:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299896; cv=none; b=LKkcBlzmYs6IgOJ/QMviyY/NrspOhY+nwKc9Mhn8DhmPANh92HKLDBuIsH1vWHAR7x4ynOskreVU0vTdPNFR4Ebua1cBkicv3D+vcq66GHGbPd1gmy7ZYkUKhKPe/p8xL3eLu7SeVcf+MN7stnGIfzgk70Yw6thTTQrQHqrvmMY= ARC-Message-Signature: i=1; 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Wed, 20 May 2026 19:58:11 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id pcTIMyrtl7h1; Wed, 20 May 2026 19:58:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1779299891; bh=D34oyRalJU7w4zSKMX2VWqqBPYUSTOu3AY/y9/6W9NM=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=TGawOXLCXst5uEC+yv7g2KCMItdGo+/Kvj7urez3RkAKdyQBlOSMvJNUTaRAIh/1q KS8Bh1idQjfW6K777UTQccbVEzRznsMnJxFdGk4ssA8QdNXyewRX3RqAurI5tN3MBS qYh4Le1A4EgCc2VSv7Odgeehf50rqpI4/WQAadMCZvNNj38P/cca4TJy91sd6vqXQ7 yAJDTCNqcNQSaKNuK1H8x0luMMlWzBQ5Acr6a9pQooGRhLW/a+39qJimfg1z36WXZu Z7vHPQ0HJfYbL2XHbFDqSbrQClLPINVwtaS/CVdLGQPvdm5jiSiEaJ6OgK586xV8ce Wl7eNxuAoAmOg== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov , Krzysztof Kozlowski Subject: [PATCH v6 3/6] dt-bindings: phy: realtek,usb2phy.yaml: extend for resets and RTL9607C support Date: Wed, 20 May 2026 22:57:25 +0500 Message-ID: <20260520175728.720877-4-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the "realtek,rtl9607-usb2phy" compatible for USB2 PHY on the RTL9607C SoC series. Add a resets property to properties to describe the usb2phy reset line. In RTL9607C, USB2 PHY reset line is from "IP Enable controller" which is multipurpose and handle activating various SoC peripherals. It is unclear whether RTD SoCs have something similar to that so set the resets to false for these devices. RTL9607C requires the "resets" to be specified so add the corresponding if check for the "realtek,rtl9607-usb2phy" compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rustam Adilov --- .../bindings/phy/realtek,usb2phy.yaml | 25 ++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/D= ocumentation/devicetree/bindings/phy/realtek,usb2phy.yaml index 9911ada39ee7..7b50833c8e19 100644 --- a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml @@ -11,7 +11,8 @@ maintainers: - Stanley Chang =20 description: | - Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoC= s. + Realtek USB 2.0 PHY support the digital home center (DHC) RTD and + RTL9607C series SoCs. The USB 2.0 PHY driver is designed to support the XHCI controller. The S= oCs support multiple XHCI controllers. One PHY device node maps to one XHCI controller. @@ -57,6 +58,12 @@ description: | XHCI controller#1 -- usb2phy -- phy#0 XHCI controller#2 -- usb2phy -- phy#0 =20 + RTL9607C SoCs USB + The USB architecture includes OHCI and EHCI controllers. + Both of them map to one USB2.0 PHY. + OHCI controller#0 -- usb2phy -- phy#0 + EHCI controller#0 -- usb2phy -- phy#0 + properties: compatible: enum: @@ -69,6 +76,7 @@ properties: - realtek,rtd1395-usb2phy-2port - realtek,rtd1619-usb2phy - realtek,rtd1619b-usb2phy + - realtek,rtl9607-usb2phy =20 reg: items: @@ -130,6 +138,9 @@ properties: minimum: -8 maximum: 8 =20 + resets: + maxItems: 1 + required: - compatible - reg @@ -157,6 +168,18 @@ allOf: then: properties: realtek,driving-level-compensate: false + - if: + properties: + compatible: + contains: + enum: + - realtek,rtl9607-usb2phy + then: + required: + - resets + else: + properties: + resets: false =20 additionalProperties: false =20 --=20 2.54.0 From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B20F3FBB7D; Wed, 20 May 2026 17:58:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299899; cv=none; b=P26QsW6NtrjisHuwDyzdX04nhYsG+EUo4vsZRBbISnKgd3EhOPnQmmdWkPdNh6soeGgbKJM6Wc2zRULO7/ISLSLcx9khw8vPJZt2ZKzpsh7OU5syc8pNZRObUzTvCUrul91k4LLStFMKcAFc497qhFUSUt1vN9VAZh16vbn38DE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299899; c=relaxed/simple; bh=qB9qgIkXgUH0uyIWiZuxeaWVLvji8cTXtCmHcSQ8HKA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u8l4QtR556QYexQh8eCh89Wag4FmNVGbrcp9a0fOJJg3qUVY0yL/SSzPEYk6REgMtcz3Wkw04/jaS6qV98i9Yx4JKTxr9eoHBux4ieKkBDKvgLtyqW2IMEKBxhMfzsA36HCaKvoF5lJtb4+iAx1RNd49jxKsbFNMZFb7OFF0/8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=XC7Gbm+F; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="XC7Gbm+F" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 3F118277CB; Wed, 20 May 2026 19:58:15 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id WCZhKAa0FRRZ; Wed, 20 May 2026 19:58:14 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1779299894; bh=qB9qgIkXgUH0uyIWiZuxeaWVLvji8cTXtCmHcSQ8HKA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XC7Gbm+FrV5zZNJM6eohW827Pza2oA0YyeeP8YKlowmjqwpC7zSbKnb5f/JvtaciC 8NyPhMGeaxowrsCl7xKFzWIR+InpbWqRopufvy8o9Eh23xk2vWXioNDMf/SR0kLn3U 2bnAJYl6lXP/TioWv+V+H5wZ8dwIHkVFO5BEcvaj+dMgMCEUen3AUMDJukBbg6lw97 QGptug0pqyF1IblTAhJuh7ghyu3KiV5g99cQ9N7Y2JUs6zHuUo/iXvpyiaNRj6Tw5F Oo5lLV88ZlwBobfD1fnkY7HQY4YA0kSgeR1/VjbsoaNdATcV2njF9WxnpUh2mwG2Qc iEHCsYC2eHLKg== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov , Michael Zavertkin Subject: [PATCH v6 4/6] phy: realtek: usb2: introduce reset controller struct Date: Wed, 20 May 2026 22:57:26 +0500 Message-ID: <20260520175728.720877-5-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In RTL9607C, there is so called "IP Enable Controller" which resemble reset controller with reset lines and is used for various things like USB, PCIE, GMAC and such. Introduce the reset_control struct to this driver to handle deasserting usb2 phy reset line. Make use of the function devm_reset_control_array_get_optional_exclusive() function to get the reset controller and since existing RTD SoCs don't specify the resets we can have a cleaner code. Since the vendor usb driver developed by Realtek doesn't assert the reset line (or in their case clear the register bit), we can reasonably assume reset_control_assert is not needed here. Co-developed-by: Michael Zavertkin Signed-off-by: Michael Zavertkin Signed-off-by: Rustam Adilov --- drivers/phy/realtek/phy-rtk-usb2.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-r= tk-usb2.c index a9e29d2f7e6f..16c5fc3191de 100644 --- a/drivers/phy/realtek/phy-rtk-usb2.c +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -17,6 +17,7 @@ #include #include #include +#include #include =20 /* GUSB2PHYACCn register */ @@ -130,6 +131,7 @@ struct rtk_phy { struct phy_cfg *phy_cfg; int num_phy; struct phy_parameter *phy_parameter; + struct reset_control *phy_rst; =20 struct dentry *debug_dir; }; @@ -676,6 +678,15 @@ static int rtk_phy_init(struct phy *phy) if (!rtk_phy) return -EINVAL; =20 + if (rtk_phy->phy_rst) { + ret =3D reset_control_deassert(rtk_phy->phy_rst); + + if (ret) + return ret; + + usleep_range(5000, 6000); + } + for (i =3D 0; i < rtk_phy->num_phy; i++) ret =3D do_rtk_phy_init(rtk_phy, i); =20 @@ -1059,6 +1070,11 @@ static int rtk_usb2phy_probe(struct platform_device = *pdev) =20 rtk_phy->num_phy =3D phy_cfg->num_phy; =20 + rtk_phy->phy_rst =3D devm_reset_control_array_get_optional_exclusive(dev); + if (IS_ERR(rtk_phy->phy_rst)) + return dev_err_probe(dev, PTR_ERR(rtk_phy->phy_rst), + "usb2 phy resets are not working\n"); + ret =3D parse_phy_data(rtk_phy); if (ret) goto err; --=20 2.54.0 From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 421C13F888B; Wed, 20 May 2026 17:58:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299904; cv=none; b=IH1gDHIlzvwfJMKNkgtft96sg4EDdAGu5vMfAA8SVwFEiNQzbYhErh7wM/Tb3kEnMw/zHzFTppywNBlIqT0h5vHO2tPsPUUfQTQrwrBtbMFBAxkjrly16w4Nx7jV2rLK6nTZSgNYZYO7kZS+4QI+28pxsIlAutScVpI9BjaX2G8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779299904; c=relaxed/simple; bh=ZbyEPoMOTvuwSe4/6HIgtXiQIbzTO+hF9SUk+pBXU9w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hU1uicPIpG/lb9W4nnCCR3mnh/0vuFHOYpG+9Cls7LrtcONHAwYMxC1ZWIJc48FknNaHSdkGr4GVpy89qRvK5mjdHAV8/tRqx+1Yy+mqnkYfBi2vcf9RW2Y6eB+7KS7NZtpVSpdNKcEhW6gKxlD3faNK3OGKgcCKelJJeY3NMjc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=Dt0xbvpj; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="Dt0xbvpj" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 7B50D26DE5; Wed, 20 May 2026 19:58:18 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id kvBXJ340d1Gs; Wed, 20 May 2026 19:58:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1779299897; bh=ZbyEPoMOTvuwSe4/6HIgtXiQIbzTO+hF9SUk+pBXU9w=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Dt0xbvpjTgVJmsvV1CT2Yc3JPffWutXIfH5CDbVl7naSOV7WJlzP3qUCM67rEb2og h2EGpHS8eSSbZ9AVyrJrYhUCkKmbrKv8XkOQuB8Gat5UJ0Tk+rEzmeeGrB1kTrfFpD AYdHeWBP2QB+ZY/zYzKRMzlsL9AOQJ2MBXdF6w6PTo7LIrFNHiRVsnuNPzzzvt7EfA CGm/k2tkDye+F0MsepiBHktJlAQPjb6yfKsXkcbHh3ZLia3kpE30jCyvrnjW0nq+1G Bms47rs5/AOmapKeKyXTfZa2IOAbnbp9otrSuYUIC9j4cq+hlpr8AegXrphZ6MHSGy 3BRIkLuU1EPQw== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov , Michael Zavertkin Subject: [PATCH v6 5/6] phy: realtek: usb2: add support for RTL9607C USB2 PHY Date: Wed, 20 May 2026 22:57:27 +0500 Message-ID: <20260520175728.720877-6-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the usb2 phy of RTL9607C series based SoCs. Add the macros and phy config struct for rtl9607. RTL9607C requires to clear a "force host disconnect" bit in the specific register (which is at an offset from reg_wrap_vstatus) before proceeding with phy parameter writes. Since it belongs into the vstatus register region, it requires the use of added read and write helper functions. Add the bool variable to the driver data struct and hide this whole procedure under the if statement that checks this new variable. Add the appropriate big endian read and write functions for rtl9607 and assign them to its phy config struct. Co-developed-by: Michael Zavertkin Signed-off-by: Michael Zavertkin Signed-off-by: Rustam Adilov --- drivers/phy/realtek/phy-rtk-usb2.c | 58 ++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-r= tk-usb2.c index 16c5fc3191de..69f0f5279b5e 100644 --- a/drivers/phy/realtek/phy-rtk-usb2.c +++ b/drivers/phy/realtek/phy-rtk-usb2.c @@ -26,6 +26,12 @@ #define PHY_VCTRL_SHIFT 8 #define PHY_REG_DATA_MASK 0xff =20 +#define PHY_9607_VSTS_BUSY BIT(17) +#define PHY_9607_NEW_REG_REQ BIT(13) + +#define PHY_9607_FORCE_DISCONNECT_REG 0x10 +#define PHY_9607_FORCE_DISCONNECT_BIT BIT(5) + #define GET_LOW_NIBBLE(addr) ((addr) & 0x0f) #define GET_HIGH_NIBBLE(addr) (((addr) & 0xf0) >> 4) =20 @@ -109,6 +115,7 @@ struct phy_cfg { =20 u32 (*read)(void __iomem *reg); void (*write)(u32 val, void __iomem *reg); + bool force_host_disconnect; }; =20 struct phy_parameter { @@ -146,6 +153,16 @@ static void rtk_usb2phy_write(u32 val, void __iomem *r= eg) writel(val, reg); } =20 +static u32 rtk_usb2phy_read_be(void __iomem *reg) +{ + return ioread32be(reg); +} + +static void rtk_usb2phy_write_be(u32 val, void __iomem *reg) +{ + iowrite32be(val, reg); +} + /* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ static inline int page_addr_to_array_index(u8 addr) { @@ -600,6 +617,19 @@ static int do_rtk_phy_init(struct rtk_phy *rtk_phy, in= t index) goto do_toggle; } =20 + if (phy_cfg->force_host_disconnect) { + /* disable force-host-disconnect */ + void __iomem *vstatus =3D phy_reg->reg_wrap_vstatus; + u32 temp; + + temp =3D phy_reg->read(vstatus + PHY_9607_FORCE_DISCONNECT_REG); + + temp &=3D ~PHY_9607_FORCE_DISCONNECT_BIT; + phy_reg->write(temp, vstatus + PHY_9607_FORCE_DISCONNECT_REG); + + usleep_range(10000, 11000); + } + /* Set page 0 */ phy_data_page =3D phy_cfg->page0; rtk_phy_set_page(phy_reg, 0); @@ -1374,6 +1404,33 @@ static const struct phy_cfg rtd1315e_phy_cfg =3D { .write =3D rtk_usb2phy_write, }; =20 +static const struct phy_cfg rtl9607_phy_cfg =3D { + .page0_size =3D MAX_USB_PHY_PAGE0_DATA_SIZE, + .page0 =3D { [0] =3D {0xe0, 0x95}, + [4] =3D {0xe4, 0x6a}, + [12] =3D {0xf3, 0x31}, }, + .page1_size =3D MAX_USB_PHY_PAGE1_DATA_SIZE, + .page1 =3D { [0] =3D {0xe0, 0x26}, }, + .page2_size =3D MAX_USB_PHY_PAGE2_DATA_SIZE, + .page2 =3D { [7] =3D {0xe7, 0x33}, }, + .num_phy =3D 1, + .check_efuse_version =3D CHECK_EFUSE_V2, + .efuse_dc_driving_rate =3D EFUS_USB_DC_CAL_RATE, + .dc_driving_mask =3D 0x1f, + .efuse_dc_disconnect_rate =3D EFUS_USB_DC_DIS_RATE, + .dc_disconnect_mask =3D 0xf, + .usb_dc_disconnect_at_page0 =3D true, + .do_toggle =3D true, + .driving_updated_for_dev_dis =3D 0x8, + .is_double_sensitivity_mode =3D true, + .vstatus_offset =3D 0xc, + .vstatus_busy =3D PHY_9607_VSTS_BUSY, + .new_reg_req =3D PHY_9607_NEW_REG_REQ, + .read =3D rtk_usb2phy_read_be, + .write =3D rtk_usb2phy_write_be, + .force_host_disconnect =3D true, +}; + static const struct of_device_id usbphy_rtk_dt_match[] =3D { { .compatible =3D "realtek,rtd1295-usb2phy", .data =3D &rtd1295_phy_cfg }, { .compatible =3D "realtek,rtd1312c-usb2phy", .data =3D &rtd1312c_phy_cfg= }, @@ -1384,6 +1441,7 @@ static const struct of_device_id usbphy_rtk_dt_match[= ] =3D { { .compatible =3D "realtek,rtd1395-usb2phy-2port", .data =3D &rtd1395_phy= _cfg_2port }, { .compatible =3D "realtek,rtd1619-usb2phy", .data =3D &rtd1619_phy_cfg }, { .compatible =3D "realtek,rtd1619b-usb2phy", .data =3D &rtd1619b_phy_cfg= }, + { .compatible =3D "realtek,rtl9607-usb2phy", .data =3D &rtl9607_phy_cfg }, {}, }; MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); --=20 2.54.0 From nobody Sun May 24 22:33:46 2026 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CB943FC5CA; Wed, 20 May 2026 17:58:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="heVl+B+T" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 6A746277FF; Wed, 20 May 2026 19:58:21 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id uewAjqfCNRrl; Wed, 20 May 2026 19:58:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1779299900; bh=i3OzWIEXdFwM3ZDGDOHhTGJfsv6YbfoWvLpJPcKy9QU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=heVl+B+T3XhjLIYE4U2Vr8H1QlP/ZswiZWlHEhrcgRw9KMQlNDh4uWFe7OmW4vFMH N0F8Q++TnD5wDekf4cyJxRWJgEV1uzy3hDUZbMDvL1YfLBg89RUVD4vbz1SvS6ahhP KFjzsgzt7Hdr8UPVSlsW1i6lb+aYhSZXdWJCG/QYMzo0TRXp1h/7+D03hmZHJ8pXGC LXNsN9ER49Ihh51aq+K4o8Q1tX48cwQXd1VAvDUcgw8tWsUKOIqpmt3/ytwMj/Dgw5 EIA1mYo527PQfQeOxwRHaBAKYT6GWYtucY1bCyLthw3o2A+inQxYIUfi30Fy9Cdbhi YZufWycaJs56w== From: Rustam Adilov To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanley Chang , Philipp Zabel , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rustam Adilov Subject: [PATCH v6 6/6] phy: realtek: Make configs available for MACH_REALTEK_RTL Date: Wed, 20 May 2026 22:57:28 +0500 Message-ID: <20260520175728.720877-7-adilov@disroot.org> In-Reply-To: <20260520175728.720877-1-adilov@disroot.org> References: <20260520175728.720877-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the MACH_REALTEK_RTL to the if statement to make the config options available for Realtek RTL SoCs as well. Signed-off-by: Rustam Adilov --- drivers/phy/realtek/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/realtek/Kconfig b/drivers/phy/realtek/Kconfig index 75ac7e7c31ae..76f9215d8b94 100644 --- a/drivers/phy/realtek/Kconfig +++ b/drivers/phy/realtek/Kconfig @@ -3,7 +3,7 @@ # Phy drivers for Realtek platforms # =20 -if ARCH_REALTEK || COMPILE_TEST +if ARCH_REALTEK || MACH_REALTEK_RTL || COMPILE_TEST =20 config PHY_RTK_RTD_USB2PHY tristate "Realtek RTD USB2 PHY Transceiver Driver" @@ -29,4 +29,4 @@ config PHY_RTK_RTD_USB3PHY DWC3 USB IP. This driver will do the PHY initialization of the parameters. =20 -endif # ARCH_REALTEK || COMPILE_TEST +endif # ARCH_REALTEK || MACH_REALTEK_RTL || COMPILE_TEST --=20 2.54.0