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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f19775c97sm21990803b3a.15.2026.05.20.07.18.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2026 07:18:38 -0700 (PDT) From: Sibi Sankar To: robh@kernel.org, srini@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mohammad Rafi Shaik , Konrad Dybcio Subject: [PATCH V8 1/2] arm64: dts: glymur: Add LPASS macro codecs and pinctrl Date: Wed, 20 May 2026 19:48:27 +0530 Message-Id: <20260520141828.2724689-2-sibi.sankar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com> References: <20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDEzOSBTYWx0ZWRfX2C/NP+owegDY UQzI3bCNpMqTRbzYpCaf2u9JoRPCL4WemT5T9+1QXx3Aj0gPDSb7TtiHySlCr7kv/RW3aHwFdUV S2Jmt6/DO7K7CvZFK1CjAkkgum78h0yBuK4IFVdCxC4qAxe7vt94G7QU/n1ETe/V//SXg7MKylX J6uIQZs9s4wxgD01syWO9VFSBv8c/DCjnbVHamvy6JA1masbbTTWb2g9GOI3K8wREg7t/9JZGVK Ti/JFCIETCNzU6qLtHECkjipkURF/WoW1jVVY8eM5k7B1wCiyJzUhtz4dSQ6AJ7PfPzkiMRmt96 GIMQl1OOQlTnAe/T+zZdWzVyWcClFUDpgS7DaPBxIbRdNRGIpFRpn0SeCNS7sjDVYWpVMoZNJqH 02lu8KIrsDuH4vM6w7rkCs319KjtNyZlUMU8YgKgq/HTOlpkgklPljBa5CLR5fQCCDmUV0tyn8e dzKaZOLpoSicGiKqkNA== X-Authority-Analysis: v=2.4 cv=N9cZ0W9B c=1 sm=1 tr=0 ts=6a0dc2c0 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=mx1dUFmayEYO8tNA33gA:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-GUID: 5iYluuJJnZ5pkUh1Bm1xtmsxAVuKLxZC X-Proofpoint-ORIG-GUID: 5iYluuJJnZ5pkUh1Bm1xtmsxAVuKLxZC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200139 Content-Type: text/plain; charset="utf-8" From: Srinivas Kandagatla Add LPASS macro codecs and LPASS TLMM pin controller on Qualcomm glymur for proper sound support. Also add GPR (Generic Pack router) node along with APM (Audio Process Manager) and PRM (Proxy resource Manager) audio services. Co-developed-by: Mohammad Rafi Shaik Signed-off-by: Mohammad Rafi Shaik Signed-off-by: Srinivas Kandagatla Signed-off-by: Sibi Sankar Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/glymur.dtsi | 263 +++++++++++++++++++++++++++ 1 file changed, 263 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qco= m/glymur.dtsi index 72c7dc6e4f09..f89b9c3b5452 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -20,7 +20,9 @@ #include #include #include +#include #include +#include #include =20 #include "glymur-ipcc.h" @@ -3891,9 +3893,138 @@ compute-cb@8 { dma-coherent; }; }; + + gpr { + compatible =3D "qcom,gpr"; + qcom,glink-channels =3D "adsp_apps"; + qcom,domain =3D ; + qcom,intents =3D <512 20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + q6apm: service@1 { + compatible =3D "qcom,q6apm"; + reg =3D ; + #sound-dai-cells =3D <0>; + qcom,protection-domain =3D "avs/audio", + "msm/adsp/audio_pd"; + + q6apmbedai: bedais { + compatible =3D "qcom,q6apm-lpass-dais"; + #sound-dai-cells =3D <1>; + }; + + q6apmdai: dais { + compatible =3D "qcom,q6apm-dais"; + iommus =3D <&apps_smmu 0x1001 0x80>, + <&apps_smmu 0x1061 0x20>; + }; + }; + + q6prm: service@2 { + compatible =3D "qcom,q6prm"; + reg =3D ; + qcom,protection-domain =3D "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible =3D "qcom,q6prm-lpass-clocks"; + #clock-cells =3D <2>; + }; + }; + }; }; }; =20 + swr0: soundwire@6c80000 { + compatible =3D "qcom,soundwire-v3.1.0"; + reg =3D <0x0 0x06c80000 0x0 0x10000>; + interrupts =3D ; + clocks =3D <&lpass_wsamacro>; + clock-names =3D "iface"; + label =3D "WSA"; + + pinctrl-0 =3D <&wsa_swr_active>; + pinctrl-names =3D "default"; + + qcom,ports-block-pack-mode =3D /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 = 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>; + qcom,ports-word-length =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08= 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>; + qcom,ports-offset1 =3D /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0x= ff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>; + qcom,ports-offset2 =3D /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0x= ff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-sinterval =3D /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8= 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >; + qcom,ports-hstart =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xf= f 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff= 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xf= f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xf= f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + #address-cells =3D <2>; + #size-cells =3D <0>; + #sound-dai-cells =3D <1>; + status =3D "disabled"; + }; + + lpass_wsamacro: codec@6c90000 { + compatible =3D "qcom,glymur-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-ma= cro"; + reg =3D <0x0 0x06c90000 0x0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_= COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + sound-name-prefix =3D "WSA"; + }; + + swr3: soundwire@6ca0000 { + compatible =3D "qcom,soundwire-v3.1.0"; + reg =3D <0x0 0x06ca0000 0x0 0x10000>; + interrupts =3D ; + clocks =3D <&lpass_wsa2macro>; + clock-names =3D "iface"; + label =3D "WSA2"; + + pinctrl-0 =3D <&wsa2_swr_active>; + pinctrl-names =3D "default"; + + qcom,ports-block-pack-mode =3D /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 = 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x01>; + qcom,ports-word-length =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08= 0xff 0xff 0xff 0xff 0xff 0xff 0x18 0x18 0xff 0xff>; + qcom,ports-offset1 =3D /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0x= ff 0xff 0xff 0xff 0x06 0x0d 0x0 0x19 0x06 0x06>; + qcom,ports-offset2 =3D /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0x= ff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-sinterval =3D /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0xc8= 0xff 0xff 0xff 0xff 0x0f 0x0f 0x31f 0x31f 0x0f 0x0f >; + qcom,ports-hstart =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xf= f 0xff 0xff 0xff 0xff 0xff 0xf 0xf 0xff 0xff>; + qcom,ports-hstop =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff= 0xff 0xff 0xff 0xff 0xff 0x0f 0x0f 0xff 0xff>; + qcom,ports-lane-control =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xf= f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-block-group-count =3D /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xf= f 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + + #address-cells =3D <2>; + #size-cells =3D <0>; + #sound-dai-cells =3D <1>; + status =3D "disabled"; + }; + + lpass_wsa2macro: codec@6cb0000 { + compatible =3D "qcom,glymur-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-ma= cro"; + reg =3D <0x0 0x06cb0000 0x0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE= _COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "wsa2-mclk"; + #sound-dai-cells =3D <1>; + sound-name-prefix =3D "WSA2"; + }; + lpass_lpiaon_noc: interconnect@7400000 { compatible =3D "qcom,glymur-lpass-lpiaon-noc"; reg =3D <0x0 0x07400000 0x0 0x19080>; @@ -3908,6 +4039,138 @@ lpass_lpicx_noc: interconnect@7420000 { #interconnect-cells =3D <2>; }; =20 + lpass_vamacro: codec@7660000 { + compatible =3D "qcom,glymur-lpass-va-macro", "qcom,sm8550-lpass-va-macr= o"; + reg =3D <0x0 0x07660000 0x0 0x2000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "mclk", + "macro", + "dcodec"; + + #clock-cells =3D <0>; + clock-output-names =3D "fsgen"; + #sound-dai-cells =3D <1>; + }; + + lpass_tlmm: pinctrl@7760000 { + compatible =3D "qcom,glymur-lpass-lpi-pinctrl", "qcom,sm8650-lpass-lpi-= pinctrl"; + reg =3D <0x0 0x07760000 0x0 0x20000>; + + clocks =3D <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "core", "audio"; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 23>; + + tx_swr_active: tx-swr-active-state { + clk-pins { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio1", "gpio2"; + function =3D "swr_tx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + rx_swr_active: rx-swr-active-state { + clk-pins { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + dmic01_default: dmic01-default-state { + clk-pins { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio7"; + function =3D "dmic1_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic23_default: dmic23-default-state { + clk-pins { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio9"; + function =3D "dmic2_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + wsa_swr_active: wsa-swr-active-state { + clk-pins { + pins =3D "gpio10"; + function =3D "wsa_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio11"; + function =3D "wsa_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f19775c97sm21990803b3a.15.2026.05.20.07.18.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2026 07:18:43 -0700 (PDT) From: Sibi Sankar To: robh@kernel.org, srini@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mohammad Rafi Shaik , Konrad Dybcio Subject: [PATCH V8 2/2] arm64: dts: qcom: glymur-crd: add Audio sound card node Date: Wed, 20 May 2026 19:48:28 +0530 Message-Id: <20260520141828.2724689-3-sibi.sankar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com> References: <20260520141828.2724689-1-sibi.sankar@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=bfhbluPB c=1 sm=1 tr=0 ts=6a0dc2c4 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=Q9KsY8QRZZO8mUXd1LsA:9 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-GUID: astVhvvcgyZS7-2j-Q06Z5dnmTL_PvSq X-Proofpoint-ORIG-GUID: astVhvvcgyZS7-2j-Q06Z5dnmTL_PvSq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDEzOSBTYWx0ZWRfX3WSlU0m+hocp bFBSAp26JolVMEqG1YwJlCXy1kgMNMzxQ7uxeUXzNKshnP+LZVoG4S92AT1QvoOMgWO8cpzBazP VQF4qYQXdLzuW2oZnDSz2LYepsS2iq6PU7s9ALAjdz6OvdZalBqjAbTtsk3CvlbVWavNtxrGx30 UoWwNZtKdFIBLpPCE3nn32FYB58dASkovLakffRNZsXymTrJIt6Wy60Q6hUyU3InPXB05CqFVYK 0LvE1Rlr6CJgmpb62j2gyKZraWdlCetXBGQESxdzlHUIY+oUtNRyovzcaqlgF+rbj/hnNd4qq/I RV/ccIcx8YijferSIJkTSc0MLF2qdWmmuC7508bDhSohKsCIwhWbL8T8JJxqp7q1yy4gyCuaVUN kLP7EzAbU4g07mLe0J4b8DP7/eZY1Tu6hgFuocaY9KBXmdsxZTye5MUNjaR5he7RQtTee99qQ7+ xuE9JZNizNtFFO6SqSA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 adultscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200139 Content-Type: text/plain; charset="utf-8" From: Srinivas Kandagatla Add the sound card of Glymur-crd board with the routing for speakers. Add device nodes for the sound support with WSA884x smart speakers and playback via speakers and recording via DMIC microphones. Co-developed-by: Mohammad Rafi Shaik Signed-off-by: Mohammad Rafi Shaik Signed-off-by: Srinivas Kandagatla Signed-off-by: Sibi Sankar Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 110 +++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts= /qcom/glymur-crd.dtsi index e784b538f42e..4c00d09f766c 100644 --- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi @@ -68,6 +68,54 @@ switch-lid { }; }; =20 + sound { + compatible =3D "qcom,glymur-sndcard"; + model =3D "GLYMUR-CRD"; + audio-routing =3D "wooferleft in", "wsa wsa_spk1 out", + "tweeterleft in", "wsa wsa_spk2 out", + "wooferright in", "wsa2 wsa_spk2 out", + "tweeterright in", "wsa2 wsa_spk2 out", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb", + "VA DMIC2", "vdd-micb", + "VA DMIC3", "vdd-micb"; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai =3D <&left_woofer>, <&left_tweeter>, + <&swr0 0>, <&lpass_wsamacro 0>, + <&right_woofer>, <&right_tweeter>, + <&swr3 0>, <&lpass_wsa2macro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + va-dai-link { + link-name =3D "VA Capture"; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + vreg_nvme: regulator-nvme { compatible =3D "regulator-fixed"; =20 @@ -444,6 +492,12 @@ vreg_l4h_e0_1p2: ldo4 { }; }; =20 +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>; + pinctrl-names =3D "default"; + qcom,dmic-sample-rate =3D <4800000>; +}; + &pcie3b { vddpe-3v3-supply =3D <&vreg_nvmesec>; =20 @@ -571,6 +625,62 @@ &pon_resin { status =3D "okay"; }; =20 +&swr0 { + status =3D "okay"; + + /* WSA8845, Left Woofer */ + left_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferLeft"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <1 2 3 7 12 14>; + }; + + /* WSA8845, Left Tweeter */ + left_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterLeft"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <4 5 6 7 13 15>; + }; +}; + +&swr3 { + status =3D "okay"; + + /* WSA8845, Right Woofer */ + right_woofer: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "WooferRight"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <1 2 3 7 12 14>; + }; + + /* WSA8845, Right Tweeter */ + right_tweeter: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "TweeterRight"; + vdd-1p8-supply =3D <&vreg_l15b_e0_1p8>; + vdd-io-supply =3D <&vreg_l18b_e0_1p2>; + qcom,port-mapping =3D <4 5 6 7 13 15>; + }; +}; + &remoteproc_adsp { firmware-name =3D "qcom/glymur/adsp.mbn", "qcom/glymur/adsp_dtb.mbn"; --=20 2.34.1