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Wed, 20 May 2026 16:40:41 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:05 +0200 Subject: [PATCH 01/11] drm/panel: edp: Add LG LP129WT232166 panel Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-1-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1891; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=tHgNfvGMlnmFZXZkNh+6YfvXvVf/DcuqMDaolZYKux8=; b=G/9cCj3ftv34zFnJlbaPYRueYnY93DaRgqWvlQmn4g8AN4468H6z5LNKpCulkpXEHlhv/FEYw AZCDq7GoWC2AYPBdFB48f2yYeFpzFBCtzxI26eYDx04W7qgBCXU667Z X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Add an entry for the eDP LG LP129WT232166 panel used in the Microsoft Surface Pro 9 5G. edid-decode (hex): 00 ff ff ff ff ff ff 00 30 e4 b2 06 a1 25 10 00 00 1f 01 04 a5 1b 12 78 01 ef 70 a7 51 4c a8 26 0e 4f 53 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fd 00 18 78 f1 f1 48 01 0a 20 20 20 20 20 20 00 00 00 fe 00 4c 47 44 5f 4d 50 31 2e 30 5f 0a 20 20 00 00 00 fe 00 4c 50 31 32 39 57 54 32 33 32 31 36 36 01 23 70 13 79 00 00 03 01 14 56 16 01 88 3f 0b 4f 00 07 80 1f 00 7f 07 55 00 47 00 07 00 03 01 14 56 16 01 08 3f 0b 4f 00 07 80 1f 00 7f 07 2b 08 47 00 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2c 90 Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 679f4af5246d8a984387002c3fb0c6283cc21cb2..7eff79e80fa0578755a0b688cf7= 92f58d8abcbe5 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -2080,6 +2080,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown= "), EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown= "), EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown= "), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x06b2, &delay_200_500_e200_d200, "LP129WT= 232166"), EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"= ), =20 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3715636308D; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-2-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=3493; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=qcsZWoxgvAPoNCEU3iLxOiyoEaAbYrCyLBf3CtjwWsI=; b=pg6Ci5b4cO+EwOsQYRLjgYTLWy1eAa40DvuFHFVwe/4NIQi3pUQuOu86a9d3eA4CSrvGmoFHC v2RdHso2LUPAHPU8MgHtwkURigBe0K8SeN32HZCFnR6XjAwnsRTkO8T X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Add backlight nodes and enable backlight so that it can be controlled with the corresponding buttons found on Surface Pro Type Cover keyboards. The nodes are almost identical to the ones from the ThinkPad X13s with a different enable GPIO for the vreg_edp_bl node. The difference was found by looking at the output of /sys/kernel/debug/gpio on the ThinkPad X13s to see the properties of its enable gpio9: gpiochip1: GPIOs 742-751, parent: platform/c440000.spmi:pmic@1:gpio@8800,= c440000.spmi:pmic@1:gpio@8800: ... gpio9 : out high normal vin-1 pull-down 10uA push-pull m= edium atest-1 dtest-0 ... The same gpio9 on the Surface Pro 9 5G has different properties: gpiochip0: 10 GPIOs, parent: platform/c440000.spmi:pmic@1:gpio@8800, c440= 000.spmi:pmic@1:gpio@8800: ... gpio9 : in high normal vin-1 pull-up 30uA push-pull l= ow atest-1 dtest-0 ... Looking for a match on the Surface Pro 9 5G pointed to this only one: gpiochip2: 10 GPIOs, parent: platform/c440000.spmi:pmic@3:gpio@8800, c440= 000.spmi:pmic@3:gpio@8800: ... gpio6 : out high normal vin-1 pull-down 10uA push-pull m= edium atest-1 dtest-0 ... Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 49 ++++++++++++++++++= ++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index f2b4470d4407fb5b6a3dbac8bc972c010c31bd06..14287092fb07ea15e527fd318f7= ea2155448b26c 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -46,6 +46,16 @@ wcd938x: audio-codec { #sound-dai-cells =3D <1>; }; =20 + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pmc8280c_lpg 3 1000000>; + enable-gpios =3D <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>; + power-supply =3D <&vreg_edp_bl>; + + pinctrl-0 =3D <&edp_bl_en>, <&edp_bl_pwm>; + pinctrl-names =3D "default"; + }; + pmic-glink { compatible =3D "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; =20 @@ -127,6 +137,22 @@ pmic_glink_con1_sbu: endpoint { }; }; =20 + vreg_edp_bl: regulator-edp-bl { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_BL"; + regulator-min-microvolt =3D <3600000>; + regulator-max-microvolt =3D <3600000>; + + gpio =3D <&pmc8280c_gpios 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_bl_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + vreg_nvme: regulator-nvme { compatible =3D "regulator-fixed"; =20 @@ -553,6 +579,10 @@ &pcie4_phy { status =3D "okay"; }; =20 +&pmc8280c_lpg { + status =3D "okay"; +}; + &pmk8280_pon_pwrkey { status =3D "okay"; }; @@ -853,6 +883,13 @@ &lpass_tlmm { status =3D "okay"; }; =20 +&pmc8280_1_gpios { + edp_bl_en: edp-bl-en-state { + pins =3D "gpio8"; + function =3D "normal"; + }; +}; + &pmc8280_2_gpios { wwan_sw_en: wwan-sw-en-state { pins =3D "gpio1"; @@ -860,6 +897,18 @@ wwan_sw_en: wwan-sw-en-state { }; }; =20 +&pmc8280c_gpios { + edp_bl_pwm: edp-bl-pwm-state { + pins =3D "gpio8"; + function =3D "func1"; + }; + + edp_bl_reg_en: edp-bl-reg-en-state { + pins =3D "gpio6"; + function =3D "normal"; + }; +}; + &pmr735a_gpios { hastings_reg_en: hastings-reg-en-state { pins =3D "gpio1"; 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Wed, 20 May 2026 16:40:41 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:07 +0200 Subject: [PATCH 03/11] arm64: dts: qcom: sc8280xp-arcata: Enable the eDP display Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-3-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=5543; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=ldc0TLCvhrzO6UcurjPbFyDeI/OxIDyYi6mefy873oA=; b=P74/w6D9vJWdNC8SZSxpTKm3NCYK6eA8VtY7KbSZ1H1bYHK9Ot79FUFIq0bevBtlsETm8/Ghr eB6Rk8sWlM3AqLIbTAgQYK+8i78M9/ltYac3FTrlo8W4oRQb+Zt/qz6 X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Add the vreg_edp_3p3, edp_reg_en and mdss0_dp3 nodes to enable the Surface Pro 9 5G eDP-based LCD display (LG LP129WT232166). The enable GPIO 36 was found by decompiling AeoB dumps [1]: Package () { "CLOCK", Package () { "gcc_edp3_phy_clkref_en", 0x0000000000000001, }, }, Package () { "FOOTSWITCH", Package () { "mdss_0_disp_cc_mdss_core_gdsc", 0x0000000000000001, 0x0000000000000001, }, }, Package () { "PSTATE_ADJUST", Package () { 0x0000000000000002, 0x0000000000000000, }, }, Package () { "PSTATE_ADJUST", Package () { 0x0000000000000003, 0x0000000000000001, }, }, Package () { "PMICVREGVOTE", Package () { "PPP_RESOURCE_ID_LDO3_B", 0x0000000000000001, 0x0000000000124F80, 0x0000000000000001, 0x0000000000000007, 0x0000000000000000, "HLOS_DRV", "REQUIRED", }, }, Package () { "PMICVREGVOTE", Package () { "PPP_RESOURCE_ID_LDO6_B", 0x0000000000000001, 0x00000000000D6D80, 0x0000000000000001, 0x0000000000000007, 0x0000000000000000, "HLOS_DRV", "REQUIRED", }, }, Package () { "TLMMGPIO", Package () { 0x0000000000000024, <=3D=3D GPIO 36 0x0000000000000001, 0x0000000000000000, 0x0000000000000001, 0x0000000000000000, 0x0000000000000000, }, }, [1] https://github.com/alexVinarskis/qcom-aeob-dumps/blob/master/microsoft-= surface-pro-9-5G-1996/qcdxkmext8280_ARC_part2.json#L156-L168 Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 64 ++++++++++++++++++= ++-- 1 file changed, 59 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 14287092fb07ea15e527fd318f7ea2155448b26c..7f1cc1899002529b7ac7340974c= 99f6ed493d410 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -137,6 +137,22 @@ pmic_glink_con1_sbu: endpoint { }; }; =20 + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 36 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + vreg_edp_bl: regulator-edp-bl { compatible =3D "regulator-fixed"; =20 @@ -361,7 +377,6 @@ vreg_l6b: ldo6 { regulator-max-microvolt =3D <880000>; regulator-initial-mode =3D ; regulator-boot-on; - regulator-always-on; // FIXME: VDD_A_EDP_0_0P9 }; }; =20 @@ -465,10 +480,6 @@ &dispcc0 { status =3D "okay"; }; =20 -&dispcc1 { - status =3D "okay"; -}; - &gpi_dma0 { status =3D "okay"; }; @@ -511,6 +522,42 @@ &mdss0_dp1_out { remote-endpoint =3D <&usb_1_qmpphy_dp_in>; }; =20 +&mdss0_dp3 { + compatible =3D "qcom,sc8280xp-edp"; + /delete-property/ #sound-dai-cells; + + data-lanes =3D <0 1 2 3>; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + + backlight =3D <&backlight>; + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss0_dp3_out>; + }; + }; + }; + }; +}; + +&mdss0_dp3_out { + remote-endpoint =3D <&edp_panel_in>; +}; + +&mdss0_dp3_phy { + compatible =3D "qcom,sc8280xp-edp-phy"; + vdda-phy-supply =3D <&vreg_l6b>; + vdda-pll-supply =3D <&vreg_l3b>; + + status =3D "okay"; +}; + &pcie2a { perst-gpios =3D <&tlmm 143 GPIO_ACTIVE_LOW>; wake-gpios =3D <&tlmm 145 GPIO_ACTIVE_LOW>; @@ -932,6 +979,13 @@ hstp-sw-ctrl-pins { }; }; =20 + edp_reg_en: edp-reg-en-state { + pins =3D "gpio36"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + nvme_reg_en: nvme-reg-en-state { pins =3D "gpio135"; function =3D "gpio"; --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49078363C74; 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a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Define the USB-C orientation GPIOs so that the USB-C ports orientation is known without having to resort to the alt mode notifications. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne --- arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 7f1cc1899002529b7ac7340974c99f6ed493d410..49c0ecfc6c055ef2cd85db022d9= 340ecb88b7fc4 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -61,6 +61,8 @@ pmic-glink { =20 #address-cells =3D <1>; #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 166 GPIO_ACTIVE_HIGH>, + <&tlmm 49 GPIO_ACTIVE_HIGH>; =20 /* Left-side top port */ connector@0 { --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D43A367B8D; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; cv=none; b=WsUDfzHuFtRkQLmC2D2YpfB3jspf1Y9cvpuPlJhtPnmkRLMGb+ChvLzB9YI7aBbXsLwhqfMQSdIz4zuolg1Lkmk8s0ujfWuhpaOTTej5QKe1QsxOHe1AH0YAOoOIXicb7bYB06xQIH63RQ/PNZwQfRQJhwn0rDXhph4SmlLf1Oc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; c=relaxed/simple; bh=T7ixgJATbtiNqWCiShqQhrQpfemSzKpwMeeRfU+mkZI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=S/ZEtoUJEqgYOIGSrbVHmym73U/yZd6VPI+BBio5UyVLEPbIvNUB77CrC5W4kOFCb/qa+Lr+zFm6MBrzqFVUhAoVmmRMqQ7s7Y8T5lM8dRjXCBJ1Id8/bkPJJkhBr8+0LcqPNYMPQxbY0u9FVCLbUFxmk4uMLQgSoTzI2rT5SEU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Od3vVqIC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Od3vVqIC" Received: by smtp.kernel.org (Postfix) with ESMTPS id 22214C2BCF5; Wed, 20 May 2026 16:40:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779295242; bh=T7ixgJATbtiNqWCiShqQhrQpfemSzKpwMeeRfU+mkZI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Od3vVqICKDYQkDCwvE3Fl20ylnBWY5UucRCCEWHD8CsvrLX9fxEbVpL8bRHykcTmv PnlN1fqK7W+OomO9Cko8dthzBBHa/pfXnb2NUDWGtH0QnFJP7KbKDwMdgO8Vzy/GcF COY0pYikMkAhkyqktaBFE3l3+hEk1io+SJnFDT70bbZuZ0yi7pzv/Px7Bv1VLB7n9d uu1piYhyJ5jmh/4c972gn/2qFPA37Hkl+m8py4nwYRxaU0S1DECfb4+vApmtWCV+a7 XXXb9DMQM0cvJNYvQyI1MIQGi5OTv6FS8QACcHvD8tyKb81h0jjPSjhjeDCSrLxTtX trTO/o0QSaJDA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19616CD5BAB; Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:09 +0200 Subject: [PATCH 05/11] arm64: dts: qcom: sc8280xp-arcata: Fix top USB-C DP alt mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-5-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Jens Glathe X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1796; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=laHptHDVcqodWotuInI4TOhBzYCitWFmkNnL90r2puk=; b=ELGTpbD9se5Jeclc7Z5xfOhf29cTYVC0764Fc3jfUQH3LSJDDj6Pe2ah4ok9/i2Q5vEoQT5ep 9Q0nCe0e86TC7VwgFU+gILU9Hf54Np/JLzKhTJNbSgbtvG6GU4VowFY X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne The top USB-C port (usb0) didn't switch to DP alt mode, as reusing the same GPIO 101 as on the SC8280XP CRD or Lenovo ThinkPad X13s was not working on the Surface Pro 9 5G. Investigation [1] by Jens on the Windows Dev Kit (WDK2023), the other sc8280xp-based "blackrock" model from Microsoft, found a reference to GPIO 100 in the DSDT in addition to 101. Switching to GPIO 100 fixed the issue on blackrock, as it does on arcata to enable external screen when using the left-side top USB-C port. [1] https://lore.kernel.org/all/20250609-blackrock-usb0-mux-v1-1-7903c3b071= e4@oldschoolsolutions.biz/ Cc: Jens Glathe Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Fixes: f6231a2eefd4 ("arm64: dts: qcom: sc8280xp: Add Microsoft Surface Pro= 9 5G") Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 49c0ecfc6c055ef2cd85db022d9340ecb88b7fc4..50fabf8961fd9869a31f24a69da= 854348fc1d891 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -287,7 +287,7 @@ map1 { usb0-sbu-mux { compatible =3D "pericom,pi3usb102", "gpio-sbu-mux"; =20 - enable-gpios =3D <&tlmm 101 GPIO_ACTIVE_LOW>; + enable-gpios =3D <&tlmm 100 GPIO_ACTIVE_LOW>; select-gpios =3D <&tlmm 164 GPIO_ACTIVE_HIGH>; =20 pinctrl-0 =3D <&usb0_sbu_default>; @@ -1101,7 +1101,7 @@ tx-pins { =20 usb0_sbu_default: usb0-sbu-state { oe-n-pins { - pins =3D "gpio101"; + pins =3D "gpio100"; function =3D "gpio"; bias-disable; drive-strength =3D <16>; --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CA2B369D75; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; cv=none; b=YkrgoLLW7ZK4CDyAxKgkRrUBLr4SQTBcYtlz62vgOqQ4RSuAe3x+ZS60YaJ2ANoilVBb8w7Sds1X8zDC2dhiHfMeXT0BotpXJmP/cf8GwJ+MqpLJbnCwfBLJOi0f/0DYoMugVmxhaPUdjiyXcPLBz3Kx9hZ1WD5ljDWHeQ4MYPs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; c=relaxed/simple; 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Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:10 +0200 Subject: [PATCH 06/11] arm64: dts: qcom: sc8280xp-arcata: Enable 4-lane DP support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-6-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1393; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=lx3J4+zo7ps3uLQCVIV3pGEVqoBsZItSFhoKbcfiTCg=; b=UJ+0yhSN8wqwRTeGTEi6CzBvgxYny24Cq9h7WaaY4w+DDYCekAJjxnC2ItUVuRyz8wZxvlQha c254UOXT1DmAh82VQIxWTi1xIIcjC9ZLC3UaQdZ7xXj2l09yDieRNtc X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Allow up to 4 lanes for the DisplayPort link from the PHYs to the controllers and allow mode-switch events to reach the QMP Combo PHYs for the 2 left-side USB-C ports. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 50fabf8961fd9869a31f24a69da854348fc1d891..2a6f0c9de7c85a4f0659237846b= 0430a0b021a40 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -511,7 +511,7 @@ &mdss0_dp0 { }; =20 &mdss0_dp0_out { - data-lanes =3D <0 1>; + data-lanes =3D <0 1 2 3>; remote-endpoint =3D <&usb_0_qmpphy_dp_in>; }; =20 @@ -520,7 +520,7 @@ &mdss0_dp1 { }; =20 &mdss0_dp1_out { - data-lanes =3D <0 1>; + data-lanes =3D <0 1 2 3>; remote-endpoint =3D <&usb_1_qmpphy_dp_in>; }; =20 @@ -857,6 +857,7 @@ &usb_0_qmpphy { vdda-phy-supply =3D <&vreg_l9d>; vdda-pll-supply =3D <&vreg_l4d>; =20 + mode-switch; orientation-switch; =20 status =3D "okay"; @@ -894,6 +895,7 @@ &usb_1_qmpphy { vdda-phy-supply =3D <&vreg_l4b>; vdda-pll-supply =3D <&vreg_l3b>; =20 + mode-switch; orientation-switch; =20 status =3D "okay"; --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A84436E460; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; cv=none; b=Ez6Va0zOvhHK1sgfpIlmWj8TjDPTDQDxLnLlXDNrnMxc+M/hW+fnYSiiwzn8TrzM/T4tQJE9vf/sbIpk8TYnR37/fZ1cb9oNxWi6LbMOLzJL8cf6Ixl816nz8S5DOlQfldWVysnninyB5RuEoZ9cfGgBj75PkGAnAfcmMB25AZQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; c=relaxed/simple; bh=yjbTv7IE3rnG+foAIeVCcQYWym1cEuH3YQsEYTkU92o=; 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Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:11 +0200 Subject: [PATCH 07/11] arm64: dts: qcom: sc8280xp-arcata: Add volume up/down GPIO keys Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-7-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=2039; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=CfiRUKjuOkBz4gm02vzH1uF4ZTJ7kW7Ou28mRmrz7TE=; b=Y/MRBh06KA8oGhSHijX6zyf2PvGCEcP/zUixmH66wBm/zVVlyf3jKtq9AuHmwqKrgUOUPewvp eYV7SvmddAzCbGlo9tR7NQNdmx6UsFCbWIHFlviE3I7VXNzzRbZc4/D X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Configure gpio6 to serve as volume down and gpio9 as volume up to enable the volume up/down keys located at the top of the screen. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 42 ++++++++++++++++++= ++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 2a6f0c9de7c85a4f0659237846b0430a0b021a40..a300069b5960dbba28601c41895= 1869c94b63938 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -6,6 +6,7 @@ /dts-v1/; =20 #include +#include #include =20 #include "sc8280xp.dtsi" @@ -56,6 +57,31 @@ backlight: backlight { pinctrl-names =3D "default"; }; =20 + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&vol_down_n>, <&vol_up_n>; + pinctrl-names =3D "default"; + + key-vol-down { + label =3D "Volume Down"; + gpios =3D <&pmc8280_1_gpios 6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + + key-vol-up { + label =3D "Volume Up"; + gpios =3D <&pmc8280_1_gpios 9 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + }; + pmic-glink { compatible =3D "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; =20 @@ -939,6 +965,22 @@ edp_bl_en: edp-bl-en-state { pins =3D "gpio8"; function =3D "normal"; }; + + vol_down_n: vol-down-n-state { + pins =3D "gpio6"; + function =3D "normal"; + power-source =3D <1>; + input-enable; + bias-pull-up; + }; + + vol_up_n: vol-up-n-state { + pins =3D "gpio9"; + function =3D "normal"; + power-source =3D <1>; + input-enable; + bias-pull-up; + }; }; =20 &pmc8280_2_gpios { --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8213636EAB8; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-8-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1758; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=GHQeiThCwLf6jCuaGumAVOSJSuFkPcBJgAyN9IpZc40=; b=TFq+TLgkt9rh2mmnQxevAtdFZW/mL6bEj3bCiaQuvnsozIHkbcz0PNr48IunEMKbZPEb4babO Rh0qYueURAZD0ClBY6MYkYiNZDPJfD5h1ABfmEBMd1FYvX2voBDBNqM X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Enable the lid switch for the Microsoft Surface Pro 9 5G using GPIO pin 180. Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- .../arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 19 +++++++++++++++= +++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index a300069b5960dbba28601c418951869c94b63938..4daff3a0ecf48ad2081a2fe9891= 0adf0debef88f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -7,6 +7,7 @@ =20 #include #include +#include #include =20 #include "sc8280xp.dtsi" @@ -60,7 +61,7 @@ backlight: backlight { gpio-keys { compatible =3D "gpio-keys"; =20 - pinctrl-0 =3D <&vol_down_n>, <&vol_up_n>; + pinctrl-0 =3D <&hall_int_n_default>, <&vol_down_n>, <&vol_up_n>; pinctrl-names =3D "default"; =20 key-vol-down { @@ -80,6 +81,15 @@ key-vol-up { linux,can-disable; wakeup-source; }; + + switch-lid { + label =3D "lid"; + gpios =3D <&tlmm 180 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; }; =20 pmic-glink { @@ -1032,6 +1042,13 @@ edp_reg_en: edp-reg-en-state { bias-disable; }; =20 + hall_int_n_default: hall-int-n-state { + pins =3D "gpio180"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + nvme_reg_en: nvme-reg-en-state { pins =3D "gpio135"; function =3D "gpio"; --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DDEB375ACB; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; cv=none; b=Op6QY3Pe6wu4q0K4vPDz06e7Em+umQB53d4yOAjgk+sOSwf5p2lZYZFDyL1GtcedG+s2nOOV3MMRfaYy06aS62ZHMuk3IouuY0fuBkK/QV6w3/a2gx7yjGnpHHjaZ1TGdnR5P+k3h2GCYmEuNYlD8lUMIBYEi+Tr2+PuGLIaF1Q= ARC-Message-Signature: i=1; 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b=TD9ubfH7vk30RBTe4LVvL9h0PFgqp5trnWVN01S/AmXemYyuHQMtM3F2ncA+x44B8 gZ5y64j0wTkkd2WyMhF9Emuzqa8RXHJIEEgQmD9dHHuRMc2xPnZlqI1osGuCiHNuYu X4AVin3gfKCIN20KYf0l/M+QfTKxrmOB7XCaNLhZQRjnzl9igfCUbYn6s6SiF8doDZ eJBPEdB22D24rXRrvn5bXyHi5+vVed5Ugt3jbLAnRRAJtldqfTL4/eNK2AVns7UNcL AAFK241N3QbbNLUbObLpxYn/8CA4iOAtPlDLzT3Mw2rPLn0ri+7TW+zbU61SOTq4P6 67A31sVVmelNw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61AB1CD5BAB; Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:13 +0200 Subject: [PATCH 09/11] arm64: dts: qcom: sc8280xp-arcata: model the PMU of the on-board wcn6855 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-9-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=4908; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=K8dOu1Fg7LfOFi3E/eQZcIGRKm5mbKQExrj/mmutPxM=; b=co+/t3hfIQarZQinpUw9xtZOrViQ0DLsT6wLzty+axZgfVMxK6xUj0MlsADizOKIzXoAVPo2D YkrKnWbflOHBRT35zT+a9pZHUyHtCISp+ntdqG+Bl2KuJEZmAc0IZCo X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Align the Surface Pro 9 5G with the other sc8280xp-based models as done in this patch series [1] from Bartosz. Add a node for the PMU of the WCN6855 and rework the inputs of the wifi and bluetooth nodes to consume the PMU's outputs. With this we can drop the regulator-always-on properties from vreg_s11b and vreg_s12b as they will now be enabled by the power sequencing driver. Use the fixed BT vddrfa1p7-supply supply name to align with bindings. [1] https://lore.kernel.org/all/20241018-sc8280xp-pwrseq-v6-0-8da8310d9564@= linaro.org/ Cc: Bartosz Golaszewski Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 103 +++++++++++++++++= +--- 1 file changed, 89 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 4daff3a0ecf48ad2081a2fe98910adf0debef88f..52d8e9527bd26f97305905650e2= 486a59e6d7157 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -357,6 +357,70 @@ usb1_sbu_mux: endpoint { }; }; }; + + wcn6855-pmu { + compatible =3D "qcom,wcn6855-pmu"; + + pinctrl-0 =3D <&bt_default>, <&wlan_en>; + pinctrl-names =3D "default"; + + wlan-enable-gpios =3D <&tlmm 134 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 133 GPIO_ACTIVE_HIGH>; + swctrl-gpios =3D <&tlmm 132 GPIO_ACTIVE_HIGH>; + + vddio-supply =3D <&vreg_s10b>; + vddaon-supply =3D <&vreg_s12b>; + vddpmu-supply =3D <&vreg_s12b>; + vddpmumx-supply =3D <&vreg_s12b>; + vddpmucx-supply =3D <&vreg_s12b>; + vddrfa0p95-supply =3D <&vreg_s12b>; + vddrfa1p3-supply =3D <&vreg_s11b>; + vddrfa1p9-supply =3D <&vreg_s1c>; + vddpcie1p3-supply =3D <&vreg_s11b>; + vddpcie1p9-supply =3D <&vreg_s1c>; + + regulators { + vreg_pmu_rfa_cmn_0p8: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn_0p8"; + }; + + vreg_pmu_aon_0p8: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p8"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p8: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p8"; + }; + + vreg_pmu_btcmx_0p8: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p8"; + }; + + vreg_pmu_pcie_1p8: ldo5 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo6 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_rfa_0p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo8 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p7: ldo9 { + regulator-name =3D "vreg_pmu_rfa_1p7"; + }; + }; + }; }; =20 &apps_rsc { @@ -383,7 +447,6 @@ vreg_s11b: smps11 { regulator-min-microvolt =3D <1272000>; regulator-max-microvolt =3D <1272000>; regulator-initial-mode =3D ; - regulator-always-on; }; =20 vreg_s12b: smps12 { @@ -391,7 +454,6 @@ vreg_s12b: smps12 { regulator-min-microvolt =3D <984000>; regulator-max-microvolt =3D <984000>; regulator-initial-mode =3D ; - regulator-always-on; }; =20 vreg_l3b: ldo3 { @@ -653,6 +715,16 @@ wifi@0 { compatible =3D "pci17cb,1103"; reg =3D <0x10000 0x0 0x0 0x0 0x0>; =20 + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn_0p8>; + vddaon-supply =3D <&vreg_pmu_aon_0p8>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p8>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p7>; + qcom,calibration-variant =3D "MS_SP9_5G"; }; }; @@ -837,20 +909,16 @@ &uart2 { bluetooth { compatible =3D "qcom,wcn6855-bt"; =20 - vddio-supply =3D <&vreg_s10b>; - vddbtcxmx-supply =3D <&vreg_s12b>; - vddrfacmn-supply =3D <&vreg_s12b>; - vddrfa0p8-supply =3D <&vreg_s12b>; - vddrfa1p2-supply =3D <&vreg_s11b>; - vddrfa1p7-supply =3D <&vreg_s1c>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn_0p8>; + vddaon-supply =3D <&vreg_pmu_aon_0p8>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p8>; + vddbtcmx-supply =3D <&vreg_pmu_btcmx_0p8>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p7-supply =3D <&vreg_pmu_rfa_1p7>; =20 max-speed =3D <3200000>; - - enable-gpios =3D <&tlmm 133 GPIO_ACTIVE_HIGH>; - swctrl-gpios =3D <&tlmm 132 GPIO_ACTIVE_HIGH>; - - pinctrl-0 =3D <&bt_default>; - pinctrl-names =3D "default"; }; }; =20 @@ -1201,4 +1269,11 @@ reset-pins { bias-disable; }; }; + + wlan_en: wlan-en-state { + pins =3D "gpio134"; + function =3D "gpio"; + drive-strength =3D <8>; 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Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:14 +0200 Subject: [PATCH 10/11] arm64: dts: qcom: sc8280xp-arcata: Switch to uefi rtc offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-10-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Johan Hovold X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1302; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=U33Edd1LJ3viLModpsBHxlsQb9yGXvyVVmxT4ozJBOg=; b=asv2ZIpTTgM/SJ1GCriLiQm1TaOlO+NniVF0jnu8gepeegudJvUl5sTQf3BFgvV5YhTt5uqmi WZO21yXZaRZBRVHWnIDLaoAMxtkMj03jiaiKyGyO87HeWLxRhE3HADp X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Align with the reference implementation from the ThinkPad X13s: Switch to using the Qualcomm specific UEFI variable that is used by the UEFI firmware (and Windows) to store the RTC offset. Use the new 'qcom,uefi-rtc-info' property to indicate that the offset is stored in a UEFI variable so that the OS can determine whether to wait for it to become available. Cc: Johan Hovold Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index 52d8e9527bd26f97305905650e2486a59e6d7157..ae0a054f2f9d90c9341766528d6= be0b9561a530f 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -749,20 +749,11 @@ &pmk8280_pon_resin { }; =20 &pmk8280_rtc { - nvmem-cells =3D <&rtc_offset>; - nvmem-cell-names =3D "offset"; + qcom,uefi-rtc-info; =20 status =3D "okay"; }; =20 -&pmk8280_sdam_6 { - status =3D "okay"; - - rtc_offset: rtc-offset@bc { - reg =3D <0xbc 0x4>; - }; -}; - &qup0 { status =3D "okay"; }; --=20 2.47.3 From nobody Sun May 24 22:42:18 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA98C37A4BA; Wed, 20 May 2026 16:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; cv=none; b=tzwv7IPvdEayZP+ZEMYBHAC+V4pVTSm9hhqeNHHqub07gsSUYDsyP8WNohxAARrCVD86SCN/ytbstrhnichAhQC9PbNsAuYEvqem15awvgGyFKQNhcKV4+CWBTPJlpfnCrnXcCXUCDMw0+V4sc8qCiNzZ50GKWcw1CbQy9RKvgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779295242; c=relaxed/simple; bh=Mu9cAq/bK2HeYMImJlap8nXy6uvMFEKZPyKWOMasao4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aoLbHa+V0wvC85Cma9ghSClNU71M+IZg/uvDPnjbngQuc0K2g1kFYm909q0V8RQE3rv6MnkdhW4Tz/P2ZpejvIVkz7hPhDZPwDcl/wsV66/icPHgtqOPbBZUfLvoKgYF5hNICVOIDKoG1gND7ErUU+hqegmPLkfHW2Tf7PE6Glo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dfeDeNt+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dfeDeNt+" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8D6F1C2BCF6; Wed, 20 May 2026 16:40:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779295242; bh=Mu9cAq/bK2HeYMImJlap8nXy6uvMFEKZPyKWOMasao4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=dfeDeNt+x4sgDIbwsODNMrUukL9VYJOD7OSkZU225gb0lmTd1f20xN3ers3UuwnnG hf4L7WaLJalGZjpa7SXxOvD9IVtZUY8TesWl20G2HOapKI3a5Ud/b/SFYNHpwPWtJs hgZWhb0s7lutPkFmeW5WEFXZYPJ3RdmxbNKIMs8kzo6uRmV4I4utaQf8D4eCusA7lF JGIMCOVfpYWqgRT4HOY8K0/0cufs/er0TJBK5inlDaov7jFlFaSL/hmx5lg4G+MAsn LyaXnh4+vOAwefuYCu8CWprv1yIE0cetRxl5n1Zo+w+MGBTTOHXg0O+1OjiwE4jqEz 4EYhsldpgKy7g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 840BECD5BA4; Wed, 20 May 2026 16:40:42 +0000 (UTC) From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne_via_B4_Relay?= Date: Wed, 20 May 2026 18:40:15 +0200 Subject: [PATCH 11/11] arm64: dts: qcom: sc8280xp-arcata: Drop duplicate DMIC supplies Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-surface-sp9-5g-for-next-v1-11-9df52552bf87@gmail.com> References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= , Stephan Gerhold X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779295238; l=1355; i=jerome.debretagne@gmail.com; s=20260520; h=from:subject:message-id; bh=zKav9HnHTj8DgP+Z9y+E814drSGNPU5bW2do5oedD5A=; b=jd63XVNVGo/QGrpVcEm+/DDF4Q/3SVr5c2azDz7Dhq8sS+H+BzUrp5rqDGwTydj26e1IU4R6W aMgOb7aIf4zD9WFH9SSEPHvEOAEo9UHNfDMJOBHTLhsuIHiZdo0YfNQ X-Developer-Key: i=jerome.debretagne@gmail.com; a=ed25519; pk=3/JYhgYjGg5V9mlFxc0A0+pFiyjsuDB/TtDlNMId9fk= X-Endpoint-Received: by B4 Relay for jerome.debretagne@gmail.com/20260520 with auth_id=785 X-Original-From: =?utf-8?q?J=C3=A9r=C3=B4me_de_Bretagne?= Reply-To: jerome.debretagne@gmail.com From: J=C3=A9r=C3=B4me de Bretagne Align with the reference implementation from the ThinkPad X13s. The audio-routing setup specifies two power supplies for each DMIC, but only one of them can be active at the same time. Drop the redundant routes to the pull-up "VA MIC BIASn" supplies as done in commit a2e617f4e698 ("arm64: dts: qcom: sc8280xp-x13s: Drop duplicate DMIC supplies"). There is no functional difference except that we skip briefly switching to pull-up mode when shutting down the microphone. Cc: Stephan Gerhold Signed-off-by: J=C3=A9r=C3=B4me de Bretagne Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/= arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index ae0a054f2f9d90c9341766528d6be0b9561a530f..f938e68c69ea9276ca89d75b659= dbea6a7a832f7 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -793,9 +793,6 @@ &sound { "VA DMIC0", "MIC BIAS1", "VA DMIC1", "MIC BIAS1", "VA DMIC2", "MIC BIAS3", - "VA DMIC0", "VA MIC BIAS1", - "VA DMIC1", "VA MIC BIAS1", - "VA DMIC2", "VA MIC BIAS3", "TX SWR_ADC1", "ADC2_OUTPUT"; =20 wcd-playback-dai-link { --=20 2.47.3