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Tue, 19 May 2026 20:31:07 -0700 (PDT) Received: from [127.0.0.1] ([116.80.91.208]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c82bb1231c7sm18543789a12.31.2026.05.19.20.31.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2026 20:31:06 -0700 (PDT) From: Cunlong Li Date: Wed, 20 May 2026 11:30:54 +0800 Subject: [PATCH] cgroup: rstat: relax NMI guard after switch to try_cmpxchg Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260520-nmi-v1-1-f2c8f08e4a2b@gmail.com> X-B4-Tracking: v=1; b=H4sIAO0qDWoC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDUyMD3bzcTF0DE0vjRENTM0tzQzMloMqCotS0zAqwKdGxtbUARRKuylU AAAA= X-Change-ID: 20260520-nmi-0493a1569716 To: Tejun Heo , Johannes Weiner , =?utf-8?q?Michal_Koutn=C3=BD?= , Shakeel Butt Cc: cgroups@vger.kernel.org, linux-kernel@vger.kernel.org, Cunlong Li X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779247865; l=2385; i=shenxiaogll@gmail.com; s=20260517; h=from:subject:message-id; bh=MkE9oEsiIuagC+yOi3izgicZSC9d2P9EfBhloTtkDo8=; b=esOoYUDEjya6CR4hd9fysj0KPGmx7xpfnT2Gg81cU2JJJlwPlhSE0kbz5Ta13k3OPo/bvc6LO KKe5P7oLInwCxgJJhGdW1tBXKE2MOT/TGeb4S9OA0fGCTjQUv0nD5Bv X-Developer-Key: i=shenxiaogll@gmail.com; a=ed25519; pk=SKFifnqPdsvsjuhUiq+Y9vtCdhyZ/LrRcfYn8eRq6AE= Commit 36df6e3dbd7e ("cgroup: make css_rstat_updated nmi safe") used this_cpu_cmpxchg() for the lockless insertion, and therefore required both ARCH_HAVE_NMI_SAFE_CMPXCHG and ARCH_HAS_NMI_SAFE_THIS_CPU_OPS in the NMI guard: on archs without the latter, this_cpu_cmpxchg() falls back to "local_irq_save() + plain cmpxchg", and local_irq_save() cannot mask NMIs. Commit 3309b63a2281 ("cgroup: rstat: use LOCK CMPXCHG in css_rstat_updated") later replaced this_cpu_cmpxchg() with plain try_cmpxchg() to fix cross-CPU lockless-list corruption, but left the NMI guard untouched. After that switch, css_rstat_updated() no longer performs any this_cpu_*() RMW operations and only relies on the arch having NMI-safe cmpxchg, so ARCH_HAS_NMI_SAFE_THIS_CPU_OPS is no longer required in the guard. Relax the guard accordingly so that archs which have HAVE_NMI and ARCH_HAVE_NMI_SAFE_CMPXCHG but not ARCH_HAS_NMI_SAFE_THIS_CPU_OPS (e.g. sparc, powerpc on PPC64/BOOK3S) can benefit from the existing CONFIG_MEMCG_NMI_SAFETY_REQUIRES_ATOMIC path. Without this, the css is never queued in NMI on those archs, and the atomics staged by account_{slab,kmem}_nmi_safe() are not drained by flush_nmi_stats(). Fixes: 3309b63a2281 ("cgroup: rstat: use LOCK CMPXCHG in css_rstat_updated") Signed-off-by: Cunlong Li Acked-by: Shakeel Butt --- kernel/cgroup/rstat.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/kernel/cgroup/rstat.c b/kernel/cgroup/rstat.c index 150e5871e66f..fa46611098a5 100644 --- a/kernel/cgroup/rstat.c +++ b/kernel/cgroup/rstat.c @@ -83,11 +83,10 @@ __bpf_kfunc void css_rstat_updated(struct cgroup_subsys= _state *css, int cpu) lockdep_assert_preemption_disabled(); =20 /* - * For archs withnot nmi safe cmpxchg or percpu ops support, ignore - * the requests from nmi context. + * The lockless insertion below relies on NMI-safe cmpxchg; + * bail out in NMI on archs that don't provide it. */ - if ((!IS_ENABLED(CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG) || - !IS_ENABLED(CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS)) && in_nmi()) + if (!IS_ENABLED(CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG) && in_nmi()) return; =20 rstatc =3D css_rstat_cpu(css, cpu); --- base-commit: 27fa82620cbaa89a7fc11ac3057701d598813e87 change-id: 20260520-nmi-0493a1569716 Best regards, --=20 Cunlong Li