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Tue, 19 May 2026 00:58:17 -0700 (PDT) Received: from s7t7-debian-test.local ([67.170.89.46]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-134cf44668asm18768901c88.6.2026.05.19.00.58.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2026 00:58:17 -0700 (PDT) From: Tony Rodriguez To: davem@davemloft.net, sparclinux@vger.kernel.org Cc: linux-kernel@vger.kernel.org, andreas@gaisler.com, thuth@redhat.com, regressions@lists.linux.dev, glaubitz@physik.fu-berlin.de, unixpro1970@gmail.com Subject: [PATCH 1/1] sparc64: unify thread stack sizing and add explicit 32KB stack Date: Tue, 19 May 2026 00:57:55 -0700 Message-ID: <20260519075809.8993-2-unixpro1970@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260519075809.8993-1-unixpro1970@gmail.com> References: <20260519075809.8993-1-unixpro1970@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable This patch restructures the thread=E2=80=91stack sizing logic into a single if / elif / else chain and introduces an explicit 32KB kernel stack for SPARC64. The previous implementation relied on nested conditionals and PAGE_SHIFT=E2=80=91dependent behavior, which produced 8KB or 16KB stacks depending on configuration. SPARC64 requires a larger, architecture=E2=80=91specific stack due to its trapframe size, register=E2= =80=91window behavior, and deeper call paths. A reproducible failure case occurs when usbcore is enabled: USB hub enumeration (usb_new_device(), hub_port_connect(), PM/QoS helpers) allocates large on=E2=80=91stack structures and recurses through several layers of device=E2=80=91model code. Combined with SPARC64=E2=80=99s trapfr= ame and register=E2=80=91window overhead, this reliably exhausts a 16KB stack and results in early=E2=80=91boot panics. A 32KB stack eliminates these failur= es. The new logic is: SPARC64: THREAD_SIZE =3D 4 * PAGE_SIZE (32KB) THREAD_SHIFT =3D PAGE_SHIFT + 2 (log=E2=82=82(32KB)) THREAD_SIZE_ORDER =3D 2 (4 contiguous pages) Non=E2=80=91SPARC64 with PAGE_SHIFT =3D=3D 13: Retains the existing 16KB stack behavior Fallback: Retains the existing 8KB stack behavior Signed-off-by: Tony Rodriguez Tested-by: Nathaniel Roach # SPARC T5-2 --- arch/sparc/include/asm/thread_info_64.h | 28 ++++++++++++------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/a= sm/thread_info_64.h index c8a73dff27f8..6b12a2b66385 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -99,13 +99,20 @@ struct thread_info { #define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ #define FAULT_CODE_BAD_RA 0x20 /* Bad RA for sun4v */ -#if PAGE_SHIFT =3D=3D 13 -#define THREAD_SIZE (2*PAGE_SIZE) -#define THREAD_SHIFT (PAGE_SHIFT + 1) -#else /* PAGE_SHIFT =3D=3D 13 */ -#define THREAD_SIZE PAGE_SIZE -#define THREAD_SHIFT PAGE_SHIFT -#endif /* PAGE_SHIFT =3D=3D 13 */ +/* thread information allocation */ +#ifdef CONFIG_SPARC64 + #define THREAD_SIZE (4 * PAGE_SIZE) + #define THREAD_SHIFT (PAGE_SHIFT + 2) + #define THREAD_SIZE_ORDER 2 +#elif PAGE_SHIFT =3D=3D 13 + #define THREAD_SIZE (2 * PAGE_SIZE) + #define THREAD_SHIFT (PAGE_SHIFT + 1) + #define THREAD_SIZE_ORDER 1 +#else + #define THREAD_SIZE PAGE_SIZE + #define THREAD_SHIFT PAGE_SHIFT + #define THREAD_SIZE_ORDER 0 +#endif /* * macros/functions for gaining access to the thread information structure @@ -127,13 +134,6 @@ register struct thread_info *current_thread_info_reg a= sm("g6"); extern struct thread_info *current_thread_info(void); #endif -/* thread information allocation */ -#if PAGE_SHIFT =3D=3D 13 -#define THREAD_SIZE_ORDER 1 -#else /* PAGE_SHIFT =3D=3D 13 */ -#define THREAD_SIZE_ORDER 0 -#endif /* PAGE_SHIFT =3D=3D 13 */ - #define __thread_flag_byte_ptr(ti) \ ((unsigned char *)(&((ti)->flags))) #define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_i= nfo()) -- 2.53.0