From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 078702BEFED for ; Mon, 18 May 2026 14:32:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114725; cv=none; b=P7x5qKtAFDT+nhuABH3Svu+GbOWCLwIr3herx6PY2MdKWhT9xIeZ6fnq7CKKMi+LX3M8csEGsDA1KakOoZ7SVsUEe+PTR+kCclh/21c6BKo6Yl4M2hiAuf6PDvN/+yoU0CAQIxBkAGV4N0I58zXj1QynQ+nfWUJKoEYDJ5xqZLQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114725; c=relaxed/simple; bh=HVzHD+IF9w6Ls+sZG3tefX0bOnjd/9xlh6aF36AV/Q4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=m5qCNnV04DtiLqa7y+1VvzAh2mM8lwIk27q7F3RhCYO5amoNcG+96R7cZK5GHn9LzDXU0oFVFPUZXza7W+zgxAKqeteeGMO7MUKiiYdIMrGm5xdJ2RuXPh5SruhD5jhCICucsujUMV9Ihmztmgc0XBKd8ozFUvW+BJYlUQMo9EI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=JSDfldXn; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="JSDfldXn" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-4526a8170ceso1003415f8f.2 for ; Mon, 18 May 2026 07:32:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114720; x=1779719520; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g4cUQj60Trdc2wuppwGbIuirXnqBXKiyXXPxr6xW8J8=; b=JSDfldXnbOYhD8e67iA8YOD9HMDYnErgIl8wZYtQAn6OioIdx7MbZFyPlJj9YEz7Ne WQdo/LH4Vs+qam766xbvK9IdP1jDAukhpTQjWlv5ZeSEGqtbz6T+yWQaQzoshPXuWwoc 0pvIEA/jZ2ylqgzC+YeCGr6ywx2XNTi9J/RoA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114720; x=1779719520; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=g4cUQj60Trdc2wuppwGbIuirXnqBXKiyXXPxr6xW8J8=; b=QVttxA8aRFyGyv0l9JVLVr1/1hL0XENQUibdXm8D+ZefHwZUegEjwtWkJBOrTsRYsF h2XArrX7X8OjWjCsLC9DEN2SlrDBbT+kuKY4eJpWQP+QL6T57nwxtHjeth4ThZebggq7 bIN0xQpeQIKqojVKyR5xLLaLrFLKEnP56y2+ADQi/oxwFP85voNSBj9rWD5QOwUIl42M 0fVklaiN3DSvz8IG9p5fbRu7psVQ2dd+NDX1Cj5+WPhFzMO1pjwTDlczfzCRDFVIayPi LxKWZV6vhc396MCmBvSPfeYuW8SMABiz4/DkLjNMvlaMJVYVEXxQxOlAUS1SAr+47t0Q w6Xw== X-Gm-Message-State: AOJu0YzNHWLc3KfdgKBKSwzkshmzv2TE4TQ8zEwpWDqeXBk02cY3k10U WgoL24IYrRQJZRy82MXBrKk3pCTCH13R7tSy0fI5LYVkT3xo/3whuWWxX4JrEhg9V9NzhOJvqt3 na+tq X-Gm-Gg: Acq92OEbuMH/PEq2BwZSeMChpFoEdA5a+OdxSsm0vqnB1WoVGizsaUvIDFeQ11q66Xt MfKIepxeSWzZgThmZugK3uabccuv3x4SYmdIPXTykhL1LDO9IWqiLmuTpSk9+o8x0WafzrJOV53 i5ECiB3hF5lXrFgY2YspghIh7gio8kqJSsowkB7T8ChUCrqb8GBpsdm3pxFfq9CQUF3UjsEYn5T hcNVy1+cMRJN1x07UtV8tMXmSpnjWaOOpIlA331h0iThG38ngV7HOu7gbpSBxKdVEy9Yq+9uWAy DDIAViyi72aJQ/TxbJF3mc88vDit5sDcRLrm/Q3p7vVS3gtPhas/nFtfwDTougL+tpYDyZiYjaQ TNTTGVhPs7vPzX/E/HhoKqb+CshqE4mhmAO9IFkfso5Xal/nCXUU/LMFpBPC6IdYBSXOb3dP7d+ ORPYSkOVfHfKmkzTfoObOKA+soT5DYlREBwdDJDgbpGjzrRSy/RY95Nrl3X0h0Z+/BbbhVm113N 9+DA9ST748r2XUh5YI+6aV2KrOTJd3mgZ3J5eGjaDSaynbX X-Received: by 2002:a05:6000:1869:b0:43d:7946:bae5 with SMTP id ffacd0b85a97d-45e5c60d6d8mr25547861f8f.42.1779114719561; Mon, 18 May 2026 07:31:59 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.31.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:31:58 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Christophe Parant , Conor Dooley , Himanshu Bhavani , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 01/15] dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257-RMM board Date: Mon, 18 May 2026 16:31:16 +0200 Message-ID: <20260518143150.3138712-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add devicetree bindings for Engicam MicroGEA-STM32MP257-RMM board based on the Engicam MicroGEA-STM32MP257 SoM (System-on-Module). The use of an enum for a single element is justified by the future addition of other boards based on the same SoM. Signed-off-by: Dario Binacchi Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Docum= entation/devicetree/bindings/arm/stm32/stm32.yaml index c6af3a46364f..c5ce81e3ce45 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -203,6 +203,13 @@ properties: - st,stm32mp257f-ev1 - const: st,stm32mp257 =20 + - description: Engicam MicroGEA STM32MP257 SoM based Boards + items: + - enum: + - engicam,microgea-stm32mp257-rmm + - const: engicam,microgea-stm32mp257 + - const: st,stm32mp257 + - description: ST STM32MP235 based Boards items: - enum: --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 975603F86FB for ; Mon, 18 May 2026 14:32:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114728; cv=none; b=LMBJyjXcy/5TJ7xNnEh+59xKY4tJ+9OOM0RT7+pX30Ik88l7PWLVvhuTCwf6RvvHeZIsnbyZo9zn7e0jRqGK6jv3R6mj9aeGBLt5zLLELpVzBE5b+PwdpKx73NaLtNkyzFbVCvRaBTiyIDrYiR+EOGxgPVuiH7kqU4ou3ZvP+zY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114728; c=relaxed/simple; bh=OipjGgsFj3wWpzwiMZ9C+EFIaSQwoMkz5UT902sO1OQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WgKcN5B+5JYWYsHx9A9FD9G6c+1lKsJsXMtjFIHBn5rLyzRvEvYOJLdx7vVDQZnfSTNl45z0JK/7r62AalDDkdmmn2GE99IY5VIdDLYjfYMco1GMIJYnhOec9UhcLniUYgSCN5SwzN6Rx+a+JrCwhxXGfPufoFD2fO5O5g6EnWA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=lDnuEKCq; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="lDnuEKCq" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-b8f9568e074so560930966b.0 for ; Mon, 18 May 2026 07:32:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114722; x=1779719522; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NiWA+rwoYmnp1xtUJ+3qeQunLZa44uT6rtS6A38xJwA=; b=lDnuEKCq/JXqc9QqLeNU1NsrLMLOEinVDtcbUKlYhn2dJFakVqXeivVxDgYCwJFGBf sdbrarUdW/Jg+5NeszYxIDXatmdvDDZBt76QGUNK6t2THtGInzL3KS88M5LZDrt+sS46 27dNE5cDkUJ8m6XDOEHXEyNj5Y2MZ4vMofKfg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114722; x=1779719522; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=NiWA+rwoYmnp1xtUJ+3qeQunLZa44uT6rtS6A38xJwA=; b=ip1MDgrFk6fQPKawGbWKCy6eUbZQiNlQ4atva8CLVkE2Uek1baQtgvfY7Q54ONNzOK 4tYNvz5xpLk9jkH2sigQ3o4wfgseJgsYNeJuzQYsl/9ZDyAsaXp1Jjp0Blo/KoHCugDY EhFQ8t9ae76Oed1KJvXgvMIBtpImY8sxQ8l9wmsD6SAQz561uvGEtALSYbGFEwYsOTHr xdA0iM/tw/wm7u0kSjCyPQwYgcrMy86ecjHKFhTN6WdjLUt3wi1yn5Xwe4uNSknaTp+1 bu+HhbeDng9T0P1NKclSSOiFZsGQK2chMOLFyIAguSoD8oSRP8EgngPEaFasQhX+wUV7 kw0g== X-Gm-Message-State: AOJu0Yw0wfA7ll2Qn+Jzc0fYq4Imvw4HKHalHgxr2Z9t2YJxEwx5UcAX W8Xj1yd2/rlz9dsir77KbWOXPTJih9ReYpaQe6yp+9n2N27HmY7iWmn1PHenj25Dc+Dn5bChsNq X5zQ/ X-Gm-Gg: Acq92OEfz8Ez7qceP6sBTpqKh4wjmTg+uVEW97NOzMmECLvKByQF6QJjigPyfT2kLS5 47VC6fhGnFm+10vCm0GRxVRW0HkoRjgDZrniIrNkD7Tt0EQQ/gdnQjoeHPd/IjA7Vy17P0oM4Ac EbK448zJFe3sQNN1ReBSr5uxIryG4LoA+PCdrLNcLuOHDISz6bZBaX8NgnICT8Y5b/H/tta624Q Gwc+e3PT4FHAYi1AahxVvXitf3wcjO3g+EJpY+F+saU4B+UGKfWvVvXwYwS+wXRpZs0Vlu0XfJR eFsly13kOwX+e9A8VTv6x1fsUF079+KDXsNluMZTMoPi1sI9Xyim54v6z9r0Qs1CaQek8cf15y3 szZrYAPYpCABwMu/rTZsk8zYgizCLx01ZwjJ9Bs3Lzfe3gHEc0lAfRVm5DHJvehMTIJVKoPgwfb VjmtuKQX/U2oIo/I38u7C+RRt1BCea3MACR5G9NpACMe3pV7v8kiqCgQBCQQD6N+HccTviO4MJx Ndzmey3CsOrg2mJ+ZZjQna8zYhE+fme2wcBdMHNkyc3C+J8 X-Received: by 2002:a17:907:15d5:b0:bd3:1b44:2ec with SMTP id a640c23a62f3a-bd51785f67amr615296866b.15.1779114721773; Mon, 18 May 2026 07:32:01 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.31.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:01 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 02/15] arm64: dts: st: add SDMMC2 support on stm32mp25 Date: Mon, 18 May 2026 16:31:17 +0200 Message-ID: <20260518143150.3138712-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SDMMC2 controller supports SD cards, eMMC memories and SDIO devices. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 673fbc5632e6..5e46024d2215 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1667,6 +1667,21 @@ sdmmc1: mmc@48220000 { status =3D "disabled"; }; =20 + sdmmc2: mmc@48230000 { + compatible =3D "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell"; + arm,primecell-periphid =3D <0x00353180>; + reg =3D <0x48230000 0x400>, <0x44230800 0x8>; + interrupts =3D ; + clocks =3D <&rcc CK_KER_SDMMC2>; + clock-names =3D "apb_pclk"; + resets =3D <&rcc SDMMC2_R>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency =3D <120000000>; + access-controllers =3D <&rifsc 77>; + status =3D "disabled"; + }; + ethernet1: ethernet@482c0000 { compatible =3D "st,stm32mp25-dwmac", "snps,dwmac-5.20"; reg =3D <0x482c0000 0x4000>; --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B667930C632 for ; Mon, 18 May 2026 14:32:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114730; cv=none; b=subBJCJL1NQ6Ldk6eZtndsMXgveyvv5oTcvS5BQ4xK+d0IeNE3aZjB0bVYn5UONg0IolNquYhDKAyS2DrGSiblMRCFZLhljKMS/bzkNqF7Pk4mgL6hGrbnZ75x/t4WdQYBY04NkulRbTOxTfkumnUKkiD1QnoiDUxYEs0AbCMLk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114730; c=relaxed/simple; bh=K7o9pMLNekFsRN2+H1Bx5xvmdBCysmzxPTFbJcLzqL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZGxECeHxHt+Wy98pjHLuLKRImUXXcPTz6k/kg6whEme7P8ldBI9ZjMhSoG6NoPuSoBmxNzNdcZR1dxPvid462sydHukVlExhw4WDadt/UbehjFlT5cy3OiPJ0ScDMzYk9cD3iymv81ntznvrVj6ImC+Q78mQCk+OIWH2SwDU6fU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=JIZ5Jgxn; arc=none smtp.client-ip=209.85.221.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="JIZ5Jgxn" Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-44ccbd3290aso2163333f8f.2 for ; Mon, 18 May 2026 07:32:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114724; x=1779719524; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4Sy2PqXZ6ebOtE0DOUjyEW5oMkeY/jMTLVTy3qbrNxw=; b=JIZ5JgxnbuDFg9cTTYzFi9n9r4oeWNTJnbnM/iT/mGZlOwGVybHNVZtasdDQZmj8eH wGEMrCl/F8ezn0xALslQU1fKVWcwV+bxLtYyVxpVTze7M8q44ilfiICHaQ9Wnz3He2zC 3Eo9z/k6d+wF+qrB7540c1XdJ6jnmrtrLo/eI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114724; x=1779719524; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=4Sy2PqXZ6ebOtE0DOUjyEW5oMkeY/jMTLVTy3qbrNxw=; b=DCnm39HGC+kZ89D+uAyHqMXVOB5j609O+deGAMB1GYG7ENEyTIv0g/8L/F2C+Kf7CF NLvgobPYlAlcIpDfeo7eaIs4kqKOnYas8yX+/L7HyqIg5TyPFiKStjrIKUQkRG4EPzoL LwfO+0JwZg88fYQhCBHJPEx5vn5vDdJjFWT1YUBm2vfUGixk1pB6A4OqH8BOjjpg2AD0 tB7GQvQIO6EdFF4BEVn9HtnjTkxYB7Qk//rmIaTt7qC5GMkNyLZyZt58m87MPdgmV69s a9w0ql2ehGp23NLn7ujWaGkpGUQov4oAQgkbQ4/MD7kPUXrAChFBmciLXa/Gvc0bo1ZN Gc2w== X-Gm-Message-State: AOJu0YzydnV+kt86Wdudl/wdvO3r5MEjSbTi4FD5JA6GiGSHQBb+ajgW oSf5aAAsmNyNmwoNNEjKP+EsMN5ov9o4bvMsyqigHOZcs9gNzhvWvuodZ929EmyeMZa97fsQnr8 puXDB X-Gm-Gg: Acq92OHPmC04KicT6ohbFkuhLKkc4avBeCrD7boGOfCxI+xy9RYRzKpOVsABN4A1QLs DaZxsebAhibfagHbDEjRStnBr2G58n8dMjsWbr1A5i2ZbLHpxl5LiiG1lUGqUnd+Kh8U36kNS7f b3CcXC8mnquW51HTlxiSJ2RRKIzVy/UPEy7fkWVsBkF9VpBDC7kDF5i0ZNDiY4TmlSLBR6F/O4N yrWw2FzQU8n8zjMEOG+LQ4miobSqlTLsDXyiRhC1itXJi/b7UrxQ20n+/HQTkH8XwvBJTzB9pik SXo5SsOEklQZ9vEpYaLrmURy8x2qrxGEvnHxPpMnlmErmLdx/fmHPn6b5n6Gr2xys3wEEb2FOeb tKQ7CPKtyNC5my684BtX7ufsI46ZPD1UQzV9fqAuOMjMFdlNmmvfee+0hQeEM6MAFmx8tIGOO7H Nizg0fhcUGQYslEAbdfG9UdYGZcBRhNmpLlRU4wzso3V9irMUi6FJxg67+1Iq736EokQI4FRPvN K4I1RlGfQMsM3i8MnMVzcflzTi7hxvcsqMzjAbnAm/W5emL X-Received: by 2002:a05:6000:1845:b0:44a:47a4:ce91 with SMTP id ffacd0b85a97d-45e5c58d4b5mr24057819f8f.25.1779114723899; Mon, 18 May 2026 07:32:03 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:03 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 03/15] arm64: dts: st: add CAN1 support on stm32mp25 Date: Mon, 18 May 2026 16:31:18 +0200 Message-ID: <20260518143150.3138712-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The controller is compliant with ISO 11898-1: 2015 (CAN protocol specification version 2.0 part A, B) and CAN FD protocol specification version 1.0. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp253.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp253.dtsi b/arch/arm64/boot/dts/s= t/stm32mp253.dtsi index eeceb086252b..d5871203ccb0 100644 --- a/arch/arm64/boot/dts/st/stm32mp253.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp253.dtsi @@ -43,6 +43,21 @@ &optee { }; =20 &rifsc { + m_can1: can@402d0000 { + compatible =3D "bosch,m_can"; + reg =3D <0x402d0000 0x400>, <0x40310000 0xd50>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&rcc CK_BUS_FDCAN>, <&rcc CK_KER_FDCAN>; + clock-names =3D "hclk", "cclk"; + bosch,mram-cfg =3D <0x0 0 0 32 0 0 2 2>; + access-controllers =3D <&rifsc 56>; + power-domains =3D <&CLUSTER_PD>; + status =3D "disabled"; + }; + ethernet2: ethernet@482d0000 { compatible =3D "st,stm32mp25-dwmac", "snps,dwmac-5.20"; reg =3D <0x482d0000 0x4000>; --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B11923F8709 for ; Mon, 18 May 2026 14:32:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114732; cv=none; b=VxKEiFvDZT/4gMmzHmHawzobhiLqhPBPzA1f88Fb9I1tONGKRGF/H0eOaqoxOXZmHFzPLrOBQ7kCrGwznh2vyQuA24dJ4RwqghOhcsTux9U+LJwyym+FpJ2RI51iqzUOBlFKBSuYaMA8cUG/xQ2DQmtz+9W11+297DYMWwcrsoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114732; c=relaxed/simple; bh=E9+s2+ReKBccXhTR5//5jcgGoceFbTsFVIWPZ8S0Lfo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LOqIhqPKbOntz/tk4BPIZIUNAC/hwW18hMr6LiaFXQUrQQRAdcyquvHiL6Mf3T0HnvT3gw9XHsCRFxNBzwuZ3dNCziGlzGeLFw5bYyMKXdbdHD9m1vzlrqfr2L6WMyLc0atXHEYPEXqxRy9eCPu6f1K6dOrzujj41IvCTCj3OPo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=Rf6I524w; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Rf6I524w" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-43d734223e4so1455530f8f.0 for ; Mon, 18 May 2026 07:32:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114726; x=1779719526; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x8+XcZgP8957SPKwPpk0bkCHSO0BbZnOhhuPRsGrILw=; b=Rf6I524wvhhrWix6Wz3TUApNVKRIHQu88gccc4Yu43vYSljKbEEgjVcYoAkhE4InSE XZSdAiE/SnLZCKlSJz2x7+FdlH60YqmtN0dSK0hBZdk8rfdcKXxqcmv7OqOeWwuxfvsS INbN2+0aK3C/meceEHTOvWAEwQrlesSpjd9ME= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114726; x=1779719526; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=x8+XcZgP8957SPKwPpk0bkCHSO0BbZnOhhuPRsGrILw=; b=cOCPoxy8yDQmp11PJa9HHIPgNfSNF6XKKxPk/FMcEkpJm361tnyeHZs0maVlwbhx/4 54tC3wWrplkFT981NXIhlevP2PZcdlkcPLqPP5oSt4dTBLb3TgZST7Jkkkjk9gWze1NG 854yBOj1TKuBa1l2fnvVi/86KNXRk+K6EQvkn0PiZVdG3YmNm3rz3qNJqWqjxe9hD87X JcOQDtb1A/hlOEulSOXs9//QaeDmd34ZChqItuFl0Wv3hkCaZmQwHJ/75oMhKWuoNpHo HH2HDtlX43tESaduwhEMXLzBUEdkfftZx+2rehg1b8LdsATvstblqHihQXwzuS/XUx/7 wvDQ== X-Gm-Message-State: AOJu0Yx4kRDtJSgHluKl6HgtjWjeQtN4Ed1eDrd3W5XFr9fcmWpm4v/z BdiKCRecMWY6swxJ6O0j4/Gi1IgsfXMLGDIp9GQY6HVNRHzJr6ssLGVu1vy//XvtWGfOpXRdVp5 IgArI X-Gm-Gg: Acq92OEkBjzk+l3T+MJ/m5gBZBBCj/jFs8F6oJBWnkF8YI+yofgSj5Y/SQEwSaRIB5A 4XlyJsWVsGuxW/g1/jmBA6Z0NsvT9clZpeQJus0o8xntbHCj5cbrbqJGsjIe5ojj6SlxL1QhgQO 6g68HQsZLDUWdtIduPF0WmSgBzmbTU8cgvgMF303DQbTeHI7QgOu4ejwCk6CUPJALD0/72wxwpg tO1oU9k6yPwoTyIpEzrs6ci3fNlxwTmkVLC4iBjwG6X1zzuAoWJL4iION6oIV/isV5wA5EBN6FD GuneWg79/uPpGZIjCp5Q+bmwcwiImJAIMHpAqm8pislGGf05cMH2FMWnr43ODFIwponDIMD/GHk atxKLd7J5l4gE6v5A1q0aXNQBsP6/iVxOX5cVRimR3RjKhgzgphrZ0MPeFjm3m1gEZe7w2aF+9s ZwVdghu0fTmmzhDN3At69QOlAfp6ojlu4rUQiqGFgIWHKyZieeU9LmZKl9OSxITT6AudLsuELL+ Se5WAH3lxIVF/cbBotbXj8VlEk6fKM+N45gxcsdRcoUxFAn X-Received: by 2002:a05:6000:2087:b0:449:31ca:5e53 with SMTP id ffacd0b85a97d-45e5b75624cmr24382596f8f.8.1779114726004; Mon, 18 May 2026 07:32:06 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:05 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 04/15] arm64: dts: st: add i2c1 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:19 +0200 Message-ID: <20260518143150.3138712-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the i2c1 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 456ece7f8ebc..db485b9ed904 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -203,6 +203,25 @@ pins { }; }; =20 + /omit-if-no-ref/ + i2c1_pins_a: i2c1-0 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + i2c1_sleep_pins_a: i2c1-sleep-0 { + pins { + pinmux =3D , /* I2C1_SCL */ + ; /* I2C1_SDA */ + }; + }; + /omit-if-no-ref/ i2c2_pins_a: i2c2-0 { pins { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2995B48B374 for ; Mon, 18 May 2026 14:32:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114734; cv=none; b=dS2KoORDLr+tGbx3Bc+pxjX+ggZ13nRpYvZC8Hf0hxMVKmUMwCWI003ouklL87oU6SVBQQn/mhdAzb3qEiQe4aD9LiYdXVRR8YfVRi571cd0zkLcIPpvYLui2ZC8y8oVNb3E06A040Vi63JCx8ll9IfihvntH+KPQvn8w0I5IjQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114734; c=relaxed/simple; bh=jwcRGKy3/TgN32Yv8MBFqC/R8np/8KuCnqpg4TPkGsI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C7e3b2MGc6nZkNAf8Dx0bLhSACwBpm6TMVn+oKR762inB/E7JBH3qi833QF8hSSBPHTA7JstNNX0nJJvC30H8uxGFp/0AoAj1rFe/8MC7LxRg/c2bgZGvngEBXpXfoRuIqG+ITA4loedFoZ4Av2L3ReV+2891ShvEwkFThKEt/s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=fC+0Fas3; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fC+0Fas3" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-44e5624c053so1368466f8f.2 for ; Mon, 18 May 2026 07:32:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114728; x=1779719528; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qdvucN4E2bCrplak4cO8WKE5auEkirQtL7ZhDvTXJtA=; b=fC+0Fas3o3kwkFn5XR1ZkgnMDf625fNY1r66AWPeAIHBHylBOIyv7C5QqWC+d9gjK+ bKoj9OhaRqRH0mmRqWmRSENM8TkwAU+kjBP7zpasOgdflRBXLcETYVwHswPj7JPg78V2 TAfwhbe8zKVZm9W8ui477Ba4r1GEhWTtr/Yvw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114728; x=1779719528; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=qdvucN4E2bCrplak4cO8WKE5auEkirQtL7ZhDvTXJtA=; b=KRfdbFIIXzLzWQgC0aOz+VH0392Ods7pRX8b9SjTNYEGrOj5gy5wm7Tg7BFJ5dSZNE s1MsW6hjpe/gSYmCoD1GDWxoMmMRWlBt9Cqnm0OUcKTTHQaVEyrEeIKLyPAlOw+l/nRD wDFumSWuVNszXbrIZdHUWHPo31vSegznwCgFzPc/BzhQPhm50w51KqBYCUR2hlcD3DmU ljPrQCBCWx0iliy4+nUpnNIyf9CLwQb49yEU8B2PFEsyeAIBufg6KvzeuCNytqCvHNGa V8ZuiibZxkiAZq1CzMJV6vwwys0rJJOCodeRFNxuIzi1LqpcdsjWlp93bze+4dgwh92Q XIwg== X-Gm-Message-State: AOJu0Yy2rucIhgtBFN4VnYsGILlacx6n51ILgYkk0J0KlI7IrpT9Ym08 pwg1gZ8TaR1u2Im4kVlVbEMTmiDAEA0vKsPX87hr3w9xKisKVRJScp+x7KnAbX7GN7iWw43E8Q5 /H2AM X-Gm-Gg: Acq92OHtbkci5YiG7VBUKkhF6r5PpJr63hrjUqs+tDPO64vWhRz/2d0bUVGKx/RIPKS B+tUSba3/ljaxhV8Ar71OXQSlLvCQXMVHlKo2LxRLVxoM6cShnn4WiGY1vzjvaO9GfZ+kYD29uf Ynxf5c65G1v52j2ynC+Frmyj0XBwVy1ox8MhlCgA6V5yuF0cRXE1sMueA4+PVmIl+K6CaBUbIsk pEEnSRjBB0plIdNcHFsfL2VwxZeQCq0Ksi1kxk7P7WfjnSKsPBUoxLEAIiz0sTA+qk6e/NE8akN WoVknHUE6mXh6vZcEOZC70BJ5jwUPrddr6+qDtR4WTXbNAHQJfkMYuCKDVJsDjQtImlBuGomrk5 +Ge4crgjk9ETZoALK0RGVyX05n/5u9X6qqQVwikBufli/DCSu+wq/YJQXqYajqR/FE1gjMirqRV 0NaYenVJ6TmQhl32LM/MOXYKTXTOCRmQBdjQcj2DNleDqIK0Era/cChM/WIhkiIxxND2J9zyWMi C4Y+4H11QLAuxQ/uZH+PcNqNVO/0Am6BooR1Y7gD1f6+hUX X-Received: by 2002:a05:6000:2384:b0:44a:247e:67b4 with SMTP id ffacd0b85a97d-45e5c5a0fbbmr24201432f8f.18.1779114728068; Mon, 18 May 2026 07:32:08 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:07 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 05/15] arm64: dts: st: add ltdc pins for stm32mp25 Date: Mon, 18 May 2026 16:31:20 +0200 Message-ID: <20260518143150.3138712-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the LTDC pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index db485b9ed904..05bd07a0a561 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -260,6 +260,77 @@ pins { }; }; =20 + /omit-if-no-ref/ + ltdc_pins_a: ltdc-0 { + pins { + pinmux =3D , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B0 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; /* LCD_B7 */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + ltdc_sleep_pins_a: ltdc-sleep-0 { + pins { + pinmux =3D , /* LCD_CLK */ + , /* LCD_HSYNC */ + , /* LCD_VSYNC */ + , /* LCD_DE */ + , /* LCD_R0 */ + , /* LCD_R1 */ + , /* LCD_R2 */ + , /* LCD_R3 */ + , /* LCD_R4 */ + , /* LCD_R5 */ + , /* LCD_R6 */ + , /* LCD_R7 */ + , /* LCD_G0 */ + , /* LCD_G1 */ + , /* LCD_G2 */ + , /* LCD_G3 */ + , /* LCD_G4 */ + , /* LCD_G5 */ + , /* LCD_G6 */ + , /* LCD_G7 */ + , /* LCD_B0 */ + , /* LCD_B1 */ + , /* LCD_B2 */ + , /* LCD_B3 */ + , /* LCD_B4 */ + , /* LCD_B5 */ + , /* LCD_B6 */ + ; /* LCD_B7 */ + }; + }; + /omit-if-no-ref/ ospi_port1_clk_pins_a: ospi-port1-clk-0 { pins { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48FAA226CFE for ; Mon, 18 May 2026 14:32:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114735; cv=none; b=p1mNbX0WfrhKJUJpYRfbeRa8YIIukfrJ+dv0RJnlkxQOFwC7RukUBLVXk0QurpTd2PWq9PvLbfYvO/v1ky08ceg61K8AchSllfZ9dxXSRScv7f3kRnQlTwBD3Hiaj5ZByBMdlUZDNUs03YLQMeBCZTc9zA/rrP86I77W+yjVWuE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114735; c=relaxed/simple; bh=eoSZu9hicN6r2fV4NnbRPFz7lm3WIfCafs3akN9/B30=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mKxoD1CW2AfeWgIfpdmwsQuwARxkFrPRPtSnKIygnJ1DEdkROzOT90w7dzzFldSCsWl4xieD+NcapEQw7ay0px80RE4sAHACFNbwSbmtVMwCR9M6YHmGfBO3A+82LB/3mDZAJiZoET6+GR+ZepveVBUXD3puCOTXcwS8i/4o9Ko= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=mL+YNTDW; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="mL+YNTDW" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-67be871ed3fso5518907a12.1 for ; Mon, 18 May 2026 07:32:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114730; x=1779719530; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PrnO7x0GW4jDpO7hgVq4BogGg8ikec+SImnjIW54cFk=; b=mL+YNTDW8m3JE6fPcLDLFPBMKz+D5dbEqG/IEt+PqvlWxD5ds2HkuDmlZT5BS001h1 DXnlZBk4HHUGT0v4zz61H3Tafap91Lus/6QYHsGYACM77sP6JRkbtnG/wrRdsyXcscy8 zz9xT5RhVBLbJlm+35NlYGmf9rNrfHX1E5csI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114730; x=1779719530; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=PrnO7x0GW4jDpO7hgVq4BogGg8ikec+SImnjIW54cFk=; b=SgJzJZ0/OYi48l86ve9EBZMD3euxvrSHtTFeMzhxrKH8HkYxo2F1YG0ZZYuHSkT46k 6mDYNMEuf+WKH85iLgT3lUhqVg7aZfmnEA2uUsBRP8BwSw3lwLOunDCET3rraRgVB4Gt ZUtkSuLjiNxEaBJZTlo2ypK17jMZJM34VyCdNhr13B5v/NSmo0RPQHCH6Y/0UaExI+71 FupVo9UExSr8awcdCZmmlHCFfg76jY10wK7il2StVGoVYwaZ772cQEelGTn+YSW2yxoZ xmnYIuqS6Z8T1fg78qs1A5MCBMrmCXQ2yX0wjShyKbKXMqwpilpOdHvaierf9iwKz+LQ x1Jg== X-Gm-Message-State: AOJu0YyugMjQsW1nMc6odSuYzGlp4ZjiA1AJvv1P+qZKDcNtJ3/LMdIf AP9cTj0X2pgtQHQw7bC5FntsfREb5uEa5SQL+BmZw3WQ5Hg55eyybzpQVYfQRdy5yXJKoof5ayl jya3i X-Gm-Gg: Acq92OHz0rSeWV0tn27zXcm7UmKaAT08oMBWuqBrzlSiBOTkSRWRXcdln2v54X8Q0lK xVrJs8IK9Sy1LEmqXLz7vF9Ov1oNdcURUkVQWjokTfGd9H4pBI5qedk81l398MDXpxIJtmCgYxp pVk+2xXthqcUPbPh7arpCbU5PWSu3tuV21qLNzMFloyieLMpSAKcl3caOXLFOVYDqfMvM53I/3+ GCFl4TsJotvsjCcJCP6g+TgBcbq8OZ8vb+oxSvsGlaa/TMZLabzNa8fZOZxbpb1nYngi9okwCji LB74+rU2YLiilkZBn5PlLPgoe+ZMaFt5DBhbo0Q6thPd/OojjzHFb396BLNA572KWIRxbnCektr oQ/cvOhCoGmCMdFvdsq0IroRz0Q5NofcNbAu6hpCyo/oyDvd/7Ma9yBjwjGT0l28rMhro/Hsui/ 71neKqi3AqRwQhTGjGXP+YT6Q3PZuLkj54pCZ4ZFFWbqLAZLGBGaClBVkCo0j7MZOXHAXy81afN vHhlbpVBqhM+nBnGvkOXtS3zMfYEnbS7xKIO0M5kpspdyE0r6bh2GafsxI= X-Received: by 2002:a17:907:d18:b0:bc5:1e2d:fc53 with SMTP id a640c23a62f3a-bd517961cdbmr792821966b.27.1779114730073; Mon, 18 May 2026 07:32:10 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:09 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 06/15] arm64: dts: st: add can1 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:21 +0200 Message-ID: <20260518143150.3138712-7-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the can1 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 05bd07a0a561..4be01a6574c7 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -331,6 +331,28 @@ pins { }; }; =20 + /omit-if-no-ref/ + m_can1_pins_a: m-can1-0 { + pins1 { + pinmux =3D ; /* CAN1_TX */ + slew-rate =3D <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux =3D ; /* CAN1_RX */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + m_can1_sleep_pins_a: m-can1-sleep-0 { + pins { + pinmux =3D , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + /omit-if-no-ref/ ospi_port1_clk_pins_a: ospi-port1-clk-0 { pins { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC7593F6C22 for ; Mon, 18 May 2026 14:32:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114739; cv=none; b=tdGc6YNmmcDV277gQAqaXLSd2uWpybLws3SiKWherUty8rnBLEyz3fbaN/l766sQtwrSsWv2sv4uE6Y27zDrwNzKfoen/eYbjW35wFZUx8SEm2IKfLWtZDqzYI9BmltWgnjJA/tNOwUO+/kgkyTWT9P4NCNt2WOlXazV7GCqCtc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114739; c=relaxed/simple; bh=4OqB0xgG4iD1OOImyLLjnZ+ifGxsTvw32hqC5I2s224=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QDWVfQkmtv8UhVm5Ynnicb0SBSjWmfJwCla/ioIOfvbjnDNtF2HCCtuLaKOQJva4k70xo4jSygAolosMOvR7LiJTKOwyEUPi5dhDglZU8wp/7Lvh6A6UELlOM8c1s+dDw+7qPEXMDuYsMUwlW9p91ydAGXj1Ms+qXtx/bA/oXJI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=BN8LnyP/; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="BN8LnyP/" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-44a5174670eso1270941f8f.1 for ; Mon, 18 May 2026 07:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114732; x=1779719532; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0slYHxwHAzBwt+7yChfYMvMF5XK5noAXmNpRW6A4alI=; b=BN8LnyP/iLSt83lAp41nOmcUZQHh1w023pks33Fd07LOqydiazRHMFGO9VMzdOKuS8 KL1YPaqUSJPLlWVSv5UMUOJaeQOXeUkIRjUD9Pb54N80sClZN6hPniwZpfxJAaO+G1Vn tx+RE+CVFlp/8nq9R+puEt6aakohGCLwUXlos= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114732; x=1779719532; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0slYHxwHAzBwt+7yChfYMvMF5XK5noAXmNpRW6A4alI=; b=PBuDgzJykKBqLuTFXtUx9HXKWnf0JajcR61yxO/JgvIIfB7xMB5L+vNL4WAvs+IIfm uYlokH+Ez9rMb3yAZe5eIQakchsha4nUC6gAkxwZoTKtEqYzn8YO327dnJVevPtjTaKS TGTULfndvTCyt5gZGLWKhdmrHYalv6jVj5SaRNwvwrBaaK5Ja/WQEYLPC/Z5EiFwQRe6 Njy7mXULt6af5fRF1vlTC9TfXXkfms2OeSVyrRW6d/ZOJYjpLetPKTy4vlkQpizY6pBu zJpN3BcbsCB349WXMvvHSOrw2VW0FeF42/eqE+nDDMpCdJUNHy7dnTitSDr1R8eDoh8V xsJg== X-Gm-Message-State: AOJu0YyYIgDYkuuphNFsJ6HD2G9XV14wZDf7Dy3IDGCo99uE5EWIIgU1 QTBlXxUTGnU9TF61haLt5jd+Ou7LuvF6fVrGU2xGH/zwm5czMdztBIo0ZkijDSxnbbp6kxsX0Sf tcXrs X-Gm-Gg: Acq92OH8G8GaXK2EJeHS08LZ89x57pZjGF0ikoW+fnz1BtIPLUITa5jw6VqG/TneHUz qPjIw3vn75hJRpEPIp7RGb+eveZ5mF/PJx0mDagmaOw/aYBLQkEPr7U6Y0JTLHcqd24yXAoyWx0 SsuxTX3eZAom5kf2vMO5sB+mCohGCvyxM8pKKjFj0yAalwnLBAr/wCwAVNcM9XDgs3bUi6AbWdM l60zagjW/lRPx7Q0u0FB/u3po9OsVa9fAWb1zX0iEE0DPXmAzAwPeFDMbFOY2V9OnYEw+7FXvAb VzWFGYD7Rhl3HoFi4zRw5Faj4/LqalsvEpyi1LcbFmldeQZ49OI3w2ZEvkH4vqhw+/NAO35bnQE XrgaIZlxYRkE5QDgqKajoGXqrRR1JIizR72ukX1dujyH1QjZW/gyx/8fdM3jho1dtme6m0Qh0ZJ 9w63zqd4SvvMKJFN5wGdhMl83xychubV5GCqPaF4dlj5HrvS2mZoK+hzDPgANQnv3i53aUEmZPU x5QxCzRotwpPF58zrKuWLGl84epbbHX4yMSEA8kdegIQnGE X-Received: by 2002:a05:6000:24c9:b0:43c:ffee:ee94 with SMTP id ffacd0b85a97d-45e5c5a0198mr25817515f8f.11.1779114732101; Mon, 18 May 2026 07:32:12 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:11 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 07/15] arm64: dts: st: add pwm2/pwm4 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:22 +0200 Message-ID: <20260518143150.3138712-8-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the pwm2 and pwm4 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 4be01a6574c7..eab8ebe71660 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -433,6 +433,23 @@ pins { }; }; =20 + /omit-if-no-ref/ + pwm2_pins_a: pwm2-0 { + pins { + pinmux =3D ; /* TIM2_CH1 */ + bias-pull-down; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + pwm2_sleep_pins_a: pwm2-sleep-0 { + pins { + pinmux =3D ; /* TIM2_CH1 */ + }; + }; + /omit-if-no-ref/ pwm3_pins_a: pwm3-0 { pins { @@ -450,6 +467,23 @@ pins { }; }; =20 + /omit-if-no-ref/ + pwm4_pins_a: pwm4-0 { + pins { + pinmux =3D ; /* TIM4_CH1 */ + bias-pull-down; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + pwm4_sleep_pins_a: pwm4-sleep-0 { + pins { + pinmux =3D ; /* TIM4_CH1 */ + }; + }; + /omit-if-no-ref/ pwm8_pins_a: pwm8-0 { pins { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F50B43CED9 for ; Mon, 18 May 2026 14:32:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114743; cv=none; b=Ueal4dZm3X2y3IA2lWWgXr2SvxNCh7nv2LQ0J0JvE5YMCJFlY/91KNROZKjiRTMr6U/Z9IPTUbxS2L/TT2UFIKZY6t4Z9lWNG4u1r9Vy9jz0S6MoW4c5pXTSAA6e3sYtLaY4ck7ak6q8eXMY6PCLM6boCVtgpcx/+VRgfEwWT54= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114743; c=relaxed/simple; bh=0DsXZbMBuY/wI29KyP08kjB6y74UYiinNf2f7mMr7pM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qFwFPW8TM4GkJ4hdBf6zIP+POM7Nagv1S0mjcdet4mpr8IKRJ3OeSCMBUXXp3dpXczmQFRkTB34eBV4Gm4lWA8ETmsmeJMb+KMRmXvhAH8c6HeqqmJfY/qh5Kgce+EBu5MeF7htBr8kcgpxFjHFYBXX9FPL349yFfLDCLhdFh+0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=VSMuhxrC; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="VSMuhxrC" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-444826c16ffso2079153f8f.1 for ; Mon, 18 May 2026 07:32:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114734; x=1779719534; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yoBfkEc3j9+rJ1je+ryUB6XrPniOs4Aeeb5/gWWWZ7A=; b=VSMuhxrCgKeZDqaBKfdjQHN528p8uycnOOyjtLUyTyVjx1D+HjN90kHpqGh1mgZry4 ggV++fj6ufs8y8BY7qyUyW8M0UoBUPpvT3JJ+x2gXuFntgCx7xL2dVniLxnaamxejF52 GE8qhwRLbIkoBokGeEpoQ5dwjs609yiuttsZg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114734; x=1779719534; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=yoBfkEc3j9+rJ1je+ryUB6XrPniOs4Aeeb5/gWWWZ7A=; b=M8EPcMzHvAUNDOrDYN0lRSs6oABaeSrB5M1UQMl7TTb9GQyTUhNVjCiXE/DncUvWr1 zaxoKZylSQ8HaoireUoyHyuxa8+LqoVJsOh1XfbTDZ/iiHj26HnYbCt1DykAzSbuvOPs UD1az55sQRC2+Gthibw8z0O5a7mV8+VTDgoANTGgeJaPslIkp4ceX4qE2TPfkLfcGurh ZWpAD4IYmRr7GjjVsMivCwJiDy7qDduP9Y7J9aWvYdW6qWO7sVGV/1cEKnJD0nRNjxPE mu+OMCfFaRl0043rfhUreZdtZF4w4UPm0U+7RRbRzDr3FAVX93wtg9ujBfVfkfzzH2ZG IQ9w== X-Gm-Message-State: AOJu0YzNOrb8HuM8Rse1Kj5I8wK2QLon7gVnmDu+1kPI65Y2bN4rhbG1 tEj4cGY+0t/q4Ig+WXFB6C6JZK+4Wugoj5uYSTGC539MdNAuHohfz6au8uow4gwq3eWkB/lpLX8 IXY04 X-Gm-Gg: Acq92OEXlK2Ms1AWsUJoeoiaXVoxAS3CDDJ3fEZAL2NVAI6k5FjNytUzDKAI58bVGmR dodgcYjj8GKpAQmAGYhTKqe54iVt4lxm4m1Nsm2AfHDS+g4B/lbU8+TkuHxwwdr6E9+1VQdYeI7 SoRWQEstMC6tSfhQRt+NNokNmefy2j4OPI5DuYu4jsfhAgt9+V3mlJPjMOJN6Y/7ULJI9n9OgQu nvi88ZIyMabZh9UJf/H9qG7Wjt3vtrtvgHvL+aLCxdC3DwVlJ6HnbktYMem2akOVG7TXyr4UQAa epgk96OqT9X9BrnmpgQoRgeYC96vxJt5ldf35SH1pRdYd6T1i3c1gYJMB9BpEXKRZ0+Tjb+81oz IdO1DSKNyBxbtbYBaVWVJyoMjBnwyj8o2TPa4q5rc7htYM3dXp7KhFYt1GaYdu9o57QwVYGpCyC 51MoJxcfXkwAGXWbUR4/rhbm7Rz/WtYeoHfBzv/QeDR2dQghEc9JtWPEoPHiu44PXwfNPPImouN uQNpPKrmzPUWLt6O+mrtUzZE4hbG41Ju3Lr0njFxo8CmXjc X-Received: by 2002:a05:6000:18a4:b0:441:1df5:480c with SMTP id ffacd0b85a97d-45e5c5a8f0amr24773510f8f.42.1779114734167; Mon, 18 May 2026 07:32:14 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:13 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 08/15] arm64: dts: st: add sai1 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:23 +0200 Message-ID: <20260518143150.3138712-9-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the sai1 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index eab8ebe71660..ab1e62cf2bfc 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -520,6 +520,51 @@ pins { }; }; =20 + /omit-if-no-ref/ + sai1a_pins_a: sai1a-0 { + pins1 { + pinmux =3D , /* SAI1_SD_A */ + , /* SAI1_FS_A */ + ; /* SAI1_SCK_A */ + bias-disable; + drive-push-pull; + slew-rate =3D <1>; + }; + pins2 { + pinmux =3D ; /* SAI1_MCLK_A */ + bias-disable; + drive-push-pull; + slew-rate =3D <2>; + }; + }; + + /omit-if-no-ref/ + sai1a_sleep_pins_a: sai1a-sleep-0 { + pins { + pinmux =3D , /* SAI1_SD_A */ + , /* SAI1_FS_A */ + , /* SAI1_SCK_A */ + ; /* SAI1_MCLK_A */ + }; + }; + + /omit-if-no-ref/ + sai1b_pins_a: sai1b-0 { + pins { + pinmux =3D ; /* SAI1_SD_B */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + }; + + /omit-if-no-ref/ + sai1b_sleep_pins_a: sai1b-sleep-0 { + pins { + pinmux =3D ; /* SAI1_SD_B */ + }; + }; + /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A42E1A6803 for ; Mon, 18 May 2026 14:32:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114745; cv=none; b=c21ZSS6SDxZYf71zodp5J1SpUupMC9JOn+X9BWBuk7bcKmhMaIsH/vwTwhFwo7jyvzjs4g1iuJRFGtWxL+nP/YszSGKTrkLV52y3iNcB7fe4bS4WN2Mhk5IEsz83Uojexlz9qdaiZCWQ6A4fpfHWGFcrY08iK9ZgwUudZbYPDVo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114745; c=relaxed/simple; bh=nGwZ92KUvAyhajRcMM3KkCE+aIbgk5+sXYIHKn/Ba/A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y547kS/gnttQiRHt/HjyTalKBlsPzo/kz8Z4SD0tSaY50E0xs2sHRo3AHUNz3sRLJ/iKXz00zW+Eh0MBk5Fn+HuHwnbtA8U4NAz6SfEUkT8T32XPBmqrURY6AFlyyXymtmjLL3hTnilzMhk3yPaSIaNdzG9UiSyxgV2HtzgbRMQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=G+/kqkil; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="G+/kqkil" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4891b0786beso16996675e9.1 for ; Mon, 18 May 2026 07:32:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114736; x=1779719536; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iWi70U0jso89vNkeTSGJm/hmh+o8WPBNV6P94K1wY9M=; b=G+/kqkilGnInKn55f8tujAbyPVVxdMGJwxpGgrIMB4rf80EqjYJzq2yYNL8zgHuHhA 8/d9VhDPQ3jLYTR5Dw36xPJ5gJD3uifZ5klgQurZriqetrhR/Q6uD3qgbHkVUANX4uQr 3HHxYvdH7Nic18C0D9bJOZuzHrLdOmi8s3Xf0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114736; x=1779719536; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=iWi70U0jso89vNkeTSGJm/hmh+o8WPBNV6P94K1wY9M=; b=gxDkLw3j1esnvwUT2NY81FSzB6kvuIe3h1VINBKRHXJ3pIPv9dnJWyhXz/t9sjuEBB rKTUOOl+xho/wKU54oAHzKKW38e/GQVHK5bkDJHFbI4b3ODOYCy37pWr6LOCrnt0oC6y eQHfBaVdcT6qOM3cXl52bzju2VOKx48x+Y+bbTCwwuzjgpDH419J2vaY50e8oC+mMQpE xQt6HvOEFIwkOf9HUUlOr2d4kFpfrzsdDxkAqSzGHOUIWhiJ69xMKzRznHXE3MISZwla W79RdVK33vUylhN0Hc7qZl59SFFXJORGnzKo59gUCmEf2PAZ2UFH7omE40ZIELFhrpV8 Bs0w== X-Gm-Message-State: AOJu0Ywnx4qUCw43mSLj1SLJKUba5f4zajOZetaRr3snZFkAdBaDzL0c +FmxZhAYjt831kfS6ILh6/S8ESx0NShlbsMMATXHnfIVOQmFBmr45kjk5F9GvP9rTNMcRrpz9nb 7l/2O X-Gm-Gg: Acq92OFHhGlmR7uz0An14roppkMyV+oSygQtHPc+dPMh82jfC4k/wezSz3hZwnD5yd9 89TOYJOuVc+YUN615nKeGqtx0cc/VEpbZNnEEe+lmbLoKEJyetjZroWg61avrkJN4ExF9IRSKT4 N4dZhPnsgFmGAuMmK0U7L/LqINZEhmc87+zR2zpvUtesCShuCr8UdF0dF86sjn7C/dvHfkdowYw ti9j7Lrjcf6oqLbUgHe0MtUgnesruGhnnkNdpbhu1uyVMmadxO3nph1pg2hEbe6zZ07GFWA4m3z U+Y93HIRJYxRKr4wmEXUkSPk4S/akdHMLSY5n7tbPFM0Fik58yYGZGwGkgrlt7cLppHgzIfrw6X iKd4Y/CWK9jiDZeIMB/8z546/vnEsF4mliLFVc2dvq7vZTIftA1s2OaIb+nJvMgRwiaKKfKkZai Ys44S5/tIP4sf8WQAbC8hrO4pcIRA6HeaLgNyPFzc2OkEEX+HVS0mbA7bry6afbOoxftcioM5HJ 6Lve8XbBYQzY7Qr5cGrBq85JwTmX+fOfvoPtjPjA/POZ949fT89LzxOg/Q= X-Received: by 2002:a05:600c:8184:b0:485:46fd:7887 with SMTP id 5b1f17b1804b1-48fe60edcefmr232164425e9.13.1779114736213; Mon, 18 May 2026 07:32:16 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:15 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 09/15] arm64: dts: st: add sdmmc2 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:24 +0200 Message-ID: <20260518143150.3138712-10-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the sdmmc2 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index ab1e62cf2bfc..62f898a55d45 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -622,6 +622,86 @@ pins { }; }; =20 + /omit-if-no-ref/ + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins1 { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + ; /* SDMMC2_CMD */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC2_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + ; /* SDMMC2_D3 */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + pins2 { + pinmux =3D ; /* SDMMC2_CK */ + slew-rate =3D <2>; + drive-push-pull; + bias-pull-up; + }; + pins3 { + pinmux =3D ; /* SDMMC2_CMD */ + slew-rate =3D <1>; + drive-open-drain; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux =3D , /* SDMMC2_D0 */ + , /* SDMMC2_D1 */ + , /* SDMMC2_D2 */ + , /* SDMMC2_D3 */ + , /* SDMMC2_CK */ + ; /* SDMMC2_CMD */ + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux =3D , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate =3D <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + /omit-if-no-ref/ + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux =3D , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCCB82BEFED for ; Mon, 18 May 2026 14:32:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114745; cv=none; b=EZrZSOEZSwa7S5P1IKDcLxUlUOCUj0AxaZYOBZOJYiwgwncVl7ItaXQCp+BxI5OZokvB08wFlZbwzdUhUNzSmc3QWxHjWrhtmLXUtcwVYOIycAgMd3cog5L3kbolQmCn/LA617XU8CaMFh0bdfIFDLcNB6+oeP0fWfqPS5Bukr0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114745; c=relaxed/simple; bh=1qh2j3VIqbd5dUovmqhVSor7MsL7rBmikmvfWyE7vgY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MShdGwiM0HrV1AphPKDykPELuqHZ6YTLnj6IjrK+5Ncww8kknfB9AbEi85CIzdiXV5ot1/P89rbnSYOkKGhNwAKphyKX/xXa2xoYNLQfinUPtYhiD9Vp/+lJWEzaooGWvZ1lBAl1+eEgtCTDg7DUTmkndfmNc3XEE/9R56m0mqs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=N/TKikdS; arc=none smtp.client-ip=209.85.221.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="N/TKikdS" Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-44509921fbcso1394474f8f.3 for ; Mon, 18 May 2026 07:32:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114738; x=1779719538; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M+2fG1k6iz5J9vZ3VHDwkeyqO1iLOvyLGZ3RtktWg+M=; b=N/TKikdS+FaSGMDFQsXfPpnst5ucDsci4ZaWq5WPLoBt6HD2ff2sCNwqRHIrwroQpE q7bHGechnYcVbv6jIcnBac8jjxW558Z0Tgegqks02NjpPnRzEFwWe+pCn7wMKWadkqmX 5oT7cFdhq0C0zDc0ZTV07v1WWCldO6dg1ukWM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114738; x=1779719538; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=M+2fG1k6iz5J9vZ3VHDwkeyqO1iLOvyLGZ3RtktWg+M=; b=hH1ijx2roP4wtn6RqYU43zFjuR/0mUrySggMuoPVwy4O8ObekjE2vQe+QaVIXRIw8H 5rOWR4iWokDBZz5pHo4/0B4vi1s1DEh7axoc6B44Pbuy0191tKZru5790/dPJS9bzG7i ZjehzP4n0nz7gW1/qgsXp7XiSn3uyOkYlpbC6xNmu6ifgyfpCjzfH4KmeGBOUvn6odhq Z25d+JQSaB1UvB2VTscvrirXwT8hY8Dtj8yEo48wgX5+jvRn5QlNKxd9qIyqXcNKMPjx fQrkAFqbz2+QLFQ7gXo6dPAm8wgoq0l3g/+AEup6YcN4fUqEQNYJtcqGXy5NSRbURJ/p BlCw== X-Gm-Message-State: AOJu0YxRLzs8cs/L1aIvv5hDiuRVpcPxjTANIiv+tuvg4uCOnmWboyfS APj9TIcfnrYOxN0slMCMbSyaz9+rbAOLuxHN8eniZOBOf3rh/RH6ixFjncLbNh9j7w7p01PIv59 Y4clX X-Gm-Gg: Acq92OG3cNRbpCai7WRex/NJ7Ne5/om26WBNgQgJbZ8nzQg7+Dp7dLjUNfSvkPacRf6 34l42SMRiIzO36xN1KrrpJtWYTz7bJ9uAKxBCXE1cCPY5MrMESQ85HenZodAStzQUsGSkrJK4Ru 2xdMdUi3GBJNvDdMYLxRjl9aIcG6E4vLlMS0ubdleBS7vaYhopmK4neyCyzwHv/8murpvNvb6C1 tJYr9Cbw7rDhBZTUEGJUBy+6c3cNR2S2Zn6VdihIfx1PztnEv0ew3t4eMP+ds/rLyzaM1RDRvRM uv3q+SEMPJZwHkjJ7ybFw1BrHKuIwPVT4FZ2awkIywTJdZX8dQ0N6v+7zA2xGnMj202GETB+v+Y L1IkezOPQZuEZdbLlvFxfsoDW+HIQ2vV398BJU1GG8zQ7ZW+ETwNGYfEvB2xVGVYUzOrAVDHqUw 1Jte/MXWLK5wD1mx5O5kAKnRWAVWWrSO2CizsCR+Z5kr+0V/1WnsTHtSEYFNS0xuhlomYgaAZKf rT/wn9kyfWo2WF1k/OQrGtaeeeXiZQSfO1t1U7IMyV9g2Rv X-Received: by 2002:a05:6000:2902:b0:43e:a81d:c475 with SMTP id ffacd0b85a97d-45e5c58fbf9mr24055470f8f.6.1779114738301; Mon, 18 May 2026 07:32:18 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:17 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 10/15] arm64: dts: st: add spi1 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:25 +0200 Message-ID: <20260518143150.3138712-11-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the spi1 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 62f898a55d45..46c5197dcd63 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -702,6 +702,30 @@ pins { }; }; =20 + /omit-if-no-ref/ + spi1_pins_a: spi1-0 { + pins1 { + pinmux =3D , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + drive-push-pull; + bias-disable; + slew-rate =3D <1>; + }; + pins2 { + pinmux =3D ; /* SPI1_MISO */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + spi1_sleep_pins_a: spi1-sleep-0 { + pins1 { + pinmux =3D , /* SPI1_SCK */ + , /* SPI1_MOSI */ + ; /* SPI1_MISO */ + }; + }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B83404534A4 for ; Mon, 18 May 2026 14:32:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114748; cv=none; b=ELTEdIVagQivDRHdwSRGQfIN3SheMmWGjdtmePXzhHS9/MWiD6RWTV896lkmhFvrzmpmT4u+bRTfGFDvJlzpfXrVR+3yHcasIZ3B98/R3+X/p2tuBd0aa0eYNL3swiG6a9ljIWimF0wgZApBPuWF43jm8uCB1/K9I63kFxwMQ84= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114748; c=relaxed/simple; bh=TfZpadNwH25BfOjqAtz6ohkwyLLJpocHlfSYHcNsMdc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qpWzCi9ubYbzXxTY/Uxn0EK6qLjRgUEF9AA0GrGO9mIZE8/8ErWdlShAfomIDgK75TMFW71P8wasDm8Vg7XvHRKjjHMtcW1SKoBuAvZIzICJC6BeXd0j+XEARCj2Rx54THfh6qGeyFJNzV87d7JnbxtUsfQRlC1MBcdGm8HBfms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=F+HtXaO2; arc=none smtp.client-ip=209.85.218.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="F+HtXaO2" Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-b8f9568e074so561009666b.0 for ; Mon, 18 May 2026 07:32:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114740; x=1779719540; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RCHIPZwacuOf0o7fSIdc7VQhv0GmhSFgjV6dD0HjIec=; b=F+HtXaO2p2wsFaDm7vFpp7pWPmkr/V2aqK8EfirsJa9LuwfBuqt+NvXZODmvWpqxpv b+Rl+Vw6N+bu5diVkJJHVD4HkRWb+TooM1+DZ2YqjZGthKFdleaS8Lp82gabh/Q4+IVt MpjzgwxGihTkRPpv8RD+eW8hYjtevBW6bgHI0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114740; x=1779719540; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RCHIPZwacuOf0o7fSIdc7VQhv0GmhSFgjV6dD0HjIec=; b=LG9MFetpt9P9pBPCYysclW5ZPj70vH2ebYnghaRdvwTqjmcEs2yAHlSlGUPMmaH21w 8isUCL/X/AtiybHhY9OcDo9XbBtOmID9zDvEE8yTTckJGLk/ppVEiV2HqwYjCIQLwi1K py6WXm7RN1UhspG7yX98fTWT+5+OBuKTA4Icf5CAip3+hA9aup3XzY6uKIm6SYGJvPcF gAI6TgtKCo+7tdU0BdvYBlxXO5qseib6HA8VrZsZZrEhLz2gFRzzDUkVyf5QcTJmzPdQ nfICOFE9OMKSAnzCKifMWlrJlR7INTuohD+qvgh+A/QOr3VXbnuw3alxvwI0+aqrcdNK q7jw== X-Gm-Message-State: AOJu0YyCjy9uEoP38gQUKp40ur/PcoAfYjqDvCIIr2+GmaEkKnmL8bLm pvKKvnypj13ZG9MgiDpz4T3HkoIqjxoD2NwZwWVDlr3stoXR1H+fvYRQt+h3RatFK4vQmaeKYI7 fhVem X-Gm-Gg: Acq92OE0FGbKH4glH5SzTXB6Dpj59pbdFDvI2pnYCGbbAlhkRe3lV3XJl9Kkws+Y74+ XJ5stIrwSwH3CcfeqXtsJBgzEXbAcw6xWuf8etBlSwSCy8DRS97tEM1c0LzNsYXRapZC8lZU4Gw NMxju9nodw2clpXhDdhblc+1JHxh93kXa4g+ULJ6NKLBS2bWi7Qd7lpRzfFP3kj0JOT5IXBW/v8 oMDJO4yqZDMvghQIh7Cn16cASFjXdr6qF4PLqWczydohHmgIa6cDZN9yRbaxOjnQble53aqGy3d idrKh7Kn88EXHbkvbpxtFJBo96Q+Tca5kPu7VXYHn9FdyEuRS/ciWzTjVu/VnTheHZ1JLMGUo3O u5k776E2TsXPto+rr/6IPK4yCewBQ70NKUoa80xZYuIADHul5qh/4W2uVbRPcI64StKWBcdWnFc ekZNS7JbjosS9iFmaC9mX+cXe6u48kv+J/CcgeHUdtAL7QEsuFGGUUTzWVyvxt/qt/ebRB2dBR9 O596F1/Nn/OTejinJt0kMfqZ2utE8XbTdnQqtaJNZDynPm95u3OfTlUZx4= X-Received: by 2002:a17:907:272b:b0:bd4:4593:33bb with SMTP id a640c23a62f3a-bd517ad5b94mr840117066b.43.1779114740148; Mon, 18 May 2026 07:32:20 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:19 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 11/15] arm64: dts: st: add usart1 pins for stm32mp25 Date: Mon, 18 May 2026 16:31:26 +0200 Message-ID: <20260518143150.3138712-12-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the usart1 pins used on MicroGEA-STM32MP257-RMM board. Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boo= t/dts/st/stm32mp25-pinctrl.dtsi index 46c5197dcd63..a72c458b2c6e 100644 --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi @@ -766,6 +766,39 @@ pins { }; }; =20 + /omit-if-no-ref/ + usart1_pins_b: usart1-1 { + pins1 { + pinmux =3D ; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate =3D <0>; + }; + pins2 { + pinmux =3D ; /* USART1_RX */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + usart1_idle_pins_b: usart1-idle-1 { + pins1 { + pinmux =3D ; /* USART1_TX */ + }; + pins2 { + pinmux =3D ; /* USART1_RX */ + bias-disable; + }; + }; + + /omit-if-no-ref/ + usart1_sleep_pins_b: usart1-sleep-1 { + pins { + pinmux =3D , /* USART1_TX */ + ; /* USART1_RX */ + }; + }; + /omit-if-no-ref/ usart2_pins_a: usart2-0 { pins1 { --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D20B48035B for ; Mon, 18 May 2026 14:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114749; cv=none; b=jYoEqrbYzQTGJ6EJIcK+Co0dM3S9juxd5Fy8HJPOsbnZ//crYo1ZXPBOvQWnqevUol+iCctUNwfvFwvU1OeaPm3/FEmR/DEo8hBTQe9kzODz7830mjPFt+L03/sNo1mrPD/BYA69r4H3tJabet559wIC7aSKoW/POjTcnJPRwDg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114749; c=relaxed/simple; bh=CGY0TtS6GgsBYi1T/QYBCq6DoxGIyFcJkZLo1gMrytY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XUBIO1KOPOer9CelvjBsybn2xHG5lwGeQQkFg7JZjP3BmRmmmptLkwXcm46tPh5Wa72V0Z8pq+l3LzHC49ZcS/2BWYiLSB/47aDJuLV3Vpsmf8NIAJYkZs16KghA9eyjWU/+mYFock2hgHeDV2cMg8BmVvTQxoo4QEUBDhoe7ac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=fuyoVCdl; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fuyoVCdl" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-45562c41ec7so1380842f8f.1 for ; Mon, 18 May 2026 07:32:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114742; x=1779719542; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=F82I1V72Vx7fqVbAKfdEbmQ6SnibYwxzPYzRPk1i94Y=; b=fuyoVCdl1yFUj01HFD3CoLdLIwA0UlTKzJvlIbwz9rhnbwxXCx/3N/4rnd4hZot553 8dwWaLv+ZnR/jxX6J+Jri7JA+0WdFJ7TtFtHw4xo0PNU5KfxS6BxSO7V3mbRCaqLVBPG xFA6eBY1HHHz85rWgozfFurvE8h9Dvc6/tdxs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114742; x=1779719542; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=F82I1V72Vx7fqVbAKfdEbmQ6SnibYwxzPYzRPk1i94Y=; b=FJMOn0n+yaqgTQuQl520lI899j7Y/+rPeJk9FSxM0JrZVmlh/aYeVbXekX9f32MWcF yjIRmD+mjHU+XfFswwd5AJwcmMe7geTeHCIQhTCU0e1GTNoyXzXIdS9w0waibq81/o6G W4U+I7cUTXkVIYb8iD3RHqc5nSeON5+XqOvDcer/fKMnCkKo3uKHEAfEhZeVE3RuhGu9 D0atqanMPykvzkf13d2XFN5r8r6BjghPDqXwGHmVvIEdP/R4bHi2UCPie6wIK29ejapE oTRJgnrxpEuFLn9hrjIWZuAGVMjqWrtV+2lViKELfdwbaB87xnnuxKmGMuYR2FA3CLwx Btwg== X-Gm-Message-State: AOJu0Yz0g81A4VgaFx0lKcnknYvR2Lgq8czF1xQOU5h0+az6lcqzwCsx kPDYrpNlL+Jw73VuPsUvssn1y7FDUmqlJTTinbTVyR53OCvLqfp05ntVxiij4z0tfkJ7b1nQQFf RS0rq X-Gm-Gg: Acq92OGauhPy2uxLu1Cr65CIZULv6x6juLbMmi9OSddH2sWj8k8z8sSZH2ajZwiDHYD r3FMBAdgTOZaxFXg74Mikrjnq9cQeW+OFyscaSQL84Ptu+radCu9hMhDN2TL8lcjveNTfC37rqT 7T9ZtVCXwUZQ3SipSYID4s4ebXKacCopPxW51kZ6gAMTahUicP7LbEg+71oPknA6nj2cYX28jKF v7LIdKSqCBaPs+32u+aEzUa8oEAKj5bL8bif7+t33ZLJyeHHjyelykjSg3cY/+t6XkRi07oENYU XduceubsA1+bUfZLDV5abG41vFO6c7+o5CdccDYJnPY01kREP8Q5Tc7MNAJmoNDweuI63DKS2gZ Am6+ERyxZVnYCox2apHH9PI2AtVl02BgGFMm8Q8B+ZukmtBCfdNPUobZrXvcBlD19mJpN+ybIA6 shp/blBuFbOx4S8+dFMV/z6X4WcWadaz2zztBtHWOgh10i9GZWnGnYz0hlIsqxebGp5PYsd0i2i MefWV1ANlYIaEF81GdpyHOOEWaGnm3P1DKKp4X1HRAGgk8JveO1yYQQg0gYXBk6TatyGQ== X-Received: by 2002:a05:6000:438a:b0:45e:82b7:c260 with SMTP id ffacd0b85a97d-45e82b7c364mr4097773f8f.2.1779114742339; Mon, 18 May 2026 07:32:22 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:21 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 12/15] arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM Date: Mon, 18 May 2026 16:31:27 +0200 Message-ID: <20260518143150.3138712-13-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support Engicam MicroGEA-STM32MP257 SoM with: - 8 GB eMMC Flash - 2 GB LPDDR4 DRAM The SoM also provides an Ethernet MAC, but Ethernet support is not enabled at this stage due to a known silicon limitation documented in [1]. This corresponds to section 2.21.2 ("ETH1 RMII mode could have CRC errors"), where CRC errors may occur in ETH1 RMII direct mode when directly connected to I/Os. The workaround requires use of the Ethernet switch (ETHSW), which introduces additional DT bindings and topology complexity. This is intended to be addressed in a separate patch series. [1] https://www.st.com/resource/en/errata_sheet/es0598-stm32mp23xx25xx-devi= ce-errata-stmicroelectronics.pd Signed-off-by: Dario Binacchi --- .../dts/st/stm32mp257-engicam-microgea.dtsi | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi diff --git a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi b/arch= /arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi new file mode 100644 index 000000000000..67be66cd1930 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2026 Amarula Solutions, Dario Binacchi + * Copyright (C) 2026 Engicam srl + */ + +/dts-v1/; + +#include +#include "stm32mp257.dtsi" +#include "stm32mp25xf.dtsi" +#include "stm32mp25-pinctrl.dtsi" +#include "stm32mp25xxai-pinctrl.dtsi" + +/ { + model =3D "Engicam MicroGEA STM32MP257 SoM"; + compatible =3D "engicam,microgea-stm32mp257", "st,stm32mp257"; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x0 0x80000000 0x0 0x80000000>; + }; +}; + +&scmi_regu { + scmi_vddio1: regulator@0 { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + scmi_vddcore: regulator@b { + reg =3D ; + regulator-name =3D "vddcore"; + }; + scmi_v1v8: regulator@e { + reg =3D ; + regulator-name =3D "v1v8"; + }; + scmi_v3v3: regulator@10 { + reg =3D ; + regulator-name =3D "v3v3"; + }; + scmi_vdd3v3_usb: regulator@14 { + reg =3D ; + regulator-name =3D "vdd3v3_usb"; + }; +}; + +/* eMMC */ +&sdmmc2 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; + pinctrl-1 =3D <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; + pinctrl-2 =3D <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; + non-removable; + no-sd; + no-sdio; + st,neg-edge; + bus-width =3D <8>; + vmmc-supply =3D <&scmi_v3v3>; + vqmmc-supply =3D <&scmi_vddio2>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status =3D "okay"; +}; --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F2F04657CC for ; Mon, 18 May 2026 14:32:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114753; cv=none; b=iOyr3aGVN6DKT+ngRpFNhjOWt+Ycs0Hph15CfGH8wFsSR11UDVQLtkEdvAfsTY++TyQFqVJP2BYhAc7boHVmYaCv+Gh9DySv6j9aFYxPoqIBzY0hrKmb+fUTWcsXGRIrF5GksLUU5jPd+UVUnqSFnl0GNSC+iwjSZWyX5E7+iqk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114753; c=relaxed/simple; bh=QcL50GK3pIVA9DLn5XG/jcTBE4S3HFxFhOYzKKnA77w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Rf1dJXW5NoC2GKt9ydW7+CqKIa4yA0km5+qSeNxZfK6E1STUOkuFsriijQBzKX1VP6glHJAhWbudCHauupsrALIE82LcFbPs7X+KjjhAUUYDY1PiqsB8dk3bf96646DA8wdaCSsXIpkCHeT/OvFgY1fNEckkKHnTVwbPyYvF/Xs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=aDFEq0Sn; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="aDFEq0Sn" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-4893940bb5eso12105935e9.3 for ; Mon, 18 May 2026 07:32:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114744; x=1779719544; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dBFHri4QRA65S7SM46tdHQTdd72pRFh4hnk7KaMPjyI=; b=aDFEq0SngA1inIj9kz2LNkBnTt8qxpA8m2kbra7RwJlaaBctg7fxN9Eyov9oiNizzd idf0vxLkymsj579U97MLc8jMeBP2+iAWFoGDhGzvsKD66pS16MI1xDsseNmBuknu86sX r316c5G3ZX98UfRUhcfogEev8Wd2Pk9mXlZQE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114744; x=1779719544; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=dBFHri4QRA65S7SM46tdHQTdd72pRFh4hnk7KaMPjyI=; b=TOS+wk6y0FvORkXBt7oVItUX+/JIwy5u0MjqF3V1gTLYBYka+h6OIZCu4H4AJhR+7z O0HCLUlRF1G//HldueSmgwAqd5Vm62hjWPRiuuaSAkaDbsl6sgkvqB8SVh3cgnfsr0+V lFrnRFqH3WCvtILq+169NR0M/gCjZp7AtSo5JF0yQ2e1Fe+cNsYAWMjWa9VBGIYZ4o8H DOWPUttLOan+Q3A/u/xQhMgwuAXMnqFAreiwJakpFxL8lX1xENSRqd5rdoj74tvQg9SU Ev0i7qHKyWEqSzgKNmDSoCTV7xYuBLci10/6WyC3g8oPlrr15SFKeRnQJSSpA1FfH8qC WzaA== X-Gm-Message-State: AOJu0Yy9zfEwAfZwP8RByv5npB3HN1pViNLhO0FNB9WhR8i8ZHCuDLrE anNfzok/oWqfxETWufq3qOBIO1wcY74EnOipXsh7LlR+dj+GZO/743kJNiE35Zx4mIX+mS8P+0H hvPLi X-Gm-Gg: Acq92OFU6lX0T5+/R7QZdH2+GKZiFVjSmwp06l/W1E1jlL5q4VlprmDxDYX14KVcUNV LhwsTVLUxc8l4v5KO6TND8d9OW9tWIcXVTOYVOcvXYiEU680GMAYSH4ubMPjk6LQsTT33lxIPSf XeecJgt4MKAjwsMHvM1pPcYAVjR9aazpY9pk+MvY0LlDgnxNOOdY2s65pkm/k/It/Usom7HOiZh tVEUllzY22oZR776ZiHZGojrRsVrLZNq6xMOd7YbvbeSq7AFr/dFN+8+IpajjyQyV2NAGM86fmJ vjHSMi6pRHIJVmNUC05rSL2W2xCoGYg7/KMIZjqpqVYytXJWiVv2SSvIj8usBBat02cPih22Uft LxFNCnV+yqrQNfSglO0C5SPiYKriB9kUjhrZIeOcPUruO06XpEquT9BDInY8F9o/geygAzsMmt9 5hDXo/CD3GLPk5hz8OlFnuxg8STGakSkXLH58ck2j/ixBWbPHqbKbZiHSAxaSs5+uhq5jAEuD8u 3tw+O2QDXlD9nbAqnGcFJy/0MwCJ36j7rD+HCVYQxGvdWK8kS3C2mtxRM5QSZOfBU7ecw== X-Received: by 2002:a05:600c:a405:b0:48a:52ce:a4b1 with SMTP id 5b1f17b1804b1-48fe60dd5e8mr228451065e9.15.1779114744494; Mon, 18 May 2026 07:32:24 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:24 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH 13/15] arm64: dts: st: support Engicam MicroGEA-STM32MP257-RMM board Date: Mon, 18 May 2026 16:31:28 +0200 Message-ID: <20260518143150.3138712-14-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support for Engicam MicroGEA-STM32MP257-RMM board with: - 8 GB eMMC Flash - 2 GB LPDDR4 DRAM - CAN - LEDs - LCD panel with touchscreen - Micro SD card connector - Audio codec - Buzzer Signed-off-by: Dario Binacchi --- arch/arm64/boot/dts/st/Makefile | 1 + .../st/stm32mp257-engicam-microgea-rmm.dts | 321 ++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.= dts diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makef= ile index 63908113ae36..386eca593c54 100644 --- a/arch/arm64/boot/dts/st/Makefile +++ b/arch/arm64/boot/dts/st/Makefile @@ -2,5 +2,6 @@ dtb-$(CONFIG_ARCH_STM32) +=3D \ stm32mp215f-dk.dtb \ stm32mp235f-dk.dtb \ + stm32mp257-engicam-microgea-rmm.dtb \ stm32mp257f-dk.dtb \ stm32mp257f-ev1.dtb diff --git a/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts b/a= rch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts new file mode 100644 index 000000000000..1d5e023b3b44 --- /dev/null +++ b/arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2026 Amarula Solutions, Dario Binacchi + * Copyright (C) 2026 Engicam srl + */ + +/dts-v1/; + +#include +#include +#include + +#include "stm32mp257-engicam-microgea.dtsi" + +/ { + model =3D "Engicam MicroGEA STM32MP257D RMM Board"; + compatible =3D "engicam,microgea-stm32mp257-rmm", + "engicam,microgea-stm32mp257", "st,stm32mp257"; + + aliases { + mmc0 =3D &sdmmc1; + mmc1 =3D &sdmmc2; + serial0 =3D &usart2; + serial1 =3D &usart1; + }; + + backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <0 100>; + num-interpolated-steps =3D <100>; + default-brightness-level =3D <85>; + pwms =3D <&pwm2 0 100000 0>; + }; + + buzzer { + compatible =3D "pwm-beeper"; + pwms =3D <&pwm4 0 1000000 0>; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + framebuffer { + compatible =3D "simple-framebuffer"; + clocks =3D <&rcc CK_BUS_LTDC>, <&rcc CK_KER_LTDC>; + lcd-supply =3D <®_3v3>; + status =3D "disabled"; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + led-0 { + gpios =3D <&gpioh 2 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + status =3D "okay"; + }; + + led-1 { + gpios =3D <&gpioh 6 GPIO_ACTIVE_HIGH>; + default-state =3D "off"; + status =3D "okay"; + }; + }; + + mclk: clock-mclk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + }; + + reg_1v8: regulator-1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_ext_pwr: regulator-ext-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "ext-pwr"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpiog 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + sound { + compatible =3D "audio-graph-card"; + label =3D "STM32MP25-RMM"; + widgets =3D "Headphone", "Headphone Jack", + "Microphone", "Microphone Jack"; + routing =3D "Headphone Jack", "HP_OUT", + "MIC_IN", "Microphone Jack", + "Microphone Jack", "Mic Bias"; + dais =3D <&sai1a_port &sai1b_port>; + status =3D "okay"; + }; +}; + +&arm_wdt { + timeout-sec =3D <32>; + status =3D "okay"; +}; + +&i2c1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c1_pins_a>; + pinctrl-1 =3D <&i2c1_sleep_pins_a>; + i2c-scl-rising-time-ns =3D <185>; + i2c-scl-falling-time-ns =3D <20>; + status =3D "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + touchscreen@38 { + compatible =3D "edt,edt-ft5306"; + reg =3D <0x38>; + interrupt-parent =3D <&gpiob>; + interrupts =3D <0 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&gpiod 1 GPIO_ACTIVE_LOW>; + touchscreen-size-x =3D <1280>; + touchscreen-size-y =3D <800>; + }; +}; + +&i2c2 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&i2c2_pins_a>; + pinctrl-1 =3D <&i2c2_sleep_pins_a>; + i2c-scl-rising-time-ns =3D <185>; + i2c-scl-falling-time-ns =3D <20>; + status =3D "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + sgtl5000: codec@a { + compatible =3D "fsl,sgtl5000"; + reg =3D <0x0a>; + #sound-dai-cells =3D <0>; + clocks =3D <&mclk>; + + VDDA-supply =3D <®_3v3>; + VDDIO-supply =3D <®_3v3>; + VDDD-supply =3D <®_1v8>; + + sgtl5000_port: port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + sgtl5000_tx_endpoint: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&sai1a_endpoint>; + frame-master =3D <&sgtl5000_tx_endpoint>; + bitclock-master =3D <&sgtl5000_tx_endpoint>; + }; + + sgtl5000_rx_endpoint: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&sai1b_endpoint>; + frame-master =3D <&sgtl5000_rx_endpoint>; + bitclock-master =3D <&sgtl5000_rx_endpoint>; + }; + }; + }; +}; + +<dc { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <<dc_pins_a>; + pinctrl-1 =3D <<dc_sleep_pins_a>; + status =3D "okay"; + + port { + ltdc_out: endpoint { + remote-endpoint =3D <&panel_in>; + }; + }; +}; + +&m_can1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&m_can1_pins_a>; + pinctrl-1 =3D <&m_can1_sleep_pins_a>; + status =3D "okay"; +}; + +&sai1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&sai1a_pins_a>, <&sai1b_pins_a>; + pinctrl-1 =3D <&sai1a_sleep_pins_a>, <&sai1b_sleep_pins_a>; + status =3D "okay"; + clocks =3D <&rcc CK_KER_SAI1>; + + sai1a: audio-controller@40290004 { + #clock-cells =3D <0>; + dma-names =3D "tx"; + status =3D "okay"; + + sai1a_port: port { + sai1a_endpoint: endpoint { + remote-endpoint =3D <&sgtl5000_tx_endpoint>; + dai-format =3D "i2s"; + mclk-fs =3D <512>; + }; + }; + }; + + sai1b: audio-controller@40290024 { + dma-names =3D "rx"; + st,sync =3D <&sai1a 2>; + clocks =3D <&rcc CK_KER_SAI1>, <&sai1a>; + clock-names =3D "sai_ck", "MCLK"; + status =3D "okay"; + + sai1b_port: port { + sai1b_endpoint: endpoint { + remote-endpoint =3D <&sgtl5000_rx_endpoint>; + dai-format =3D "i2s"; + mclk-fs =3D <512>; + }; + }; + }; +}; + +/* MicroSD */ +&sdmmc1 { + pinctrl-names =3D "default", "opendrain", "sleep"; + pinctrl-0 =3D <&sdmmc1_b4_pins_a>; + pinctrl-1 =3D <&sdmmc1_b4_od_pins_a>; + pinctrl-2 =3D <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + disable-wp; + st,neg-edge; + bus-width =3D <4>; + vmmc-supply =3D <&scmi_v3v3>; + vqmmc-supply =3D <&scmi_vddio1>; + no-1-8-v; + status =3D "okay"; +}; + +&spi1 { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&spi1_pins_a>; + pinctrl-1 =3D <&spi1_sleep_pins_a>; + #address-cells =3D <1>; + #size-cells =3D <0>; + cs-gpios =3D <&gpioh 8 GPIO_ACTIVE_HIGH>, <&gpioh 3 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + + display: display@0 { + compatible =3D "rocktech,rk050hr345-ct106a", "ilitek,ili9806e"; + reg =3D <0>; + vdd-supply =3D <®_3v3>; + spi-max-frequency =3D <10000000>; + reset-gpios =3D <&gpiob 6 GPIO_ACTIVE_LOW>; + backlight =3D <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint =3D <<dc_out>; + }; + }; + }; +}; + +&timers2 { + status =3D "okay"; + + pwm2: pwm { + pinctrl-0 =3D <&pwm2_pins_a>; + pinctrl-1 =3D <&pwm2_sleep_pins_a>; + pinctrl-names =3D "default", "sleep"; + status =3D "okay"; + }; +}; + +&timers4 { + status =3D "okay"; + + pwm4: pwm { + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <&pwm4_pins_a>; + pinctrl-1 =3D <&pwm4_sleep_pins_a>; + status =3D "okay"; + }; +}; + +&usart1 { + pinctrl-names =3D "default", "idle", "sleep"; + pinctrl-0 =3D <&usart1_pins_b>; + pinctrl-1 =3D <&usart1_idle_pins_b>; + pinctrl-2 =3D <&usart1_sleep_pins_b>; + /delete-property/ dmas; + /delete-property/ dma-names; + status =3D "okay"; +}; + +&usart2 { + pinctrl-names =3D "default", "idle", "sleep"; + pinctrl-0 =3D <&usart2_pins_a>; + pinctrl-1 =3D <&usart2_idle_pins_a>; + pinctrl-2 =3D <&usart2_sleep_pins_a>; + /delete-property/ dmas; + /delete-property/ dma-names; + status =3D "okay"; +}; --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D55D74949EA for ; Mon, 18 May 2026 14:32:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114755; cv=none; b=Ee4LC/jjJ/f6yiYK1sqgLshOLMVZRKgkjJEfQcy6HPTl6msDTTZk9JPeZ7mSgvFcTAvikTESmx8H5olObzyYV1AuNyH/MsT8SWKoPxUuNtKQcanUP1y6y9EV/wMhU3od/Wnc0kb7Z7RHSDBP0QyflUrgWBu8v8mAfP0MR17OHzw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114755; c=relaxed/simple; bh=mDUbCr3s4MyKxkH/Tt7G8WlFwXwbhjTHbRt6CTXfXig=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HEYVqyj6FZrMse4qUCaBvR+0aMwvgYiimrBC9qu+bQVCx+a++sbOCe/btKnp35ijGsi6619jhTYwJey2Hi6dVBQrqHFiR62nsfcLkrDjT6J/lD3R7nAbTZc39FZuzvtjCfXIrM02TBHbJ+pKHc3PzcvfpuUTYWcegLphrCGSE4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=FqAkiXfi; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="FqAkiXfi" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-44509921fbcso1394593f8f.3 for ; Mon, 18 May 2026 07:32:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114746; x=1779719546; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3LeToHfHnc3GATlqq9UztOBog8XR4SfglqePQB4LTjY=; b=FqAkiXfizy6GQESHEfzLXhOLPbOAajjaQxhqxJkeYr7ImysCgtIgUdmtU8+ZJXgba4 hBuC3WgUcIzGt4XZxfcv3jDMp+oHG48peJSKpflBW2ITmpgr6XVKi65zaouGdE/kJBs5 e6zC+b8X3227euvDtY8rxYTiLUMa3TqiyfMac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114746; x=1779719546; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3LeToHfHnc3GATlqq9UztOBog8XR4SfglqePQB4LTjY=; b=EfbyMke613g0w5pGEAh6yX5IZbGWZ1ech8wDkrZyKk7Mq+K+5Tm6COkrhA8xbBV2Ul Bmc8AbJkBbCH4Cv9EAey3zXyg3XQiVPyZeuyora9XTR93ibTsGQBHPu7cVmOYAuQ6P1t YkBXknqDZHoL4/BlMTJrlRaQ8cqF3W9uncl67GrCP8VODQv/BlMOC8sQwbjd9JX26v3N uCtDd99PyOBThyPy3E5VpKQTwagzzMUQTP8XfkSAhmlRoD4dMbFXxbH3SKtqECGzp82g NQHsbAyTNNbyaR6wAi0MxQIFp3WQa+Ll5iL957zzcgPBMbew6SvAMPakBfLJrypDC+Dm Bc0Q== X-Gm-Message-State: AOJu0YxEA8VPYX6tw1ek1foqbbfNQaUtXUrZ22c1f33JMdWcOCHlbiqg LPh6mSrpUhmDgptkI8gm57GbjX19ghlvbXxpqyrMR27a3Wzdf2srKSrCu9v4XQeewHJkVdpwwMU BDV3x X-Gm-Gg: Acq92OHfGg4/yTmyy5YHhOkbTz9SX+BZEfERQnf3GemBc2GveSeLmTmMVkK4bDLlgLd KXIk/B0Aj3y1hIVLg4q9q336owrhRRJSK25vdxeltqwdDfLrMV10aQ3XU34Y2Kc9gvkwK21PgtE wcG/tw+YA/QL3SDAsZ4O/5FUnyrwVJkkwU9Yk74x9GvqMTiT6yqlqVkT7e3VV9wMCBJcOPCFfBl OVe9ick+gfXePGkrH3oO42r6MTrgXH6vkS2W1Fx7e2/nSdvwGVu/PmYfUh9WcQLiD6bQSpvvpGi i9N7woQr96V25+CfhTQy4taLux+p6EUJI82I+t70HCxL7QjHYQ7LWa0rNjDmO/uwc+Bf6bhKxoK 0PRDq7t07zNLlzACjnuV0OCKSyHHGgNfROfi7BkQ0B8+s8FEZKORT76VWOlX3JbT9VSD7uJAicA OJukrPeyj7PiCupeQdZYYXxZ7Q2VQvqE4+0+zoG2vk+CLuDj9cGkh+bLeLqI9wuD0fdzfJ/GqdQ kyHuNmGq66RJ53mn7EqP9u4idIWQRrHZpFkwUEfGc9ogmQMbDpSiWXXWb8= X-Received: by 2002:a5d:5d83:0:b0:43d:71f4:7ed4 with SMTP id ffacd0b85a97d-45e5c5a0545mr25699887f8f.15.1779114746414; Mon, 18 May 2026 07:32:26 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:25 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Arnd Bergmann , Bjorn Andersson , Dmitry Baryshkov , Eric Biggers , Geert Uytterhoeven , Krzysztof Kozlowski , Luca Weiss , Michal Simek , Sven Peter Subject: [PATCH 14/15] arm64: defconfig: cleanup the defconfig Date: Mon, 18 May 2026 16:31:29 +0200 Message-ID: <20260518143150.3138712-15-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Cleanup defconfig by doing: make defconfig make savedefconfig cp defconfig arch/arm64/configs/defconfig No functional change. The goal here is to cleanup defconfig file to make easier and cleaner the addition of new entries. Signed-off-by: Dario Binacchi --- arch/arm64/configs/defconfig | 289 +++++++++++++---------------------- 1 file changed, 107 insertions(+), 182 deletions(-) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d905a0777f93..89730d2ec954 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -32,7 +32,6 @@ CONFIG_KALLSYMS_ALL=3Dy CONFIG_PROFILING=3Dy CONFIG_KEXEC=3Dy CONFIG_KEXEC_FILE=3Dy -CONFIG_CRASH_DUMP=3Dy CONFIG_ARCH_ACTIONS=3Dy CONFIG_ARCH_AIROHA=3Dy CONFIG_ARCH_SUNXI=3Dy @@ -50,7 +49,6 @@ CONFIG_ARCH_BLAIZE=3Dy CONFIG_ARCH_BST=3Dy CONFIG_ARCH_CIX=3Dy CONFIG_ARCH_EXYNOS=3Dy -CONFIG_ARCH_SPARX5=3Dy CONFIG_ARCH_K3=3Dy CONFIG_ARCH_LG1K=3Dy CONFIG_ARCH_HISI=3Dy @@ -58,6 +56,7 @@ CONFIG_ARCH_KEEMBAY=3Dy CONFIG_ARCH_MEDIATEK=3Dy CONFIG_ARCH_MESON=3Dy CONFIG_ARCH_MICROCHIP=3Dy +CONFIG_ARCH_SPARX5=3Dy CONFIG_ARCH_MVEBU=3Dy CONFIG_ARCH_NXP=3Dy CONFIG_ARCH_LAYERSCAPE=3Dy @@ -99,7 +98,6 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=3Dy CONFIG_CPU_FREQ_GOV_ONDEMAND=3Dy CONFIG_CPU_FREQ_GOV_CONSERVATIVE=3Dm CONFIG_CPUFREQ_DT=3Dy -CONFIG_ACPI_CPPC_CPUFREQ=3Dm CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=3Dm CONFIG_ARM_APPLE_SOC_CPUFREQ=3Dm CONFIG_ARM_ARMADA_37XX_CPUFREQ=3Dy @@ -112,6 +110,7 @@ CONFIG_ARM_RASPBERRYPI_CPUFREQ=3Dm CONFIG_ARM_SCMI_CPUFREQ=3Dy CONFIG_ARM_TEGRA186_CPUFREQ=3Dy CONFIG_QORIQ_CPUFREQ=3Dy +CONFIG_ACPI_CPPC_CPUFREQ=3Dm CONFIG_ACPI=3Dy CONFIG_ACPI_HOTPLUG_MEMORY=3Dy CONFIG_ACPI_HMAT=3Dy @@ -122,10 +121,9 @@ CONFIG_ACPI_APEI_MEMORY_FAILURE=3Dy CONFIG_ACPI_APEI_EINJ=3Dy CONFIG_VIRTUALIZATION=3Dy CONFIG_KVM=3Dy -CONFIG_JUMP_LABEL=3Dy CONFIG_MODULES=3Dy CONFIG_MODULE_UNLOAD=3Dy -CONFIG_IOSCHED_BFQ=3Dy +CONFIG_BLK_INLINE_ENCRYPTION=3Dy # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_COMPAT_BRK is not set CONFIG_MEMORY_HOTPLUG=3Dy @@ -135,36 +133,22 @@ CONFIG_MEMORY_FAILURE=3Dy CONFIG_TRANSPARENT_HUGEPAGE=3Dy CONFIG_NET=3Dy CONFIG_PACKET=3Dy -CONFIG_UNIX=3Dy -CONFIG_INET=3Dy CONFIG_IP_MULTICAST=3Dy CONFIG_IP_PNP=3Dy CONFIG_IP_PNP_DHCP=3Dy CONFIG_IP_PNP_BOOTP=3Dy -CONFIG_IPV6=3Dy CONFIG_NETFILTER=3Dy CONFIG_BRIDGE_NETFILTER=3Dm CONFIG_NF_CONNTRACK=3Dm CONFIG_NF_CONNTRACK_EVENTS=3Dy CONFIG_NETFILTER_XT_MARK=3Dm -CONFIG_NETFILTER_XT_TARGET_CHECKSUM=3Dm CONFIG_NETFILTER_XT_TARGET_LOG=3Dm CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=3Dm CONFIG_NETFILTER_XT_MATCH_CONNTRACK=3Dm CONFIG_NETFILTER_XT_MATCH_IPVS=3Dm CONFIG_IP_VS=3Dm CONFIG_IP_NF_IPTABLES=3Dm -CONFIG_IP_NF_FILTER=3Dm -CONFIG_IP_NF_TARGET_REJECT=3Dm -CONFIG_IP_NF_NAT=3Dm -CONFIG_IP_NF_TARGET_MASQUERADE=3Dm -CONFIG_IP_NF_MANGLE=3Dm CONFIG_IP6_NF_IPTABLES=3Dm -CONFIG_IP6_NF_FILTER=3Dm -CONFIG_IP6_NF_TARGET_REJECT=3Dm -CONFIG_IP6_NF_MANGLE=3Dm -CONFIG_IP6_NF_NAT=3Dm -CONFIG_IP6_NF_TARGET_MASQUERADE=3Dm CONFIG_BRIDGE=3Dm CONFIG_BRIDGE_VLAN_FILTERING=3Dy CONFIG_NET_DSA=3Dm @@ -182,8 +166,8 @@ CONFIG_NET_CLS_FLOWER=3Dm CONFIG_NET_CLS_ACT=3Dy CONFIG_NET_ACT_GACT=3Dm CONFIG_NET_ACT_MIRRED=3Dm -CONFIG_HSR=3Dm CONFIG_NET_ACT_GATE=3Dm +CONFIG_HSR=3Dm CONFIG_QRTR_SMD=3Dm CONFIG_QRTR_TUN=3Dm CONFIG_CAN=3Dm @@ -205,7 +189,6 @@ CONFIG_BT_QCOMSMD=3Dm CONFIG_BT_NXPUART=3Dm CONFIG_CFG80211=3Dm CONFIG_MAC80211=3Dm -CONFIG_MAC80211_LEDS=3Dy CONFIG_RFKILL=3Dm CONFIG_RFKILL_GPIO=3Dm CONFIG_NET_9P=3Dy @@ -259,14 +242,13 @@ CONFIG_PCIE_LAYERSCAPE_GEN4=3Dy CONFIG_PCI_ENDPOINT=3Dy CONFIG_PCI_ENDPOINT_CONFIGFS=3Dy CONFIG_PCI_EPF_TEST=3Dm -CONFIG_PCI_PWRCTRL_GENERIC=3Dm CONFIG_DEVTMPFS=3Dy CONFIG_DEVTMPFS_MOUNT=3Dy CONFIG_FW_LOADER_USER_HELPER=3Dy CONFIG_HISILICON_LPC=3Dy +CONFIG_IMX_AIPSTZ=3Dm CONFIG_TEGRA_ACONNECT=3Dm CONFIG_MHI_BUS_PCI_GENERIC=3Dm -CONFIG_ARM_SCMI_PROTOCOL=3Dy CONFIG_ARM_SCPI_PROTOCOL=3Dy CONFIG_RASPBERRYPI_FIRMWARE=3Dy CONFIG_INTEL_STRATIX10_SERVICE=3Dy @@ -276,7 +258,6 @@ CONFIG_GOOGLE_FIRMWARE=3Dy CONFIG_GOOGLE_CBMEM=3Dm CONFIG_GOOGLE_COREBOOT_TABLE=3Dm CONFIG_EFI_CAPSULE_LOADER=3Dy -CONFIG_IMX_AIPSTZ=3Dm CONFIG_IMX_SCU=3Dy CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE=3Dy CONFIG_QCOM_QSEECOM=3Dy @@ -303,11 +284,12 @@ CONFIG_MTD_NAND_MARVELL=3Dy CONFIG_MTD_NAND_BRCMNAND=3Dm CONFIG_MTD_NAND_FSL_IFC=3Dy CONFIG_MTD_NAND_QCOM=3Dy -CONFIG_MTD_SPI_NOR=3Dy CONFIG_MTD_SPI_NAND=3Dm +CONFIG_MTD_SPI_NOR=3Dy CONFIG_MTD_UBI=3Dm CONFIG_MTD_HYPERBUS=3Dm CONFIG_HBMC_AM654=3Dm +CONFIG_OF_OVERLAY=3Dy CONFIG_BLK_DEV_LOOP=3Dy CONFIG_BLK_DEV_NBD=3Dm CONFIG_VIRTIO_BLK=3Dy @@ -321,6 +303,7 @@ CONFIG_XILINX_SDFEC=3Dm CONFIG_EEPROM_AT24=3Dm CONFIG_EEPROM_AT25=3Dm CONFIG_UACCE=3Dm +CONFIG_MISC_RP1=3Dm # CONFIG_SCSI_PROC_FS is not set CONFIG_BLK_DEV_SD=3Dy CONFIG_SCSI_SAS_ATA=3Dy @@ -339,7 +322,6 @@ CONFIG_AHCI_XGENE=3Dy CONFIG_AHCI_QORIQ=3Dy CONFIG_SATA_SIL24=3Dy CONFIG_SATA_RCAR=3Dy -CONFIG_PATA_PLATFORM=3Dy CONFIG_PATA_OF_PLATFORM=3Dy CONFIG_MD=3Dy CONFIG_BLK_DEV_MD=3Dm @@ -423,8 +405,8 @@ CONFIG_REALTEK_PHY=3Dy CONFIG_ROCKCHIP_PHY=3Dy CONFIG_DP83867_PHY=3Dy CONFIG_DP83869_PHY=3Dm -CONFIG_DP83TG720_PHY=3Dm CONFIG_DP83TD510_PHY=3Dy +CONFIG_DP83TG720_PHY=3Dm CONFIG_VITESSE_PHY=3Dy CONFIG_XILINX_GMII2RGMII=3Dm CONFIG_CAN_FLEXCAN=3Dm @@ -563,7 +545,6 @@ CONFIG_I2C_MUX_PINCTRL=3Dm CONFIG_I2C_BCM2835=3Dm CONFIG_I2C_CADENCE=3Dm CONFIG_I2C_DESIGNWARE_CORE=3Dy -CONFIG_I2C_DESIGNWARE_PLATFORM=3Dy CONFIG_I2C_GPIO=3Dm CONFIG_I2C_IMX=3Dy CONFIG_I2C_IMX_LPI2C=3Dy @@ -630,8 +611,6 @@ CONFIG_SPMI=3Dy CONFIG_SPMI_APPLE=3Dm CONFIG_SPMI_MTK_PMIF=3Dm CONFIG_PINCTRL_APPLE_GPIO=3Dm -CONFIG_PINCTRL_BRCMSTB=3Dy -CONFIG_PINCTRL_BCM2712=3Dy CONFIG_PINCTRL_DA9062=3Dm CONFIG_PINCTRL_MAX77620=3Dy CONFIG_PINCTRL_RK805=3Dm @@ -640,17 +619,10 @@ CONFIG_PINCTRL_SX150X=3Dm CONFIG_PINCTRL_OWL=3Dy CONFIG_PINCTRL_S700=3Dy CONFIG_PINCTRL_S900=3Dy -CONFIG_PINCTRL_IMX8MM=3Dy -CONFIG_PINCTRL_IMX8MN=3Dy -CONFIG_PINCTRL_IMX8MP=3Dy -CONFIG_PINCTRL_IMX8MQ=3Dy -CONFIG_PINCTRL_IMX8QM=3Dy -CONFIG_PINCTRL_IMX8QXP=3Dy -CONFIG_PINCTRL_IMX8DXL=3Dy -CONFIG_PINCTRL_IMX8ULP=3Dy -CONFIG_PINCTRL_IMX91=3Dy -CONFIG_PINCTRL_IMX93=3Dy +CONFIG_PINCTRL_BRCMSTB=3Dy +CONFIG_PINCTRL_BCM2712=3Dy CONFIG_PINCTRL_IMX_SCMI=3Dy +CONFIG_PINCTRL_IMX91=3Dy CONFIG_PINCTRL_MSM=3Dy CONFIG_PINCTRL_ELIZA=3Dy CONFIG_PINCTRL_GLYMUR=3Dy @@ -674,7 +646,6 @@ CONFIG_PINCTRL_QCS615=3Dy CONFIG_PINCTRL_QCS8300=3Dy CONFIG_PINCTRL_QDF2XXX=3Dy CONFIG_PINCTRL_QDU1000=3Dy -CONFIG_PINCTRL_RP1=3Dm CONFIG_PINCTRL_SA8775P=3Dy CONFIG_PINCTRL_SC7180=3Dy CONFIG_PINCTRL_SC7280=3Dy @@ -719,9 +690,9 @@ CONFIG_GPIO_PL061=3Dy CONFIG_GPIO_RCAR=3Dy CONFIG_GPIO_SYSCON=3Dy CONFIG_GPIO_UNIPHIER=3Dy +CONFIG_GPIO_VF610=3Dy CONFIG_GPIO_VISCONTI=3Dy CONFIG_GPIO_WCD934X=3Dm -CONFIG_GPIO_VF610=3Dy CONFIG_GPIO_XGENE=3Dy CONFIG_GPIO_XGENE_SB=3Dy CONFIG_GPIO_XILINX=3Dm @@ -729,9 +700,9 @@ CONFIG_GPIO_ZYNQ=3Dm CONFIG_GPIO_MAX732X=3Dy CONFIG_GPIO_PCA953X=3Dy CONFIG_GPIO_PCA953X_IRQ=3Dy -CONFIG_GPIO_ADP5585=3Dm CONFIG_GPIO_PCF857X=3Dm CONFIG_GPIO_TPIC2810=3Dm +CONFIG_GPIO_ADP5585=3Dm CONFIG_GPIO_BD9571MWV=3Dm CONFIG_GPIO_MACSMC=3Dm CONFIG_GPIO_MAX77620=3Dy @@ -770,7 +741,6 @@ CONFIG_SENSORS_AMC6821=3Dm CONFIG_SENSORS_INA2XX=3Dm CONFIG_SENSORS_INA3221=3Dm CONFIG_SENSORS_TMP102=3Dm -CONFIG_MISC_RP1=3Dm CONFIG_THERMAL_GOV_POWER_ALLOCATOR=3Dy CONFIG_CPU_THERMAL=3Dy CONFIG_DEVFREQ_THERMAL=3Dy @@ -781,11 +751,6 @@ CONFIG_K3_THERMAL=3Dm CONFIG_QORIQ_THERMAL=3Dm CONFIG_SUN8I_THERMAL=3Dy CONFIG_ROCKCHIP_THERMAL=3Dm -CONFIG_RCAR_THERMAL=3Dy -CONFIG_RCAR_GEN3_THERMAL=3Dy -CONFIG_RZG2L_THERMAL=3Dy -CONFIG_RZG3E_THERMAL=3Dy -CONFIG_RZG3S_THERMAL=3Dm CONFIG_ARMADA_THERMAL=3Dy CONFIG_MTK_THERMAL=3Dm CONFIG_MTK_LVTS_THERMAL=3Dm @@ -793,6 +758,11 @@ CONFIG_BCM2711_THERMAL=3Dm CONFIG_BCM2835_THERMAL=3Dm CONFIG_BRCMSTB_THERMAL=3Dm CONFIG_EXYNOS_THERMAL=3Dy +CONFIG_RCAR_THERMAL=3Dy +CONFIG_RCAR_GEN3_THERMAL=3Dy +CONFIG_RZG2L_THERMAL=3Dy +CONFIG_RZG3E_THERMAL=3Dy +CONFIG_RZG3S_THERMAL=3Dm CONFIG_TEGRA_SOCTHERM=3Dm CONFIG_TEGRA_BPMP_THERMAL=3Dm CONFIG_GENERIC_ADC_THERMAL=3Dm @@ -918,10 +888,10 @@ CONFIG_SDR_PLATFORM_DRIVERS=3Dy CONFIG_V4L_MEM2MEM_DRIVERS=3Dy CONFIG_VIDEO_AMPHION_VPU=3Dm CONFIG_VIDEO_CADENCE_CSI2RX=3Dm -CONFIG_VIDEO_MEDIATEK_JPEG=3Dm -CONFIG_VIDEO_MEDIATEK_VCODEC=3Dm CONFIG_VIDEO_WAVE_VPU=3Dm CONFIG_VIDEO_E5010_JPEG_ENC=3Dm +CONFIG_VIDEO_MEDIATEK_JPEG=3Dm +CONFIG_VIDEO_MEDIATEK_VCODEC=3Dm CONFIG_VIDEO_MEDIATEK_MDP3=3Dm CONFIG_VIDEO_IMX7_CSI=3Dm CONFIG_VIDEO_IMX_MIPI_CSIS=3Dm @@ -931,8 +901,8 @@ CONFIG_VIDEO_IMX8_JPEG=3Dm CONFIG_VIDEO_QCOM_CAMSS=3Dm CONFIG_VIDEO_QCOM_IRIS=3Dm CONFIG_VIDEO_QCOM_VENUS=3Dm -CONFIG_VIDEO_RCAR_ISP=3Dm CONFIG_VIDEO_RCAR_CSI2=3Dm +CONFIG_VIDEO_RCAR_ISP=3Dm CONFIG_VIDEO_RCAR_VIN=3Dm CONFIG_VIDEO_RZG2L_CSI2=3Dm CONFIG_VIDEO_RZG2L_CRU=3Dm @@ -940,8 +910,8 @@ CONFIG_VIDEO_RENESAS_FCP=3Dm CONFIG_VIDEO_RENESAS_FDP1=3Dm CONFIG_VIDEO_RENESAS_VSP1=3Dm CONFIG_VIDEO_RCAR_DRIF=3Dm -CONFIG_VIDEO_ROCKCHIP_CIF=3Dm CONFIG_VIDEO_ROCKCHIP_RGA=3Dm +CONFIG_VIDEO_ROCKCHIP_CIF=3Dm CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=3Dm CONFIG_VIDEO_SAMSUNG_S5P_JPEG=3Dm CONFIG_VIDEO_SAMSUNG_S5P_MFC=3Dm @@ -956,64 +926,11 @@ CONFIG_VIDEO_OV5640=3Dm CONFIG_VIDEO_OV5645=3Dm CONFIG_VIDEO_S5KJN1=3Dm CONFIG_DRM=3Dm -CONFIG_DRM_I2C_NXP_TDA998X=3Dm CONFIG_DRM_HDLCD=3Dm CONFIG_DRM_MALI_DISPLAY=3Dm CONFIG_DRM_KOMEDA=3Dm -CONFIG_DRM_NOUVEAU=3Dm -CONFIG_DRM_EXYNOS=3Dm -CONFIG_DRM_EXYNOS5433_DECON=3Dy -CONFIG_DRM_EXYNOS7_DECON=3Dy -CONFIG_DRM_EXYNOS_DSI=3Dy -# CONFIG_DRM_EXYNOS_DP is not set -CONFIG_DRM_EXYNOS_HDMI=3Dy -CONFIG_DRM_EXYNOS_MIC=3Dy -CONFIG_DRM_ROCKCHIP=3Dm -CONFIG_ROCKCHIP_VOP2=3Dy -CONFIG_ROCKCHIP_ANALOGIX_DP=3Dy -CONFIG_ROCKCHIP_CDN_DP=3Dy -CONFIG_ROCKCHIP_DW_DP=3Dy -CONFIG_ROCKCHIP_DW_HDMI=3Dy -CONFIG_ROCKCHIP_DW_HDMI_QP=3Dy -CONFIG_ROCKCHIP_DW_MIPI_DSI=3Dy -CONFIG_ROCKCHIP_INNO_HDMI=3Dy -CONFIG_ROCKCHIP_LVDS=3Dy -CONFIG_DRM_RCAR_DU=3Dm -CONFIG_DRM_RCAR_DW_HDMI=3Dm -CONFIG_DRM_RCAR_MIPI_DSI=3Dm -CONFIG_DRM_RZG2L_MIPI_DSI=3Dm -CONFIG_DRM_RZG2L_DU=3Dm -CONFIG_DRM_SUN4I=3Dm -CONFIG_DRM_SUN6I_DSI=3Dm -CONFIG_DRM_SUN8I_DW_HDMI=3Dm -CONFIG_DRM_SUN8I_MIXER=3Dm -CONFIG_DRM_MSM=3Dm -CONFIG_DRM_TEGRA=3Dm -CONFIG_DRM_STM=3Dm -CONFIG_DRM_STM_LVDS=3Dm -CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=3Dm -CONFIG_DRM_PANEL_LVDS=3Dm -CONFIG_DRM_PANEL_SIMPLE=3Dm -CONFIG_DRM_PANEL_SUMMIT=3Dm -CONFIG_DRM_PANEL_EDP=3Dm -CONFIG_DRM_PANEL_HIMAX_HX8279=3Dm -CONFIG_DRM_PANEL_HIMAX_HX83112A=3Dm -CONFIG_DRM_PANEL_HIMAX_HX83112B=3Dm -CONFIG_DRM_PANEL_ILITEK_ILI9882T=3Dm -CONFIG_DRM_PANEL_KHADAS_TS050=3Dm -CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=3Dm -CONFIG_DRM_PANEL_NOVATEK_NT36672A=3Dm -CONFIG_DRM_PANEL_NOVATEK_NT36672E=3Dm -CONFIG_DRM_PANEL_NOVATEK_NT37801=3Dm -CONFIG_DRM_PANEL_RAYDIUM_RM67191=3Dm -CONFIG_DRM_PANEL_RAYDIUM_RM692E5=3Dm -CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=3Dm -CONFIG_DRM_PANEL_SITRONIX_ST7703=3Dm -CONFIG_DRM_PANEL_STARTEK_KD070FHFID015=3Dm -CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=3Dm -CONFIG_DRM_PANEL_VISIONOX_VTDR6130=3Dm -CONFIG_DRM_DISPLAY_CONNECTOR=3Dm CONFIG_DRM_FSL_LDB=3Dm +CONFIG_DRM_I2C_NXP_TDA998X=3Dm CONFIG_DRM_ITE_IT6263=3Dm CONFIG_DRM_LONTIUM_LT8912B=3Dm CONFIG_DRM_LONTIUM_LT9611=3Dm @@ -1022,7 +939,6 @@ CONFIG_DRM_LONTIUM_LT8713SX=3Dm CONFIG_DRM_ITE_IT66121=3Dm CONFIG_DRM_NWL_MIPI_DSI=3Dm CONFIG_DRM_PARADE_PS8640=3Dm -CONFIG_DRM_SAMSUNG_DSIM=3Dm CONFIG_DRM_SII902X=3Dm CONFIG_DRM_SIMPLE_BRIDGE=3Dm CONFIG_DRM_THINE_THC63LVD1024=3Dm @@ -1040,38 +956,82 @@ CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=3Dm CONFIG_DRM_DW_HDMI_AHB_AUDIO=3Dm CONFIG_DRM_DW_HDMI_CEC=3Dm CONFIG_DRM_DW_HDMI_QP_CEC=3Dy -CONFIG_DRM_IMX_DCSS=3Dm -CONFIG_DRM_V3D=3Dm -CONFIG_DRM_VC4=3Dm CONFIG_DRM_ETNAVIV=3Dm +CONFIG_DRM_EXYNOS=3Dm +CONFIG_DRM_EXYNOS5433_DECON=3Dy +CONFIG_DRM_EXYNOS7_DECON=3Dy +CONFIG_DRM_EXYNOS_DSI=3Dy +# CONFIG_DRM_EXYNOS_DP is not set +CONFIG_DRM_EXYNOS_HDMI=3Dy +CONFIG_DRM_EXYNOS_MIC=3Dy CONFIG_DRM_HISI_HIBMC=3Dm CONFIG_DRM_HISI_KIRIN=3Dm +CONFIG_DRM_POWERVR=3Dm +CONFIG_DRM_IMX_DCSS=3Dm +CONFIG_DRM_LIMA=3Dm CONFIG_DRM_MEDIATEK=3Dm CONFIG_DRM_MEDIATEK_DP=3Dm CONFIG_DRM_MEDIATEK_HDMI=3Dm CONFIG_DRM_MEDIATEK_HDMI_V2=3Dm +CONFIG_DRM_MESON=3Dm +CONFIG_DRM_MSM=3Dm CONFIG_DRM_MXSFB=3Dm CONFIG_DRM_IMX_LCDIF=3Dm -CONFIG_DRM_MESON=3Dm -CONFIG_DRM_PL111=3Dm -CONFIG_DRM_LIMA=3Dm +CONFIG_DRM_NOUVEAU=3Dm +CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=3Dm +CONFIG_DRM_PANEL_LVDS=3Dm +CONFIG_DRM_PANEL_HIMAX_HX8279=3Dm +CONFIG_DRM_PANEL_HIMAX_HX83112A=3Dm +CONFIG_DRM_PANEL_HIMAX_HX83112B=3Dm +CONFIG_DRM_PANEL_ILITEK_ILI9882T=3Dm +CONFIG_DRM_PANEL_KHADAS_TS050=3Dm +CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=3Dm +CONFIG_DRM_PANEL_NOVATEK_NT36672A=3Dm +CONFIG_DRM_PANEL_NOVATEK_NT36672E=3Dm +CONFIG_DRM_PANEL_NOVATEK_NT37801=3Dm +CONFIG_DRM_PANEL_RAYDIUM_RM67191=3Dm +CONFIG_DRM_PANEL_RAYDIUM_RM692E5=3Dm +CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=3Dm +CONFIG_DRM_PANEL_SITRONIX_ST7703=3Dm +CONFIG_DRM_PANEL_STARTEK_KD070FHFID015=3Dm +CONFIG_DRM_PANEL_EDP=3Dm +CONFIG_DRM_PANEL_SIMPLE=3Dm +CONFIG_DRM_PANEL_SUMMIT=3Dm +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=3Dm +CONFIG_DRM_PANEL_VISIONOX_VTDR6130=3Dm CONFIG_DRM_PANFROST=3Dm CONFIG_DRM_PANTHOR=3Dm +CONFIG_DRM_PL111=3Dm +CONFIG_DRM_RCAR_DU=3Dm +CONFIG_DRM_RCAR_DW_HDMI=3Dm +CONFIG_DRM_RZG2L_DU=3Dm +CONFIG_DRM_ROCKCHIP=3Dm +CONFIG_ROCKCHIP_VOP2=3Dy +CONFIG_ROCKCHIP_ANALOGIX_DP=3Dy +CONFIG_ROCKCHIP_CDN_DP=3Dy +CONFIG_ROCKCHIP_DW_DP=3Dy +CONFIG_ROCKCHIP_DW_HDMI=3Dy +CONFIG_ROCKCHIP_DW_HDMI_QP=3Dy +CONFIG_ROCKCHIP_DW_MIPI_DSI=3Dy +CONFIG_ROCKCHIP_INNO_HDMI=3Dy +CONFIG_ROCKCHIP_LVDS=3Dy +CONFIG_DRM_STM=3Dm +CONFIG_DRM_STM_LVDS=3Dm +CONFIG_DRM_SUN4I=3Dm +CONFIG_DRM_TEGRA=3Dm CONFIG_DRM_TIDSS=3Dm +CONFIG_DRM_V3D=3Dm +CONFIG_DRM_VC4=3Dm CONFIG_DRM_ZYNQMP_DPSUB=3Dm CONFIG_DRM_ZYNQMP_DPSUB_AUDIO=3Dy -CONFIG_DRM_POWERVR=3Dm CONFIG_FB=3Dy CONFIG_FB_EFI=3Dy -CONFIG_FB_MODE_HELPERS=3Dy CONFIG_BACKLIGHT_PWM=3Dm CONFIG_BACKLIGHT_APPLE_DWI=3Dm CONFIG_BACKLIGHT_QCOM_WLED=3Dm CONFIG_BACKLIGHT_LP855X=3Dm CONFIG_BACKLIGHT_GPIO=3Dm CONFIG_LOGO=3Dy -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_SOUND=3Dm CONFIG_SND=3Dm CONFIG_SND_ALOOP=3Dm @@ -1113,21 +1073,15 @@ CONFIG_SND_SOC_SC8280XP=3Dm CONFIG_SND_SOC_SC7180=3Dm CONFIG_SND_SOC_SC7280=3Dm CONFIG_SND_SOC_X1E80100=3Dm -CONFIG_SND_SOC_ROCKCHIP=3Dm +CONFIG_SND_SOC_RCAR=3Dm +CONFIG_SND_SOC_MSIOF=3Dm +CONFIG_SND_SOC_RZ=3Dm CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=3Dm CONFIG_SND_SOC_ROCKCHIP_SAI=3Dm CONFIG_SND_SOC_ROCKCHIP_SPDIF=3Dm CONFIG_SND_SOC_ROCKCHIP_RT5645=3Dm CONFIG_SND_SOC_RK3399_GRU_SOUND=3Dm -CONFIG_SND_SOC_RCAR=3Dm -CONFIG_SND_SOC_MSIOF=3Dm -CONFIG_SND_SOC_RZ=3Dm CONFIG_SND_SOC_SAMSUNG=3Dm -CONFIG_SND_SOC_SOF_TOPLEVEL=3Dy -CONFIG_SND_SOC_SOF_OF=3Dm -CONFIG_SND_SOC_SOF_MTK_TOPLEVEL=3Dy -CONFIG_SND_SOC_SOF_MT8186=3Dm -CONFIG_SND_SOC_SOF_MT8195=3Dm CONFIG_SND_SUN8I_CODEC=3Dm CONFIG_SND_SUN8I_CODEC_ANALOG=3Dm CONFIG_SND_SUN50I_CODEC_ANALOG=3Dm @@ -1147,11 +1101,15 @@ CONFIG_SND_SOC_TEGRA210_AMX=3Dm CONFIG_SND_SOC_TEGRA210_ADX=3Dm CONFIG_SND_SOC_TEGRA210_MIXER=3Dm CONFIG_SND_SOC_TEGRA_AUDIO_GRAPH_CARD=3Dm -CONFIG_SND_SOC_DAVINCI_MCASP=3Dm CONFIG_SND_SOC_J721E_EVM=3Dm CONFIG_SND_SOC_XILINX_I2S=3Dm CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=3Dm CONFIG_SND_SOC_XILINX_SPDIF=3Dm +CONFIG_SND_SOC_SOF_TOPLEVEL=3Dy +CONFIG_SND_SOC_SOF_OF=3Dm +CONFIG_SND_SOC_SOF_MTK_TOPLEVEL=3Dy +CONFIG_SND_SOC_SOF_MT8186=3Dm +CONFIG_SND_SOC_SOF_MT8195=3Dm CONFIG_SND_SOC_AK4613=3Dm CONFIG_SND_SOC_AK4619=3Dm CONFIG_SND_SOC_DA7213=3Dm @@ -1163,7 +1121,6 @@ CONFIG_SND_SOC_GTM601=3Dm CONFIG_SND_SOC_MAX98090=3Dm CONFIG_SND_SOC_MSM8916_WCD_ANALOG=3Dm CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=3Dm -CONFIG_SND_SOC_PCM3168A_I2C=3Dm CONFIG_SND_SOC_RK3308=3Dm CONFIG_SND_SOC_RK817=3Dm CONFIG_SND_SOC_RT5640=3Dm @@ -1189,8 +1146,6 @@ CONFIG_SND_SOC_WSA884X=3Dm CONFIG_SND_SOC_NAU8822=3Dm CONFIG_SND_SOC_LPASS_WSA_MACRO=3Dm CONFIG_SND_SOC_LPASS_VA_MACRO=3Dm -CONFIG_SND_SOC_LPASS_RX_MACRO=3Dm -CONFIG_SND_SOC_LPASS_TX_MACRO=3Dm CONFIG_SND_SIMPLE_CARD=3Dm CONFIG_SND_AUDIO_GRAPH_CARD=3Dm CONFIG_SND_AUDIO_GRAPH_CARD2=3Dm @@ -1220,12 +1175,10 @@ CONFIG_USB_CDNS_SUPPORT=3Dm CONFIG_USB_CDNS3=3Dm CONFIG_USB_CDNS3_GADGET=3Dy CONFIG_USB_CDNS3_HOST=3Dy -CONFIG_USB_CDNS3_IMX=3Dm CONFIG_USB_MTU3=3Dy CONFIG_USB_MUSB_HDRC=3Dy CONFIG_USB_MUSB_SUNXI=3Dy CONFIG_USB_DWC3=3Dy -CONFIG_OMAP_USB2=3Dm CONFIG_USB_DWC2=3Dy CONFIG_USB_CHIPIDEA=3Dy CONFIG_USB_CHIPIDEA_UDC=3Dy @@ -1311,6 +1264,7 @@ CONFIG_MMC_SDHCI_AM654=3Dy CONFIG_MMC_OWL=3Dy CONFIG_SCSI_UFSHCD=3Dy CONFIG_SCSI_UFS_BSG=3Dy +CONFIG_SCSI_UFS_CRYPTO=3Dy CONFIG_SCSI_UFSHCD_PLATFORM=3Dy CONFIG_SCSI_UFS_CDNS_PLATFORM=3Dm CONFIG_SCSI_UFS_QCOM=3Dm @@ -1320,9 +1274,6 @@ CONFIG_SCSI_UFS_RENESAS=3Dm CONFIG_SCSI_UFS_TI_J721E=3Dm CONFIG_SCSI_UFS_EXYNOS=3Dy CONFIG_SCSI_UFS_ROCKCHIP=3Dy -CONFIG_BLK_INLINE_ENCRYPTION=3Dy -CONFIG_SCSI_UFS_CRYPTO=3Dy -CONFIG_NEW_LEDS=3Dy CONFIG_LEDS_CLASS=3Dy CONFIG_LEDS_CLASS_FLASH=3Dm CONFIG_LEDS_CLASS_MULTICOLOR=3Dm @@ -1348,9 +1299,9 @@ CONFIG_RTC_CLASS=3Dy CONFIG_RTC_DRV_DS1307=3Dm CONFIG_RTC_DRV_HYM8563=3Dm CONFIG_RTC_DRV_MAX77686=3Dy +CONFIG_RTC_DRV_NVIDIA_VRS10=3Dm CONFIG_RTC_DRV_RK808=3Dm CONFIG_RTC_DRV_ISL1208=3Dm -CONFIG_RTC_DRV_PCF85063=3Dm CONFIG_RTC_DRV_PCF85363=3Dm CONFIG_RTC_DRV_PCF8563=3Dm CONFIG_RTC_DRV_M41T80=3Dm @@ -1358,10 +1309,10 @@ CONFIG_RTC_DRV_BQ32K=3Dm CONFIG_RTC_DRV_RX8581=3Dm CONFIG_RTC_DRV_RV3028=3Dm CONFIG_RTC_DRV_RV8803=3Dm -CONFIG_RTC_DRV_S32G=3Dm CONFIG_RTC_DRV_S5M=3Dy CONFIG_RTC_DRV_DS3232=3Dy CONFIG_RTC_DRV_PCF2127=3Dm +CONFIG_RTC_DRV_PCF85063=3Dm CONFIG_RTC_DRV_DA9063=3Dm CONFIG_RTC_DRV_EFI=3Dy CONFIG_RTC_DRV_ZYNQMP=3Dm @@ -1380,8 +1331,8 @@ CONFIG_RTC_DRV_MT6397=3Dm CONFIG_RTC_DRV_XGENE=3Dy CONFIG_RTC_DRV_TI_K3=3Dm CONFIG_RTC_DRV_RENESAS_RTCA3=3Dm -CONFIG_RTC_DRV_NVIDIA_VRS10=3Dm CONFIG_RTC_DRV_MACSMC=3Dm +CONFIG_RTC_DRV_S32G=3Dm CONFIG_DMADEVICES=3Dy CONFIG_APPLE_ADMAC=3Dm CONFIG_DMA_BCM2835=3Dy @@ -1432,19 +1383,17 @@ CONFIG_CROS_EC_RPMSG=3Dm CONFIG_CROS_EC_SPI=3Dy CONFIG_CROS_KBD_LED_BACKLIGHT=3Dm CONFIG_CROS_EC_CHARDEV=3Dm -CONFIG_COMMON_CLK_APPLE_NCO=3Dm CONFIG_EC_ACER_ASPIRE1=3Dm CONFIG_EC_HUAWEI_GAOKUN=3Dm CONFIG_EC_LENOVO_YOGA_C630=3Dm CONFIG_EC_LENOVO_THINKPAD_T14S=3Dm +CONFIG_COMMON_CLK_APPLE_NCO=3Dm CONFIG_COMMON_CLK_RK808=3Dy -CONFIG_COMMON_CLK_SCMI=3Dy CONFIG_COMMON_CLK_SCPI=3Dy CONFIG_COMMON_CLK_CS2000_CP=3Dy CONFIG_COMMON_CLK_FSL_SAI=3Dy CONFIG_COMMON_CLK_S2MPS11=3Dy CONFIG_COMMON_CLK_PWM=3Dy -CONFIG_COMMON_CLK_RP1=3Dm CONFIG_COMMON_CLK_RS9_PCIE=3Dy CONFIG_COMMON_CLK_VC3=3Dy CONFIG_COMMON_CLK_VC5=3Dy @@ -1459,18 +1408,6 @@ CONFIG_CLK_IMX8ULP=3Dy CONFIG_CLK_IMX93=3Dy CONFIG_CLK_IMX95_BLK_CTL=3Dy CONFIG_TI_SCI_CLK=3Dy -CONFIG_COMMON_CLK_MT8192_AUDSYS=3Dy -CONFIG_COMMON_CLK_MT8192_CAMSYS=3Dy -CONFIG_COMMON_CLK_MT8192_IMGSYS=3Dy -CONFIG_COMMON_CLK_MT8192_IMP_IIC_WRAP=3Dy -CONFIG_COMMON_CLK_MT8192_IPESYS=3Dy -CONFIG_COMMON_CLK_MT8192_MDPSYS=3Dy -CONFIG_COMMON_CLK_MT8192_MFGCFG=3Dy -CONFIG_COMMON_CLK_MT8192_MMSYS=3Dy -CONFIG_COMMON_CLK_MT8192_MSDC=3Dy -CONFIG_COMMON_CLK_MT8192_SCP_ADSP=3Dy -CONFIG_COMMON_CLK_MT8192_VDECSYS=3Dy -CONFIG_COMMON_CLK_MT8192_VENCSYS=3Dy CONFIG_COMMON_CLK_QCOM=3Dy CONFIG_CLK_ELIZA_DISPCC=3Dm CONFIG_CLK_ELIZA_GCC=3Dy @@ -1497,7 +1434,6 @@ CONFIG_QCOM_CLK_APCC_MSM8996=3Dy CONFIG_QCOM_CLK_SMD_RPM=3Dy CONFIG_QCOM_CLK_RPMH=3Dy CONFIG_IPQ_APSS_6018=3Dy -CONFIG_IPQ_APSS_5018=3Dy CONFIG_IPQ_CMN_PLL=3Dm CONFIG_IPQ_GCC_5018=3Dy CONFIG_IPQ_GCC_5210=3Dy @@ -1521,17 +1457,16 @@ CONFIG_QCM_DISPCC_2290=3Dm CONFIG_QCS_DISPCC_615=3Dm CONFIG_QCS_CAMCC_615=3Dm CONFIG_QCS_GCC_404=3Dy -CONFIG_QCS_GCC_615=3Dy -CONFIG_QCS_GCC_8300=3Dy -CONFIG_SC_CAMCC_7280=3Dm CONFIG_SA_CAMCC_8775P=3Dm +CONFIG_QCS_GCC_8300=3Dy +CONFIG_QCS_GCC_615=3Dy CONFIG_QCS_GPUCC_615=3Dm CONFIG_QCS_VIDEOCC_615=3Dm -CONFIG_QDU_GCC_1000=3Dy +CONFIG_SC_CAMCC_7280=3Dm CONFIG_SC_CAMCC_8280XP=3Dm +CONFIG_SA_DISPCC_8775P=3Dm CONFIG_SC_DISPCC_7280=3Dm CONFIG_SC_DISPCC_8280XP=3Dm -CONFIG_SA_DISPCC_8775P=3Dm CONFIG_SA_GCC_8775P=3Dy CONFIG_SA_GPUCC_8775P=3Dm CONFIG_SC_GCC_7180=3Dy @@ -1544,6 +1479,7 @@ CONFIG_SC_LPASSCC_8280XP=3Dm CONFIG_SC_LPASS_CORECC_7280=3Dm CONFIG_SC_VIDEOCC_7280=3Dm CONFIG_SDM_CAMCC_845=3Dm +CONFIG_QDU_GCC_1000=3Dy CONFIG_SDM_GPUCC_845=3Dy CONFIG_SDM_VIDEOCC_845=3Dy CONFIG_SDM_DISPCC_845=3Dy @@ -1608,22 +1544,22 @@ CONFIG_RENESAS_OSTM=3Dy CONFIG_ARM_MHU=3Dy CONFIG_EXYNOS_MBOX=3Dm CONFIG_IMX_MBOX=3Dy -CONFIG_OMAP2PLUS_MBOX=3Dm CONFIG_PLATFORM_MHU=3Dy +CONFIG_OMAP2PLUS_MBOX=3Dm CONFIG_BCM2835_MBOX=3Dy CONFIG_QCOM_APCS_IPC=3Dy +CONFIG_TEGRA_HSP_MBOX=3Dy CONFIG_MTK_ADSP_MBOX=3Dm CONFIG_QCOM_CPUCP_MBOX=3Dm -CONFIG_TEGRA_HSP_MBOX=3Dy CONFIG_QCOM_IPCC=3Dy CONFIG_CIX_MBOX=3Dy -CONFIG_ROCKCHIP_IOMMU=3Dy -CONFIG_TEGRA_IOMMU_SMMU=3Dy CONFIG_ARM_SMMU=3Dy CONFIG_ARM_SMMU_V3=3Dy -CONFIG_MTK_IOMMU=3Dy CONFIG_QCOM_IOMMU=3Dy +CONFIG_ROCKCHIP_IOMMU=3Dy +CONFIG_TEGRA_IOMMU_SMMU=3Dy CONFIG_APPLE_DART=3Dm +CONFIG_MTK_IOMMU=3Dy CONFIG_REMOTEPROC=3Dy CONFIG_IMX_REMOTEPROC=3Dy CONFIG_MTK_SCP=3Dm @@ -1680,7 +1616,6 @@ CONFIG_IMX_SCU_PD=3Dy CONFIG_QCOM_CPR=3Dy CONFIG_QCOM_RPMHPD=3Dy CONFIG_QCOM_RPMPD=3Dy -CONFIG_ROCKCHIP_PM_DOMAINS=3Dy CONFIG_TI_SCI_PM_DOMAINS=3Dy CONFIG_ARM_IMX_BUS_DEVFREQ=3Dy CONFIG_ARM_IMX8M_DDRC_DEVFREQ=3Dm @@ -1727,9 +1662,9 @@ CONFIG_PWM_BCM2835=3Dm CONFIG_PWM_BRCMSTB=3Dm CONFIG_PWM_CROS_EC=3Dm CONFIG_PWM_IMX27=3Dm +CONFIG_PWM_MEDIATEK=3Dm CONFIG_PWM_MESON=3Dm CONFIG_PWM_MTK_DISP=3Dm -CONFIG_PWM_MEDIATEK=3Dm CONFIG_PWM_RENESAS_RCAR=3Dm CONFIG_PWM_RENESAS_RZG2L_GPT=3Dm CONFIG_PWM_RENESAS_RZ_MTU3=3Dm @@ -1757,10 +1692,10 @@ CONFIG_RESET_QCOM_PDC=3Dm CONFIG_RESET_RZG2L_USBPHY_CTRL=3Dy CONFIG_RESET_RZV2H_USB2PHY=3Dm CONFIG_RESET_TI_SCI=3Dy -CONFIG_PHY_SNPS_EUSB2=3Dm -CONFIG_PHY_XGENE=3Dy CONFIG_PHY_CAN_TRANSCEIVER=3Dm CONFIG_PHY_NXP_PTN3222=3Dm +CONFIG_PHY_SNPS_EUSB2=3Dm +CONFIG_PHY_XGENE=3Dy CONFIG_PHY_SUN4I_USB=3Dy CONFIG_PHY_CADENCE_TORRENT=3Dm CONFIG_PHY_CADENCE_DPHY=3Dm @@ -1811,6 +1746,7 @@ CONFIG_PHY_UNIPHIER_USB3=3Dy CONFIG_PHY_TEGRA_XUSB=3Dy CONFIG_PHY_AM654_SERDES=3Dm CONFIG_PHY_J721E_WIZ=3Dm +CONFIG_OMAP_USB2=3Dm CONFIG_PHY_XILINX_ZYNQMP=3Dm CONFIG_ARM_CCI_PMU=3Dm CONFIG_ARM_CCN=3Dm @@ -1854,7 +1790,6 @@ CONFIG_ALTERA_FREEZE_BRIDGE=3Dm CONFIG_XILINX_PR_DECOUPLER=3Dm CONFIG_FPGA_REGION=3Dm CONFIG_OF_FPGA_REGION=3Dm -CONFIG_OF_OVERLAY=3Dy CONFIG_FPGA_MGR_ZYNQMP_FPGA=3Dm CONFIG_FPGA_MGR_VERSAL_FPGA=3Dm CONFIG_TEE=3Dy @@ -1862,10 +1797,7 @@ CONFIG_OPTEE=3Dy CONFIG_QCOMTEE=3Dm CONFIG_MUX_GPIO=3Dm CONFIG_MUX_MMIO=3Dy -CONFIG_SLIMBUS=3Dm -CONFIG_SLIM_QCOM_CTRL=3Dm CONFIG_SLIM_QCOM_NGD_CTRL=3Dm -CONFIG_INTERCONNECT=3Dy CONFIG_INTERCONNECT_IMX=3Dy CONFIG_INTERCONNECT_IMX8MM=3Dm CONFIG_INTERCONNECT_IMX8MN=3Dm @@ -1903,9 +1835,9 @@ CONFIG_INTERCONNECT_QCOM_SM8650=3Dy CONFIG_INTERCONNECT_QCOM_SM8750=3Dy CONFIG_INTERCONNECT_QCOM_X1E80100=3Dy CONFIG_COUNTER=3Dm -CONFIG_TI_EQEP=3Dm CONFIG_RZ_MTU3_CNT=3Dm CONFIG_STM32_TIMER_CNT=3Dm +CONFIG_TI_EQEP=3Dm CONFIG_HTE=3Dy CONFIG_HTE_TEGRA194=3Dy CONFIG_HTE_TEGRA194_TEST=3Dm @@ -1924,14 +1856,12 @@ CONFIG_OVERLAY_FS=3Dm CONFIG_VFAT_FS=3Dy CONFIG_TMPFS_POSIX_ACL=3Dy CONFIG_HUGETLBFS=3Dy -CONFIG_CONFIGFS_FS=3Dy CONFIG_EFIVAR_FS=3Dy CONFIG_UBIFS_FS=3Dm CONFIG_SQUASHFS=3Dy CONFIG_PSTORE_RAM=3Dm CONFIG_NFS_FS=3Dy CONFIG_NFS_V4=3Dy -CONFIG_NFS_V4_1=3Dy CONFIG_NFS_V4_2=3Dy CONFIG_ROOT_NFS=3Dy CONFIG_9P_FS=3Dy @@ -1939,14 +1869,11 @@ CONFIG_NLS_CODEPAGE_437=3Dy CONFIG_NLS_ISO8859_1=3Dy CONFIG_SECURITY=3Dy CONFIG_CRYPTO_USER=3Dy -CONFIG_CRYPTO_CHACHA20=3Dm CONFIG_CRYPTO_BENCHMARK=3Dm +CONFIG_CRYPTO_CHACHA20=3Dm CONFIG_CRYPTO_ECHAINIV=3Dy -CONFIG_CRYPTO_SHA3=3Dm -CONFIG_CRYPTO_SM3=3Dm CONFIG_CRYPTO_USER_API_RNG=3Dm CONFIG_CRYPTO_GHASH_ARM64_CE=3Dy -CONFIG_CRYPTO_AES_ARM64_CE_BLK=3Dy CONFIG_CRYPTO_AES_ARM64_BS=3Dm CONFIG_CRYPTO_AES_ARM64_CE_CCM=3Dy CONFIG_CRYPTO_DEV_SUN8I_CE=3Dm @@ -1972,8 +1899,6 @@ CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=3Dy CONFIG_DEBUG_INFO_REDUCED=3Dy CONFIG_MAGIC_SYSRQ=3Dy CONFIG_DEBUG_FS=3Dy -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set # CONFIG_FTRACE is not set CONFIG_CORESIGHT=3Dm CONFIG_CORESIGHT_LINK_AND_SINK_TMC=3Dm --=20 2.43.0 From nobody Mon May 25 05:12:50 2026 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 311E830F7FF for ; Mon, 18 May 2026 14:32:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114756; cv=none; b=AChrwEczlMg6Qux/aufdtO5CH+zbLnJRCdB1Mn5Lx3M3lX+uXIXkwOiDLCsklEK9WeujcGUuwW3DM/TSfy5MGq9VlUmacdWOU+ZCn4AqoFauSGhdeGJzPhqltsNazcXmeKBjWlYWLYyXedgafE6L5d+Z0RP8aCI/WPV4cXHqEkw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779114756; c=relaxed/simple; bh=m4I65AJoFoPwt93NF7LxbCGyS8npW8/HNQlSDavySrA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pbkPz1+fHjO5EIYbyeSORibGP9AzcIeBHXNOditxXADpHQ1ulFsKPepIWHT+NO0UtzujciU6l0Szzo+6NvEVp2qyLgb4tIpcLEcjeEKRjjPLwWFv3KnSRwZDXtz5DYgvQFjyN1ymVxgcIpnEOYkIxd6R42sPIQbHB9laTWUXLIA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=issTZwQ/; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="issTZwQ/" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48ff4f8ef0dso27113395e9.3 for ; Mon, 18 May 2026 07:32:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1779114748; x=1779719548; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WugkdDoyP2ElkLiDXY2Y7tcxAMMW7GtNIGsXYv3dIK4=; b=issTZwQ/scfqknfx3tDrdgrHkZfWoCAoaM/ZEL2dvE2DjSWDi+b9qZ2/uhmuVWNb+W qYIiYxmwuHI0MUkMtTtTn8zSN+0gkR8jlCCVG0F/kF6dSnzDBwpxOvn7ouv7mUPXFzWM zwbtXr5ehWYMmy5qHxkZsSz6Dfe95zmPNeetM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779114748; x=1779719548; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=WugkdDoyP2ElkLiDXY2Y7tcxAMMW7GtNIGsXYv3dIK4=; b=pj6LVvSbiMjCTDoOE5LyIpSNbC7qg/yk/cVm/VkI4Cpoe7AH71xNl0zcQrbgFlNl+X bPCj6LyXbpUx5QhORXVGJXUJy2rVL1BZMCMCTpyA5Vt6e7xPQBpwPXL+HcDScu8TLe/6 AhE48FQQow+uSWVIQWp+VpQ1Xt1nibZRRGkQwjXoz66EnB2ox64WVo3WJDFlm709Kp6p Qyc0wCn1Enby61i0YB5EHXXAf51AdtKX7YmugzGbyyawI2GIGgQraDMNbKfbdsqF6ZxD Ijp1XcXxoaY+S0owKRn5DBlZfNMvw39qq/hXP1us3YkNPnpCU8kg7lFOosBFznz8JSEO RXBw== X-Gm-Message-State: AOJu0YzOc6H5K6GfigDSIGgfU3HdtSbxqXq50BkmyWbhz8JLGM1Bkj4M /kbeGG6qixIXmJnHx8ecxOhNJO/32LYCaUJ2sMLh/luwKmEeSZUliPAsCDvG3uy3bVIvxpWewL9 8y3EM X-Gm-Gg: Acq92OGthfBHkNO79/XvjdFGdZIeBYXcAdYWF2BmrZXK6r01b87h0YeM9aFrLQ/hXEb KYIMie3vF+TAzIEAWtzipVSiNljHMvWEv9uJdUp4zSuPmHFaWdeG+BagSl3cgV9N31YY730CB9V 2z5xIoMENUgnaWSP83BqWa0t6hxvIZcV8ZfIYRGpiu2KEa5yTjlczFlXuWRvPJHmuUahmsA8xX0 qOOPqAeWN8Sc1C7qjriREhboCR/HzeMAhCDUgv5mPz+nx7xPOCyokX3JlDRE5NpErccFhbNY12B Vih82TMKerhR5bv2J+3iJshG6MmpIPYJW8IEHp02iWGonJJPzW9HRFTTjVs6M4vmg7PnedGoW+r 1uvKTSelXgsfjq0Tf2MrKMZDvuEHnGbIYzM8cwFV1jLL0I2Npzzc4xy0vilOHbzTOw58Ch6bOCw v1W1dS/e5TWQM0DsqsDtoB8SVz/j10OZ7mb8sgplPrVHT7Inds4I+23VAPOixV5bj7zsMH5vD6q AkYrRWJ+H6cJQHHUINZR3BYIX7pH1sdPY88C2s8b3t9bbNTitmvOJa8vT0= X-Received: by 2002:a05:600c:858d:b0:48f:d5d7:df63 with SMTP id 5b1f17b1804b1-48fe661b207mr159074655e9.27.1779114748471; Mon, 18 May 2026 07:32:28 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.43.167]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0a1aeafsm39564572f8f.23.2026.05.18.07.32.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 07:32:27 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, francesco.utel@engicam.com, Dario Binacchi , Arnd Bergmann , Bjorn Andersson , Dmitry Baryshkov , Eric Biggers , Geert Uytterhoeven , Krzysztof Kozlowski , Luca Weiss , Michal Simek , Sven Peter Subject: [PATCH 15/15] arm64: defconfig: enable configs for Engicam MicroGEA-STM32MP257-RMM Date: Mon, 18 May 2026 16:31:30 +0200 Message-ID: <20260518143150.3138712-16-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> References: <20260518143150.3138712-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable I2C (touchscreen and audio codec), SPI (display configuration), DRM panel and SAI (audio) configurations required to support the Engicam MicroGEA-STM32MP257-RMM board Signed-off-by: Dario Binacchi --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 89730d2ec954..bc298812f299 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -563,6 +563,7 @@ CONFIG_I2C_RK3X=3Dy CONFIG_I2C_RZV2M=3Dm CONFIG_I2C_S3C2410=3Dy CONFIG_I2C_SH_MOBILE=3Dy +CONFIG_I2C_STM32F7=3Dy CONFIG_I2C_TEGRA=3Dy CONFIG_I2C_UNIPHIER_F=3Dy CONFIG_I2C_XILINX=3Dm @@ -600,6 +601,7 @@ CONFIG_SPI_QUP=3Dy CONFIG_SPI_QCOM_GENI=3Dm CONFIG_SPI_S3C64XX=3Dy CONFIG_SPI_SH_MSIOF=3Dm +CONFIG_SPI_STM32=3Dy CONFIG_SPI_STM32_OSPI=3Dm CONFIG_SPI_SUN6I=3Dy CONFIG_SPI_TEGRA210_QUAD=3Dm @@ -983,6 +985,7 @@ CONFIG_DRM_PANEL_LVDS=3Dm CONFIG_DRM_PANEL_HIMAX_HX8279=3Dm CONFIG_DRM_PANEL_HIMAX_HX83112A=3Dm CONFIG_DRM_PANEL_HIMAX_HX83112B=3Dm +CONFIG_DRM_PANEL_ILITEK_ILI9806E_SPI=3Dm CONFIG_DRM_PANEL_ILITEK_ILI9882T=3Dm CONFIG_DRM_PANEL_KHADAS_TS050=3Dm CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=3Dm @@ -1082,6 +1085,7 @@ CONFIG_SND_SOC_ROCKCHIP_SPDIF=3Dm CONFIG_SND_SOC_ROCKCHIP_RT5645=3Dm CONFIG_SND_SOC_RK3399_GRU_SOUND=3Dm CONFIG_SND_SOC_SAMSUNG=3Dm +CONFIG_SND_SOC_STM32_SAI=3Dm CONFIG_SND_SUN8I_CODEC=3Dm CONFIG_SND_SUN8I_CODEC_ANALOG=3Dm CONFIG_SND_SUN50I_CODEC_ANALOG=3Dm --=20 2.43.0