From nobody Mon May 25 05:12:16 2026 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 720C248033E for ; Mon, 18 May 2026 13:45:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779111956; cv=none; b=eGbYCHx7vHDCizrG0jWFvaz3Zl8f0DQLVfH4XI2IP1ShYxVv5dqp9426ZEPpBHMbDujBNKSPa8SZBsLMJ83/e8OQ6ejzZCritPiLKW2BV3gj7cm8XJRgV4IQyWfh26GEKwBTLj7jMKHT1TBBc8Eaf6e80+HSSZFI7WOX/bmFRcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779111956; c=relaxed/simple; bh=A7iji+rXKq/foenCFTEp43CEifw4NZBgLqy3/ylbp4o=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=R54qkO7Cfu5khiDk8wUm6di8R2Ds8Am9KjUg6GeeQ+gQit1ettPGtGDDGPvSSce2eB6Zrjl83QY4eXlZCyx/S6kl1ORnfYeoN0Yvd4b0/qsjg0GwcX+LK5g5O7184oLfTV6vAQeen8mmWw6/VLAQ0avO6JDas/dCm7Nk3nWTb7M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JuCEB9vX; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JuCEB9vX" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so13172145e9.1 for ; Mon, 18 May 2026 06:45:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779111951; x=1779716751; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:from:to:cc:subject:date:message-id:reply-to; bh=jeZUOTxiux+ntqD5XfCjsj5BrXI92DULaKFsiqtZdig=; b=JuCEB9vXPm5YtzVMvHEAzRaHL4HV+ywz1gVzx0qSS/T7OLyVsYECTfV4gmMmE31ydd Tii2stRB+aFkgpgqKt1JDJs+X7DcURqv0Jsjf23BFkEb1yHG1A31SAd0l6YzutUZRkGN 5x5N8KQMhDSgEmCKPoUFclWMVklpASmdw3HDpUZBEkyyQKB3jXILvvRg5ncUzuJHT4Uz c4rmPvYabPiQW+uB2myXtpMpVmWul9HowVGbjJX++SqOXAnZMjnCOe4+y4hj8IaIoQWP eHpcgxCof0UYbv4/wJItjVYPBA8PkYpCUPkHV2UIQd7jRxVgOZWd5Iaxfd5WKorku0B0 g1pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779111951; x=1779716751; h=content-transfer-encoding:mime-version:message-id:date:subject:to :from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=jeZUOTxiux+ntqD5XfCjsj5BrXI92DULaKFsiqtZdig=; b=O9kIq8LoJa3Ii1jxWmr+5/Wv6p7elsls4BOjSNyfHcBqVDQYBW+43lMaKbzz2EFyUZ o1H2EHiPk9RFmDjyxbA2iYHDBtuvTQnT5hVk58laDhjmSabAPwRed1auBAGw3s/6ie7/ BaqtM5gEbneR6szGNYjkhKvox7+yJBo0v3wbFhj+7sT2kxSM5vGG6NbV2VTD0AgWalgM e6QFMfnHDC2csQ9v3c5hhDnldtN/1XW/BXRa9FcUF+r8RizyaSyGA26EsWzbGvAygxjg hE+bwQvGhMYEGkWB7Lp/mGMt3gKGkNmWl2ZkoiWtDcLs2WAbYu6LoGTlyrroiG/afAqb 4XYQ== X-Forwarded-Encrypted: i=1; AFNElJ+FhRDY9a3LnzYbCiB1I/MxHeqh1tXxJeI0EnP8r6XSIbH7sBOMmgvMRzHkV3MZ5jetH7hnzpZ+FmowXBA=@vger.kernel.org X-Gm-Message-State: AOJu0Ywj5FkkVLm9gtI/4PagdkmXBt74mx2HZnDRABykEguyomvxc/WT Pawc76OU6Mtm9tKXoTkwY9blpoQJkvh2OtXgqgmfDmM/LuSZjQ6dLhEj X-Gm-Gg: Acq92OGmqU/Ngvmn6acoZsUwGI8o+/fRLkh0M/VpFETS4G+dIHvGK1etrPPDLe64xHU doXD1tHmtxnUtv5GoC6z2eneTjTGPQX7t8vxzFZf5AoRoPWB6K3KXN/ENVRf6O2v9w4U8dEIPnM SyifaPiYA26kET0DyIpDyvYI9fVMPPEurSMubgx9EZm5inf8dXrg1tUMxfCXhdgbSRvupcFRYLT OH7xk2WN26ZF68L8Bvf09zmUAq4ZeipC9qbU54hJsxhtYZob5n5saE2Cg3UenIFIDcZnmt1LMe6 DrFQvNrRlJ7/eAsiDuknZo3pb1hZz8DL/C/Wq0bqHZTWa8Sjj7XQWRe9YYvZmCMA4rBaVUoUyag 8evtNHOSTJlZRNi+uM1AS6yoPAtakBAeOlvirEEa/pPIDFG0DqYmhdjtKfMzRaCSo/LXIOlfQ9O XEHO1E5hHK2nAvbFYllV4Bm7dMcAgjDk1j3xvJmTfykHvFH3lRisijTyPK0sBTEpamupblJ4c0F /sb5q1WWA== X-Received: by 2002:a05:600c:6d83:b0:486:fcc7:6811 with SMTP id 5b1f17b1804b1-48fd635966cmr220810435e9.10.1779111950817; Mon, 18 May 2026 06:45:50 -0700 (PDT) Received: from Ansuel-XPS24 (host-82-55-252-101.retail.telecomitalia.it. [82.55.252.101]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-45e6a135f0csm18927466f8f.27.2026.05.18.06.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 06:45:50 -0700 (PDT) From: Christian Marangi To: Lorenzo Bianconi , Jakub Kicinski , Christian Marangi , Felix Fietkau , Simon Horman , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: [PATCH RESEND net] net: airoha: Fix NPU RX DMA descriptor bits Date: Mon, 18 May 2026 15:44:57 +0200 Message-ID: <20260518134530.3683-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In an internal review from Airoha, it was notice that the RX DMA descriptor bits and mask are wrong. These values probably refer to an old NPU firmware never published. The previous value works correctly but it was reported that in some specific condition in mixed scenario with both Ethernet and WiFi offload it's possible that RX DMA descriptor signal wrong value with the problem to the RX ring or packets getting dropped. To handle these specific scenario, apply the new suggested bits mask from Airoha. Correct functionality of both AN7581 NPU and MT7996 variant were verified and confirmed working. Fixes: a7fc8c641cab ("net: airoha: Fix npu rx DMA definitions") Signed-off-by: Christian Marangi Acked-by: Lorenzo Bianconi --- include/linux/soc/airoha/airoha_offload.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/linux/soc/airoha/airoha_offload.h b/include/linux/soc/= airoha/airoha_offload.h index d01ef4a6b3d7..7589fccfeef6 100644 --- a/include/linux/soc/airoha/airoha_offload.h +++ b/include/linux/soc/airoha/airoha_offload.h @@ -71,9 +71,9 @@ static inline void airoha_ppe_dev_check_skb(struct airoha= _ppe_dev *dev, #define NPU_RX1_DESC_NUM 512 =20 /* CTRL */ -#define NPU_RX_DMA_DESC_LAST_MASK BIT(27) -#define NPU_RX_DMA_DESC_LEN_MASK GENMASK(26, 14) -#define NPU_RX_DMA_DESC_CUR_LEN_MASK GENMASK(13, 1) +#define NPU_RX_DMA_DESC_LAST_MASK BIT(29) +#define NPU_RX_DMA_DESC_LEN_MASK GENMASK(28, 15) +#define NPU_RX_DMA_DESC_CUR_LEN_MASK GENMASK(14, 1) #define NPU_RX_DMA_DESC_DONE_MASK BIT(0) /* INFO */ #define NPU_RX_DMA_PKT_COUNT_MASK GENMASK(31, 29) --=20 2.53.0