From nobody Mon May 25 04:36:23 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CADA37D107 for ; Mon, 18 May 2026 17:01:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779123673; cv=none; b=tNntJyfij0416uB8mNBgSp0NodXcU6fngAs0sdERmm/AQuYSo4tV2SX9YcU/TAiZcRZy2e97yxVM4ivhjhPEgMMvPrlR2ZJEHkE55iDCFZcD59cDPf3KAsgHBVxLoRJkxf4Pvb9T7bKGIZs+TCi8OtXY0fnvyBc5rjRHSmF7D0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779123673; c=relaxed/simple; bh=/wGIaUhBxlSuewsn/cKPbyPBkGIrIlpdsbtD3XVrlQc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=svn50CeqPE8u3GQ592r2wUZAg0pZIyrlyTvOFHLFo+DNfuzyMOVRY9cAIlhKGcl6YvBPIuWCZMrXXYZnceTrTP+OpQnaeXu+5MNF5n7NgnM89w2Azo3Ggrune0X/jFoTUb+z7+4qOsRT4wmPiphSiGIhzc6tGw8e4L0+5j5kTr0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=D5/5j4A2; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=FF0TuSKH; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="D5/5j4A2"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="FF0TuSKH" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64IAooMC2083023 for ; Mon, 18 May 2026 17:01:10 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Uot5zVHiOWvQW+9qfq21wfXkU0gBHqKnmGA97D8OoaI=; b=D5/5j4A2ar1qkS8C kgbVnKtLC/07YjIOXvlYKS2iJzQWvj3VHwuDScWrcp4fQGxNqTXENzsBphgKazch BecJRDEt0vOZ8xmTGmO7SUrKmWbQlUGA8Hl7AtToIrbURXPBH+Bh2SE1r5Y3Jcpo keYzLUlxjNXnNcTv7A1FMFYaCPjPywWmPtwAljME0YWZyuGAq410q/XWRSmFgd4y a4xraVl8y+4I6zVakN5rpFw/UZvpWuqr4YOUoG57mYWqe397FUPc8mNwK/45XJWb 7t9NRBh6E3Qzmnhb4v4opLPDTKTYGdZp72BIx+eQx3vRdd1OnyvKWnBBVx3I2hsD w0lFiw== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e81ch9ewb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 18 May 2026 17:01:10 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-36629e48023so2344964a91.2 for ; Mon, 18 May 2026 10:01:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779123669; x=1779728469; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Uot5zVHiOWvQW+9qfq21wfXkU0gBHqKnmGA97D8OoaI=; b=FF0TuSKHr2CWhSU6ou7dYsgEjKu/Fb4dJfMscDh9EXWtVCQ12pRoLq/a4ewN9LrJY4 W9HKnr6YZ2sa4v+bzyng/yKLXdFtaCU6xp7eiLsA0eZ7XAy/kcNoOeu8wnwYw7aUkM1k /WitkX3RwjpL0cJXypyTsyGrCSKSQAurlOn9m8ncmruIarrLZC0WVYvbmiwvX4dX2ZUO XfMJeh/gt+F6EWoKPepuZF1uJmYbbwV2Lgt1tCni6lJWI35K5w/mEY7BFNVbuJoOLSeU SW71yTzp4WDXbNZ9eA4Urn9KQG9GZLdwGdWq0UhW/OEWFccmm4q8NGo1/Mb9OtFaQl/2 QP+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779123669; x=1779728469; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Uot5zVHiOWvQW+9qfq21wfXkU0gBHqKnmGA97D8OoaI=; b=RRauz+WjIY5uoywDqwo/Fxb9fv/+N7d1stpbpOdOVEVcOylf7czaVc07riu8z9qlLo TPQ0kQK8eWtnOm7XVTncPlQZv6svs05zfVhl1VlUkM/CM/O3GaGkBFcvWFbKMlgRZu5K uD+WrZvq17B8ld1wBhbb8Ykg8y0A419tRgYdsNrBkBWzotf8/GflREx2p3Pw1k8rAQhP fw2ePqZZrbTCd13sGSAcb7IaQzVaU+HTnS6KwIwZfYuZJHIzLpH9teMeyvgG5FrI9FQ9 x/D9GDHI90+NVh4gM/5rkzUNLmLzNkEetoYDvhlDhi31LNJ/0fSkht738g+GFW9QgzUo 2oSw== X-Gm-Message-State: AOJu0YxxacbZU474eW7v5tkhp2ou/1v9gIR/LicrybbI9mQKgRc6XwMl XFSiTPejWJ1AfATVdmQmhY40hoWawcJiQwOFl0aSuFfWeaF5nN8j1ewHx/S1cNdmCmgs4eqz6R6 5p+mvkhxddJg7IGC8sdS40TgUlwxm8Q73MAoEZe9j0sSyqiCG17Jb54Zpa56hniDvv8HBne1w2U Q= X-Gm-Gg: Acq92OEtCwHpx0f8cHrt9TfWbBnidtgkITau95kghyp0938p6idlyOauNNtTlgPmSEH v6g4CGM47G+PBEyJPkr9jFqNM4XrCO+uwFUPFEOCRFTfD3bL6JcYc7nYjMvc6sNbv6a67jVx6d9 C8J9+UL94B6/zubLZ9ZIMf+HCXRtMRw2vyKcyfeEsvKFEsID3+eqlDdNoLdMghnqvStyBgM9IYj igv66rBo+uOxqFRJF+4hx7F/MTOcxpMU2HnlwM5Tz2KNl1c/TEYNwSIKersL4v77PRmcktRJPyO +/Ky6QSzVsUVZ6hXvGE7dxHf2nCGeTtyQ0PnUTq6JLFW4JyY9gWH8akgUKbaN+CKeevTqzR1OSl jRPK8V45Bj3Ganx0stYb1ungThEG5KzQq0e2xQDzX8gga2D+i9Yzejug= X-Received: by 2002:a17:90b:2549:b0:368:ac5f:d31b with SMTP id 98e67ed59e1d1-36951b8708amr14660953a91.24.1779123668805; Mon, 18 May 2026 10:01:08 -0700 (PDT) X-Received: by 2002:a17:90b:2549:b0:368:ac5f:d31b with SMTP id 98e67ed59e1d1-36951b8708amr14660849a91.24.1779123668005; Mon, 18 May 2026 10:01:08 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3695652466dsm5783808a91.0.2026.05.18.10.01.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 10:01:07 -0700 (PDT) From: Praveen Talari Date: Mon, 18 May 2026 22:30:51 +0530 Subject: [PATCH v3 1/2] spi: qcom-geni: trace: Add trace events for Qualcomm GENI SPI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260518-add-tracepoints-for-qcom-geni-spi-v3-1-7928f6810a79@oss.qualcomm.com> References: <20260518-add-tracepoints-for-qcom-geni-spi-v3-0-7928f6810a79@oss.qualcomm.com> In-Reply-To: <20260518-add-tracepoints-for-qcom-geni-spi-v3-0-7928f6810a79@oss.qualcomm.com> To: Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, mukesh.savaliya@oss.qualcomm.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, jyothi.seerapu@oss.qualcomm.com, Praveen Talari , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779123658; l=4219; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=/wGIaUhBxlSuewsn/cKPbyPBkGIrIlpdsbtD3XVrlQc=; b=YPm1dG8N41CJijQOOCeBCx1LBG3qYiuz/AhsTBIFw62sYrX8POoGPOnnJ7Kdp19uB+CpbB3oJ GgETwGffEydAO3r0mUCdbKG12iAHNOiLcVVbFctRhNyHcWlrjBaO2xc X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Authority-Analysis: v=2.4 cv=a4MAM0SF c=1 sm=1 tr=0 ts=6a0b45d6 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=niy05HpUbDCNYMLfpPAA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE4MDE2NiBTYWx0ZWRfX0jrWOdb2dnij ngKS3I7DFvJ+lFis4sOqQX4pxCTq5kq7iXdBZGCUiGrD1V2oLibF6M7fG6sL1fKB++8eZydwQDl LqgGBEUuwfwKkrjQCkJpcHlAmN1rCH+1vSsg05LseadJCWSelrWFtI6mvliRePk8IuQiO9EyiDB CVjM9hm5R8vkJvoYHiXl318feLdtTTqhgWuAp6GHYiURcY9p3RlPTNldY7fNDVfVrWJjKjK3mLB tlgbB0jxAYD9q7DQhFN381WFEQD0lSI076UP1Dif5CSvsrj1p3fjKi0IzWyd8Cg7iReMAvG1sRB JL8F5/L0zPD3XTRGY6/rBg+YEg0Gih7XxOcIfWuypa/sGjnv9zFh8KlAlCEebQeFY3dgMsMawxV bElrsTPxlgL/A3lZRDyxcvj6QRanW/F8HrRzhmjRBEuIbJQ8EIxQSZ/mG0gqFUE0qXjNdG3Vm4r lkWP/LNzF2Ooe5PfdFA== X-Proofpoint-ORIG-GUID: bEEHGyBZCjeS27YdSRp8Xeof6TxXgXVC X-Proofpoint-GUID: bEEHGyBZCjeS27YdSRp8Xeof6TxXgXVC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-18_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605180166 Add tracepoint support to the Qualcomm GENI SPI driver to provide runtime visibility into driver behavior without requiring invasive debug patches. The trace events cover clock and setup parameter configuration, transfer metadata, interrupt status to be making it easier to diagnose communication issues in the field.. Reviewed-by: Konrad Dybcio Signed-off-by: Praveen Talari Reviewed-by: Mukesh Kumar Savaliya --- v2->v3: - Renamed geni_spi_fifo_params to geni_spi_setup_params trace event. - Updated commit text. v1->v2: - Removed TX/RX data tracepoints. - Updated commit text. --- include/trace/events/qcom_geni_spi.h | 103 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 103 insertions(+) diff --git a/include/trace/events/qcom_geni_spi.h b/include/trace/events/qc= om_geni_spi.h new file mode 100644 index 000000000000..6d027adf2e1d --- /dev/null +++ b/include/trace/events/qcom_geni_spi.h @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM qcom_geni_spi + +#if !defined(_TRACE_QCOM_GENI_SPI_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_QCOM_GENI_SPI_H + +#include + +TRACE_EVENT(geni_spi_setup_params, + TP_PROTO(struct device *dev, u8 cs, u32 mode, + u32 mode_changed, bool cs_changed), + TP_ARGS(dev, cs, mode, mode_changed, cs_changed), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u8, cs) + __field(u32, mode) + __field(u32, mode_changed) + __field(bool, cs_changed) + ), + + TP_fast_assign(__assign_str(name); + __entry->cs =3D cs; + __entry->mode =3D mode; + __entry->mode_changed =3D mode_changed; + __entry->cs_changed =3D cs_changed; + ), + + TP_printk("%s: cs=3D%u mode=3D0x%08x mode_changed=3D0x%08x cs_changed= =3D%d", + __get_str(name), __entry->cs, __entry->mode, + __entry->mode_changed, __entry->cs_changed) +); + +TRACE_EVENT(geni_spi_clk_cfg, + TP_PROTO(struct device *dev, unsigned long req_hz, + unsigned long sclk_hz, unsigned int clk_idx, + unsigned int clk_div, unsigned int bpw), + TP_ARGS(dev, req_hz, sclk_hz, clk_idx, clk_div, bpw), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(unsigned long, req_hz) + __field(unsigned long, sclk_hz) + __field(unsigned int, clk_idx) + __field(unsigned int, clk_div) + __field(unsigned int, bpw) + ), + + TP_fast_assign(__assign_str(name); + __entry->req_hz =3D req_hz; + __entry->sclk_hz =3D sclk_hz; + __entry->clk_idx =3D clk_idx; + __entry->clk_div =3D clk_div; + __entry->bpw =3D bpw; + ), + + TP_printk("%s: req_hz=3D%lu sclk_hz=3D%lu clk_idx=3D%u clk_div=3D%u b= pw=3D%u", + __get_str(name), __entry->req_hz, __entry->sclk_hz, + __entry->clk_idx, __entry->clk_div, __entry->bpw) +); + +TRACE_EVENT(geni_spi_transfer, + TP_PROTO(struct device *dev, unsigned int len, u32 m_cmd), + TP_ARGS(dev, len, m_cmd), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(unsigned int, len) + __field(u32, m_cmd) + ), + + TP_fast_assign(__assign_str(name); + __entry->len =3D len; + __entry->m_cmd =3D m_cmd; + ), + + TP_printk("%s: len=3D%u m_cmd=3D0x%08x", + __get_str(name), __entry->len, __entry->m_cmd) +); + +TRACE_EVENT(geni_spi_irq, + TP_PROTO(struct device *dev, u32 m_irq, u32 dma_tx, u32 dma_rx), + TP_ARGS(dev, m_irq, dma_tx, dma_rx), + + TP_STRUCT__entry(__string(name, dev_name(dev)) + __field(u32, m_irq) + __field(u32, dma_tx) + __field(u32, dma_rx) + ), + + TP_fast_assign(__assign_str(name); + __entry->m_irq =3D m_irq; + __entry->dma_tx =3D dma_tx; + __entry->dma_rx =3D dma_rx; + ), + + TP_printk("%s: m_irq=3D0x%08x dma_tx=3D0x%08x dma_rx=3D0x%08x", + __get_str(name), __entry->m_irq, __entry->dma_tx, + __entry->dma_rx) +); + +#endif /* _TRACE_QCOM_GENI_SPI_H */ + +/* This part must be outside protection */ +#include --=20 2.34.1 From nobody Mon May 25 04:36:23 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 552D334F474 for ; Mon, 18 May 2026 17:01:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779123677; cv=none; b=IobX8Qkvc7406ztLyyBKKoVxkONUR2Tnk94xHTXLLUNqbR+4k7LwWDtBPnJ5YfU3JCxEnOJdZ/8TGrw88TLVzxzsSvkOelseg4ELWBIYgnd+2KcfmdEXeTS67wnjNr3YiuukK+hsGNJ07iORwHMAtHobiIbJMt7H66v/rUmz85A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779123677; c=relaxed/simple; bh=UHMJrmT2ONvAIhQJivnj9PTIHD8kS546Sv7JR6mvijk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=klbKQcNySRs433ZhJG7S+ElNy5pyO1pNs2u3AKa+MMr0/iT/VGuGE9KJEHnGgJW9lDWdw9uID1J8PTorXR3vzmxrXM9ohd0CdKtr3q8MT/q5/tiZUGu07KR1qR72KbT/SZgspJo1cIfNKWwEzIGHd9mlqG6UcRTquP3TV2vl0o4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=BqHx4Ajp; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=UqhrdG0I; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="BqHx4Ajp"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="UqhrdG0I" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64ICLChA1890446 for ; Mon, 18 May 2026 17:01:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 06u6G2Yp0YNV28hLRQxgGgcv716slVdRo5eq0en7VLc=; b=BqHx4AjpWCa4b4iK Z8UbGBWxMq4rDlzparAxyMSkir/lLMA8xl3Ew01q9r0h0aRmQFHjwbvWIBDNxuY5 6cV/XYdyuz+/rBLzZItL4q9vm2HNDD7HLP/GSV5chHW0ug6+X+YptC2s18k9cK6c FIEkkPR6udsXHguI2nNGHGOJrHy5ul5Q/aC5Wu8vVsIHmBJtad5PcSNBawPYlwti X5BkA2r4meJeWnjWi8l/Vhca1ysoQA9AJoYtzLuSrobu6FlTfs/wXITD1bl7Tqsb sq7N4e0o+bM5fGkipHEvh1GaWjFIt0lGT5MYhwPRXQy4Kmd+iEmB0J2kZpJFRfF7 2VZwuw== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e82pw13m1-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 18 May 2026 17:01:14 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-3662990c03fso2692754a91.0 for ; Mon, 18 May 2026 10:01:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1779123674; x=1779728474; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=06u6G2Yp0YNV28hLRQxgGgcv716slVdRo5eq0en7VLc=; b=UqhrdG0IGTmvJXUFPCc9dM9D3lWC+bKb05hIp+SybJl4MRaJ2jdWk58UoEuDuUsj6N i3zkgF1F8KEz2Mgkq+l1cl1+0HjFUM9DFI1G20Q06TzlfCyOQtftHcNdpYrtG9WPvODu XBHd8FAloNSGdl55LLpQOfS/O2prGUA31yWpnJQSrS1u6TRUahpXAFXd5uT/8rEkUOJs OV5DImi8T66g5He/yqtm/7dj7QBGal2NnXepQnf+hQoW+mwP/fjytsXICSoIkIRIdcfZ kEZTgLWcJQ4ei3ATFBVbuWKRDotyXbBGAzR4o3C5TWvajVfvjHVV9xn8flfn9Q/r64bX 5toA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779123674; x=1779728474; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=06u6G2Yp0YNV28hLRQxgGgcv716slVdRo5eq0en7VLc=; b=IGbACul2+/3o2q4kQ6/wDxvKvo3nQqoX1Wua7qCyVo8Xhzh1Ms0VA8MB5YHF+w+7MI mmvmvLyDYi1fCwAso4vqJR+OePQcUuYC3rKOBu1cEa4tauxyVzb3JzzmIeaT60HX0jXn bpIdL2vgnztopnf+JtrK0PJsIYesD3mr0n9rFkBalf+tWO5w1evBWusn6crA/8iBte6p g2RH6YRQKCKCB1fIn7YbZZSWFdw8Z0dK2gjJte/yjNU9AsqGBw35Ertm6qSVXDoSkwwu h0azCq9bavTqxHhb/OuSP7n6b1bPBd5UDz0PFNYclxuw1pZ/QmJob9lzpUedCLG57330 KKog== X-Gm-Message-State: AOJu0Yy5dwLEQvSEJtjqq7qqPVHNTfmkn895qv8Ibzm9uiLC0RXaUrCO nTwC3PezZMjofT1xlmXwPELiXt3Aw4SJdKDlcERGyPJS1amJ99IMLiX8jGxWj6teAp6TuYxvld0 wJCfKEmOlNpW7kKvdV3ALbnhqe5Bv0PpiSKpLn0wno6TfzDMYQdks7gla57yfe3EFBQCmZsnc9O E= X-Gm-Gg: Acq92OEV8NbpFzIY1ZAlx1VT/RuNMwPygtPQE5/P1p9VXfQmv6nNoNf5xeLH3cplJOo H80Dh1K0DIzV5h+dLwZpd38GO8ClZJ9rx1JsttJDy9JcSJ/jKPDwjlZ4iOVg8UvKYShb4B6kDCE i4KJr6NUB2Ddyr5B8BT/0vrJhXOpjyg+YDKuAvQUj0eG/WbcMruLQEthcl7wirP2tK4Yb2uZS1+ FDQ8gfw6YN0o9iCdSVQAt8nMTYTMP8zvCZpAncYTfF9ryyJWtISlbX6EOHo5Ms6GI/VC5qCIMje ROmOTd78leEYSJPzq3ktA5LcNkZ1qOWzqBJa8+HmNvnAB9SEiqNtzEEGZLfU0FdMNwplVxzLUmj 6TJQ+A1Z261g+ZKL4tfpgBsQLL6rNkeRu7kxmD+RZX1nDUtxbvq5vjCA= X-Received: by 2002:a17:90b:58e4:b0:369:1dbb:4732 with SMTP id 98e67ed59e1d1-369511320aemr11037387a91.0.1779123673714; Mon, 18 May 2026 10:01:13 -0700 (PDT) X-Received: by 2002:a17:90b:58e4:b0:369:1dbb:4732 with SMTP id 98e67ed59e1d1-369511320aemr11037331a91.0.1779123672973; Mon, 18 May 2026 10:01:12 -0700 (PDT) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3695652466dsm5783808a91.0.2026.05.18.10.01.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 May 2026 10:01:12 -0700 (PDT) From: Praveen Talari Date: Mon, 18 May 2026 22:30:52 +0530 Subject: [PATCH v3 2/2] spi: qcom-geni: Add trace events for Qualcomm GENI SPI driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260518-add-tracepoints-for-qcom-geni-spi-v3-2-7928f6810a79@oss.qualcomm.com> References: <20260518-add-tracepoints-for-qcom-geni-spi-v3-0-7928f6810a79@oss.qualcomm.com> In-Reply-To: <20260518-add-tracepoints-for-qcom-geni-spi-v3-0-7928f6810a79@oss.qualcomm.com> To: Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, mukesh.savaliya@oss.qualcomm.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, jyothi.seerapu@oss.qualcomm.com, Praveen Talari , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1779123658; l=2796; i=praveen.talari@oss.qualcomm.com; s=20251114; h=from:subject:message-id; bh=UHMJrmT2ONvAIhQJivnj9PTIHD8kS546Sv7JR6mvijk=; b=JMAeu+sCVD+tN57RQIT++CBVyQUVHpUT5cUM9HcdnM5/XXvsqZewC0nfi8M3Vq2OjpPUmFRJL e+ZzxXT6baMDNLiQ1iN00HAsJrChQl+3PjN2XX5+GSSzpBsil0kqxvk X-Developer-Key: i=praveen.talari@oss.qualcomm.com; a=ed25519; pk=NGK/88fjyHXgfhIKwag7+uIytOmyOypvZ/hDFaYPEss= X-Authority-Analysis: v=2.4 cv=a6AAM0SF c=1 sm=1 tr=0 ts=6a0b45da cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=yQWrNeiMpWR-rHkHbRUA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE4MDE2NiBTYWx0ZWRfX8f5Mm68o0KD0 +Ia50c7Sc+iVgSxRdWJhWXE7Lzd06xNiRRKyCIbgakSNZf4yzgFu0QutI/uMVgvUw2JXWgObAUX TJjQ9wuhypvFWBenCl4l0BbBmQlyEsvR8vytZ6smvHIBXHjpgeT4GM6yhzkNYV/3Qi8AfuPPkZ8 Q0FVHK6TMSDM0Jvvd321NudLnLYEXGNKmF1CsfaDwi7nblZtU6WKcCr6tMkApWmWgfl5yVSxohV CiyLLYgkDP7Ik0BxKtxubnQSUplvVDl7qXZjCRvyF89KNMjwtwxMclD9tHGk+EWHaFpcJYGncbo b+PJ+iQjSP/5EPWKKgSmZYdJ8X6izz+RFNPIsUJNXi4MrgdpBxvANxtHq0m+cZybzE4IM+aPW7i i2a5TPULcMdQN9ncf2u6rlKaYleZpzvkpT7yuwKksX2Y5O5dkVjSZNCJoSt/UAMpXO9T8WxHWcn CRijzSaCsE1SXbD6L/w== X-Proofpoint-GUID: L0pnovn3e1-XbCJqyWijz92N7kmHX1d- X-Proofpoint-ORIG-GUID: L0pnovn3e1-XbCJqyWijz92N7kmHX1d- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-18_03,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 bulkscore=0 impostorscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605180166 Add tracepoints to the Qualcomm GENI (Generic Interface) SPI driver. These trace events enable runtime debugging and performance analysis of SPI operations. The trace events capture SPI clock configuration, setup parameters, transfer details, interrupt status. Reviewed-by: Konrad Dybcio Signed-off-by: Praveen Talari --- v2->v3: - Replaced geni_spi_fifo_params with geni_spi_setup_params trace event. - Updated commit text. v1->v2: - Removed tx/rx data capture since spi core had already support. - Updated commit text. --- drivers/spi/spi-geni-qcom.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index d5fb0edc8e0c..a04cdc1e5ad4 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -1,6 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved. =20 +#define CREATE_TRACE_POINTS +#include + #include #include #include @@ -332,6 +335,9 @@ static int geni_spi_set_clock_and_bw(struct spi_geni_ma= ster *mas, writel(clk_sel, se->base + SE_GENI_CLK_SEL); writel(m_clk_cfg, se->base + GENI_SER_M_CLK_CFG); =20 + trace_geni_spi_clk_cfg(mas->dev, clk_hz, mas->cur_sclk_hz, idx, div, + mas->cur_bits_per_word); + /* Set BW quota for CPU as driver supports FIFO mode only. */ se->icc_paths[CPU_TO_GENI].avg_bw =3D Bps_to_icc(mas->cur_speed_hz); ret =3D geni_icc_set_bw(se); @@ -366,6 +372,9 @@ static int setup_fifo_params(struct spi_device *spi_slv, if ((mode_changed & SPI_CS_HIGH) || (cs_changed && (spi_slv->mode & SPI_C= S_HIGH))) writel((spi_slv->mode & SPI_CS_HIGH) ? BIT(chipselect) : 0, se->base + S= E_SPI_DEMUX_OUTPUT_INV); =20 + trace_geni_spi_setup_params(mas->dev, chipselect, spi_slv->mode, + mode_changed, cs_changed); + return 0; } =20 @@ -861,6 +870,8 @@ static int setup_se_xfer(struct spi_transfer *xfer, spin_lock_irq(&mas->lock); geni_se_setup_m_cmd(se, m_cmd, m_params); =20 + trace_geni_spi_transfer(mas->dev, len, m_cmd); + if (mas->cur_xfer_mode =3D=3D GENI_SE_DMA) { if (m_cmd & SPI_RX_ONLY) geni_se_rx_init_dma(se, sg_dma_address(xfer->rx_sg.sgl), @@ -915,6 +926,8 @@ static irqreturn_t geni_spi_isr(int irq, void *data) if (!m_irq && !dma_tx_status && !dma_rx_status) return IRQ_NONE; =20 + trace_geni_spi_irq(mas->dev, m_irq, dma_tx_status, dma_rx_status); + if (m_irq & (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN | M_RX_FIFO_RD_ERR_EN | M_RX_FIFO_WR_ERR_EN | M_TX_FIFO_RD_ERR_EN | M_TX_FIFO_WR_ERR_EN)) --=20 2.34.1