From nobody Mon May 25 08:13:32 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B7A83EDE5B for ; Fri, 15 May 2026 21:40:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778881215; cv=none; b=p4WsgigWEa5J/gvfRxK1PPbykmtBjTPQaJjBM7mMAaEhjRojzEmgzbB/o1qdFbuctfMzh1O0QVRODfWKJWp44Kc4XUh9LqgQu2j/Ds4dGBSOOR1RHwejyLLOr88MuHC11YIf7YasqT0qjYIx3N2z2ezutAgVk5spsYCd/cnCid4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778881215; c=relaxed/simple; bh=mSBe1ewrkuZ1aPgknwAsTonJHEuKfOujavbWoGjO4AA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=sfB+Et27gRYbfwkzWlOlBCz6x0FCLA4KzywTkMF7xUYxpu4Jz7qLGPJHGtDrX4dVRy3QAt0yQ6s1PrY1+dHCkKJ/Q0AXyP+4V9BaLQt0Z1wimo0BJfHC5vlS4mz3FP2VnsX8G94hO6XrHguB25BxDSlOmrQWdvsvTLZb6wLUcPI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=hsQmukuO; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Wv1ZsMLt; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="hsQmukuO"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Wv1ZsMLt" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 64FJeiX73914862 for ; Fri, 15 May 2026 21:40:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=OKkbaykvbXdsB+BNrhh2by OrHmUZCxNVjNiczxF+Bwo=; b=hsQmukuObI+/wlN6uVU3a0v0kPWf6HeehB0N/+ XiLxLxa9ZBq2cnVU6tv00SLfSOIIlgP4G508fRVjy6RzPfcCC/0XAcb6nU9hW6r3 2U34d7cwnkZXpKHlKoQrow3vEUfdL0Xo8J6dYNEOffAmMk4w24vjXJGh3TOom70m 7gZyU8dIHGxEAftlm6DaIoKHPybfZV068i4BJtYRJmoHALrANf7fSWnd7rFEGB+M Fb2DnHFMqxz+E/TrICL+gjB7IyKIHla6QBfTpwU/dVM57ZjoU0/84ROb5HbqMVch sVrZ0GYBdmDV1sy8MG4lO0Kk4bEGG4eVusTICWlkQTW6g9WQ== Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e67xbrrfu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 15 May 2026 21:40:13 +0000 (GMT) Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-50d6bf346adso9218531cf.1 for ; Fri, 15 May 2026 14:40:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1778881212; x=1779486012; darn=vger.kernel.org; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:from:to:cc:subject:date:message-id:reply-to; bh=OKkbaykvbXdsB+BNrhh2byOrHmUZCxNVjNiczxF+Bwo=; b=Wv1ZsMLtCsP+du2zrhDEwAr6h9aNl+FouKZX3i9TCwUVj67anotY5DDia/Dcy3Esmy NhKc7JxnMDOqa6rFeR5wj47oJMtctM8LVOC3C1JEXd+wv5a4UcWK+BkpXF2ZjhnQbm3/ XL8q0ofjyK82d4uhf29TjvmTmDC1poXiwDTaayYgtpYHfIhzXVRy2NrCB4SJJeK726BS l68GXluySANfs0yGL8S5/GUQlrDEedx+Slqo54fo5AP4hjZYJi+HXmSptMhxwTnT3aVr lvugCVHWwx3poLFeRv4TN9dG4k/Ix3dOk8NPxdUfZTaH67mdy+EIhaODzrjBBy13C+ED 4osA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778881212; x=1779486012; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=OKkbaykvbXdsB+BNrhh2byOrHmUZCxNVjNiczxF+Bwo=; b=gjPA9oCWgyyqU+WPfRZdCwVcrG4/mflazVN/n+apcDzHEY4TROoZSv/VNm7d675/FP zvRKHmlpGW3IdUebss2U8maR8MWs5Wl3CiEO28b1YB/94gmY07b/kRSHf69Q4JAlxFf+ K/B1bfaLn60q7OinWun+0ezMcM7Hzd6X8+FB7n4eBz34AuTz3WFm5Z9VOBEtZoNhgGKB O8wr/cLOFLNfXbxK+0xll47UiumUed+5k2pzTFJyY5V3QSBKP2rMnQR67kFTKgSzMsDC chSkFCkEZ/Jm6Vp7IIXpgV+0sbEuI9TZyYmHeG5kT8vJlQCtaJyQMV92Fl4uPkw0Jkkn IMUg== X-Forwarded-Encrypted: i=1; AFNElJ8NMVuMYG2zYcJzWEBXs8y5TCZuCsLRBV05QLdTnpkq6t9L5cEEcKD8cWT6jy5iBX55vrmk1YMuXRLbCng=@vger.kernel.org X-Gm-Message-State: AOJu0YynwL568hWl4VOi0PYn0phQe8NoLQXIALzWJ3F24Y7eetqQJOKR eOn3MBn100Ek8IFiym4PmDBaUGG/airZWRE2cJxp+6gpEcR+4FXcekAutvM1u+Jj3BKxS0SNbmK pXYBdFrIHhr5U6EocwDdkrH8AY88aPa5G2MflETBjYBedNvL2JeVcL53EQNpJ37Gq8HXgyjifG/ 0= X-Gm-Gg: Acq92OFu8KLA/bHG3rMHr4Yr2JIzZGaWR0kGoCzBT334bJcAoo7Kd182uNTEcTD5DwF 8H73Z8KSchsRCZNFd4uG94fwteA4e3IjaV+tOU+hJWC5R7SQZ+ZCoCdWuEWdgxunuUDmbJd3PzS lgQsejJYKPvlQr5s2rkkS45EaOn6sBSpx8lu4sEcS266PbNHr8/Ea0QdfENsSZ4Qi5RIntEHb2N JWgbpnfiwWCd0x+bPaTU84NkQCLtTLN92u4R79hUOWYHd3q9WrpgfesyMLd+L+BdY67MXgbEOsu paakd3+KgI3hhsFhmz3lwEuDlEqFx0dpEOFMTolCMYylqEc+XwHRt9dcQBemAVGzdGAYG5hBkmd x8sfgXpg6a7bMAeY1COEwCTNWxlJmZV8Y8vt8AaHp5xcMQhaqLdBbkIv2sBWJi9LhexoO/gZ15z kfXRJH8znOtdqxN10IMQIxeNgHjrBhAkFr/7w= X-Received: by 2002:a05:622a:9012:b0:50e:a1ab:114c with SMTP id d75a77b69052e-5165a1eb7e4mr72271531cf.32.1778881211926; Fri, 15 May 2026 14:40:11 -0700 (PDT) X-Received: by 2002:a05:622a:9012:b0:50e:a1ab:114c with SMTP id d75a77b69052e-5165a1eb7e4mr72271161cf.32.1778881211521; Fri, 15 May 2026 14:40:11 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-3945c8859e6sm18274001fa.9.2026.05.15.14.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2026 14:40:10 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 16 May 2026 00:40:10 +0300 Subject: [PATCH] drm/msm/snapshot: fix dumping of the unaligned regions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260516-msm-fix-dsi-dump-2-v1-1-43928094d25b@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIALmSB2oC/yXMQQqEMAyF4atI1gbaql14lcFFbaNGqCONDgPi3 a26/OC9/wChxCTQFgck+rHwd8nQZQF+cstIyCEbjDJWNbrBKBEH/mMQxrDHFQ3a2lW911YFZyE f10R58UQ/3WvZ+5n8dpfgPC8nE9lHdgAAAA== X-Change-ID: 20260515-msm-fix-dsi-dump-2-64a3bc160da6 To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Salendarsingh Gaud X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3707; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=mSBe1ewrkuZ1aPgknwAsTonJHEuKfOujavbWoGjO4AA=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQxb7pF2XTjo6pqZVHWkLLztrePa3jpZ6/Avh1/MCDN8cD 1vmFXGjk9GYhYGRi0FWTJHFp6Blasym5LAPO6bWwwxiZQKZwsDFKQATmXif/X/QhPsXWA43bncL WT3hTeCtl4wKEe8mKmpKxU5yLkjftyzh9PYNwhcO8NWUtjJ2G1zsLiifJn9SJMwoMHSlXFzwW4E fvqUrwmp155s/EI9bsKOkX4G1htdkh/uXSRMS/Thvl1yV8tZfLLn8pffb99c2RE3UmP37Qchl0a yjE3ZJKD3o3r64u/7WMn2lX6fcXH5sf7Qzi+UR7xmpYEvLspNBqaWb828KWBoXxHSlLG2U8VHZ8 dhQxPRXiv7DfKPPF7IYni/l9lZmPm/2UiP9rskR8cbJgR9Tl2r7poRrKU5IWGZluNv7gJrB8whf U9UTevqmDA/Z17flOvfv3+EbcK16Y7HOXG4DqWjZn0+9AQ== X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE1MDIxNiBTYWx0ZWRfX7U72wEHyh6Tf vfgW/KHaKvJhPYeLNokQZPY3dme62xylynsr+Ch3BTkvKlFbs3swy17rDJ1ICZYZIydPZLAyjx6 7AjsSgpsb7/3HSnBHY9iiUH1nlnU48jtDFf37OP8hgSUjN07WW0omkP4fSfQX7zL61LiiO0yzV7 4vTdFG1YJgsCJYf8U9GhIeZY1HSr8rJL1VeMhk9+qyPO+nVy/+DcyokRVrzEILQErM+xjRsGAVx Zk291oxBe/27oBU1rYQlCYRWDtEbEnVK7j8F7x89KRL9S2S6cT5BK3vcOR6gmNQEAmzt73+lKhF PaJ+duIkTNFZFN7W7zBDxdI3EkRHta4QNBQ7v1LOkCOnCbm3Qdohy8upapH3MfZOnR8gvoCN1nS rJp8cjhhSDjkp/sl2hDmmf+M5PXxvpz9DfYJHmzBI/YZixq6FmfcFMHsLLNsPhivnaazyrxhmHx hSE8JdSVQMSsC7DdAVw== X-Proofpoint-ORIG-GUID: wmw7JuIz1ggnW6NufSNFEcdJoVHFqz3o X-Authority-Analysis: v=2.4 cv=L9otheT8 c=1 sm=1 tr=0 ts=6a0792bd cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=ohjMCsGq1aJjNZ5JAMoA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-GUID: wmw7JuIz1ggnW6NufSNFEcdJoVHFqz3o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-15_05,2026-05-15_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 suspectscore=0 spamscore=0 adultscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605150216 The snapshotting code internally aligns data segment to 16 bytes. This works fine for DPU code (where most of the regions are aligned), but fails for snapshotting of the DSI data (because DSI data region is shifted by 4 bytes). Fix the code by removing length alignment and by accurately printing last registers in the region. While reworking the code also fix the 16x memory overallocation in msm_disp_state_dump_regs(). Fixes: 98659487b845 ("drm/msm: add support to take dpu snapshot") Reported-by: Salendarsingh Gaud Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c | 27 ++++++++++++++++++-= ---- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c b/drivers/gp= u/drm/msm/disp/msm_disp_snapshot_util.c index 5e151952dea8..a86c7fc46f68 100644 --- a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c +++ b/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c @@ -9,7 +9,7 @@ =20 #include "msm_disp_snapshot.h" =20 -static void msm_disp_state_dump_regs(u32 **reg, u32 aligned_len, void __io= mem *base_addr) +static void msm_disp_state_dump_regs(u32 **reg, u32 len, void __iomem *bas= e_addr) { u32 len_padded; u32 num_rows; @@ -19,11 +19,11 @@ static void msm_disp_state_dump_regs(u32 **reg, u32 ali= gned_len, void __iomem *b void __iomem *end_addr; int i; =20 - len_padded =3D aligned_len * REG_DUMP_ALIGN; - num_rows =3D aligned_len / REG_DUMP_ALIGN; + len_padded =3D round_up(len, REG_DUMP_ALIGN); + num_rows =3D DIV_ROUND_UP(len, REG_DUMP_ALIGN); =20 addr =3D base_addr; - end_addr =3D base_addr + aligned_len; + end_addr =3D base_addr + len; =20 *reg =3D kvzalloc(len_padded, GFP_KERNEL); if (!*reg) @@ -48,8 +48,8 @@ static void msm_disp_state_dump_regs(u32 **reg, u32 align= ed_len, void __iomem *b static void msm_disp_state_print_regs(const u32 *dump_addr, u32 len, void __iomem *base_addr, struct drm_printer *p) { + void __iomem *addr, *end_addr; int i; - void __iomem *addr; u32 num_rows; =20 if (!dump_addr) { @@ -58,6 +58,7 @@ static void msm_disp_state_print_regs(const u32 *dump_add= r, u32 len, } =20 addr =3D base_addr; + end_addr =3D base_addr + len; num_rows =3D len / REG_DUMP_ALIGN; =20 for (i =3D 0; i < num_rows; i++) { @@ -67,6 +68,17 @@ static void msm_disp_state_print_regs(const u32 *dump_ad= dr, u32 len, dump_addr[i * 4 + 2], dump_addr[i * 4 + 3]); addr +=3D REG_DUMP_ALIGN; } + + if (addr !=3D end_addr) { + drm_printf(p, "0x%lx : %08x", + (unsigned long)(addr - base_addr), + dump_addr[i * 4]); + if (addr + 0x4 < end_addr) + drm_printf(p, " %08x", dump_addr[i * 4 + 1]); + if (addr + 0x8 < end_addr) + drm_printf(p, " %08x", dump_addr[i * 4 + 2]); + drm_printf(p, "\n"); + } } =20 void msm_disp_state_print(struct msm_disp_state *state, struct drm_printer= *p) @@ -172,6 +184,9 @@ void msm_disp_snapshot_add_block(struct msm_disp_state = *disp_state, u32 len, struct va_format vaf; va_list va; =20 + if (strcmp(fmt, "dsi%d_ctrl")) + return; + new_blk =3D kzalloc_obj(struct msm_disp_state_block); if (!new_blk) return; @@ -185,7 +200,7 @@ void msm_disp_snapshot_add_block(struct msm_disp_state = *disp_state, u32 len, va_end(va); =20 INIT_LIST_HEAD(&new_blk->node); - new_blk->size =3D ALIGN(len, REG_DUMP_ALIGN); + new_blk->size =3D len; new_blk->base_addr =3D base_addr; =20 msm_disp_state_dump_regs(&new_blk->state, new_blk->size, base_addr); --- base-commit: 11ff30385c8ad7de9862f4f1cec424fca15a4f13 change-id: 20260515-msm-fix-dsi-dump-2-64a3bc160da6 Best regards, -- =20 With best wishes Dmitry