From nobody Mon May 25 08:11:54 2026 Received: from mail-pf1-f202.google.com (mail-pf1-f202.google.com [209.85.210.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4AB33EF66B for ; Fri, 15 May 2026 22:26:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778884003; cv=none; b=la7yg2Ibqeh/imdTpZXFRNFwc52AmUI+O/lCDHDZVHF+rceXZv2ZMUpEuQTAMgkeMe4JHz5mR3cpLk4O/YuffOT1FipKwg9C9ar7cN6RLn+G1hC45MsG1HdeR6EK1pHox7WBSWeXMGi+0FQU1FHK+fsbjzVZd6Nh3fEkeWu/mV4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778884003; c=relaxed/simple; bh=B447E8limPc0QOoSI1DQ4xmk/fkShF7WyRbD147IadQ=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=GkHbV6QIntELLZlb+POSbB0dxtfzduUoXZKwgI9j6XmGwkLX/BmvTX+ic/Xx7nKG73O6WcQmX67OIAaNHXauJtS17VFDVW/mutjBdme0xv2Z/HUPBOCI/8I7CoRrlHCzX9EYOGIb9jmkcxIu4jDCHyQjYHfyHyj3CagAFQueR+s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=pp+JZXs6; arc=none smtp.client-ip=209.85.210.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="pp+JZXs6" Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-82f85179263so441484b3a.3 for ; Fri, 15 May 2026 15:26:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778884001; x=1779488801; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=Sk8y2wck2NRyTYqUeGYg8msfOIZSAz1otVEKAu16ZpE=; b=pp+JZXs6XKWWdQUX5LI8qeOAbgDpxyh7ry3R+0KpY+inNZXhRtKX8MP1YfuaUfumYR HKB0gsGtpdndZTICU8PHQvbbbMP5Xv8D+bwTNgzxo0NNR7WH/L+xfChF+rCnIYto/RBr ejkJrsL7WD6KuVWNZX0hmTVhvqCfscxOyKlG9DbfESJrHudZFxUlk2yLXDmVPePOXMwk WrpEU//NeuX5nZ7tUJdP4FyB8ffeCcYls2Gsit9XlmoQx2JdY59uLcTZN9ngCFBmz00S nd+skQ56BH1Tjakj2DdhZH5girX+vnKV/DU4A0VhCVkaaF86wDoxrgqs3oP1cDcq8T8D yVXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778884001; x=1779488801; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Sk8y2wck2NRyTYqUeGYg8msfOIZSAz1otVEKAu16ZpE=; b=WPQm1ILOpS4LShFQnvB2JcaMR1cjcjVTASVGIigGP/pVVhTd+H8s1wavYc3oZkYzza VUVb/eFi05eFK0WdhbFA9j5dZcKTxDxlK9Z6lw3uVvmWMpkA5wtfCA0e0tuvq0fATZqn cFt7ldt9fZsKQwlpGpKC0Awos4pGBhZU+PdJPu6fKQbRGzrGXo2RHIt3yUUkgPfjn1AS a0C4fotLtopGhUPOth6C2vIiFEuTkjlzZGUO3iMT0fL5v9MPGXz3b4VgDwJDCSNSRRRD HZHQT3PFoKsSEpgs8u800JXgB5EAi8aZfwxXU87f63cSdFMnm5iGHRhbC0v2n6Zzxdhd cebA== X-Forwarded-Encrypted: i=1; AFNElJ/Q5TNaOQH117ajdVkQKh07cuUsEuUv3Nj6EPdBdnDleZNGTiV5Ri8Co/oc+8eDMS+0hTUy5yrO1cShctQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yx7SS9b4hD3FX8FbH0ioNz1uMR+JSuwTzK0rG9ihRZYJya1y/bM ne5Zj0QZbzgK0ARp1NDajqr6Is11DGbReQ4wkx4a0zyplIzTpX5VoWbYab6VjmMUMljPk3TPxOC 7Drg4WQ== X-Received: from pfblg26.prod.google.com ([2002:a05:6a00:709a:b0:82f:6e26:770b]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:390f:b0:83a:3135:edbd with SMTP id d2e1a72fcca58-83f33aee90amr6423350b3a.7.1778884000868; Fri, 15 May 2026 15:26:40 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:29 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-2-seanjc@google.com> Subject: [PATCH v3 01/10] KVM: VMX: Refresh GUEST_PENDING_DBG_EXCEPTIONS.BS on all injected #DBs From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move KVM's stuffing of GUEST_PENDING_DBG_EXCEPTIONS.BS when RFLAGS.TF=3D1 a= nd MOV/POP SS or STI blocking is active into the exception injection code so that KVM fixes up the VMCS for all injected #DBs, not only those that are reflected back into the guest after #DB interception. E.g. if KVM queues a #DB in the emulator, or more importantly if userspace does save/restore exactly on the #DB+shadow boundary, then KVM needs to massage the VMCS to avoid the VM-Entry consistency check. Opportunistically update the wording of the comment to describe the behavior as a workaround of flawed CPU behavior/architecture, to make it clear that the *only* thing KVM is doing is fudging around a consistency check. Per the SDM: There are no pending debug exceptions after VM entry if any of the following are true: * The VM entry is vectoring with one of the following interruption types: external interrupt, non-maskable interrupt (NMI), hardware exception, or privileged software exception. I.e. forcing GUEST_PENDING_DBG_EXCEPTIONS.BS does *not* impact guest- visible behavior. Fixes: b9bed78e2fa9 ("KVM: VMX: Set vmcs.PENDING_DBG.BS on #DB in STI/MOVSS= blocking shadow") Cc: stable@vger.kernel.org Reported-by: Hou Wenlong Closes: https://lore.kernel.org/all/b1a294bc9ed4dae532474a5dc6c8cb6e5962de7= c.1757416809.git.houwenlong.hwl@antgroup.com Signed-off-by: Sean Christopherson Reviewed-by: Hou Wenlong --- arch/x86/kvm/vmx/vmx.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 1701db1b2e18..a0a0ccf342d3 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1909,6 +1909,24 @@ void vmx_inject_exception(struct kvm_vcpu *vcpu) u32 intr_info =3D ex->vector | INTR_INFO_VALID_MASK; struct vcpu_vmx *vmx =3D to_vmx(vcpu); =20 + /* + * When injecting a #DB, single-stepping is enabled in RFLAGS, and STI + * or MOV-SS blocking is active, set vmcs.PENDING_DBG_EXCEPTIONS.BS to + * prevent a false positive from VM-Entry consistency check. VM-Entry + * asserts that a single-step #DB _must_ be pending in this scenario, + * as the previous instruction cannot have toggled RFLAGS.TF 0=3D>1 + * (because STI and POP/MOV don't modify RFLAGS), therefore the one + * instruction delay when activating single-step breakpoints must have + * already expired. However, the CPU isn't smart enough to peek at + * vmcs.VM_ENTRY_INTR_INFO_FIELD and so doesn't realize that yes, there + * is indeed a #DB pending/imminent. + */ + if (ex->vector =3D=3D DB_VECTOR && + (vmx_get_rflags(vcpu) & X86_EFLAGS_TF) && + vmx_get_interrupt_shadow(vcpu)) + vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS, + vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS) | DR6_BS); + kvm_deliver_exception_payload(vcpu, ex); =20 if (ex->has_error_code) { @@ -5485,26 +5503,9 @@ static int handle_exception_nmi(struct kvm_vcpu *vcp= u) * avoid single-step #DB and MTF updates, as ICEBP is * higher priority. Note, skipping ICEBP still clears * STI and MOVSS blocking. - * - * For all other #DBs, set vmcs.PENDING_DBG_EXCEPTIONS.BS - * if single-step is enabled in RFLAGS and STI or MOVSS - * blocking is active, as the CPU doesn't set the bit - * on VM-Exit due to #DB interception. VM-Entry has a - * consistency check that a single-step #DB is pending - * in this scenario as the previous instruction cannot - * have toggled RFLAGS.TF 0=3D>1 (because STI and POP/MOV - * don't modify RFLAGS), therefore the one instruction - * delay when activating single-step breakpoints must - * have already expired. Note, the CPU sets/clears BS - * as appropriate for all other VM-Exits types. */ if (is_icebp(intr_info)) WARN_ON(!skip_emulated_instruction(vcpu)); - else if ((vmx_get_rflags(vcpu) & X86_EFLAGS_TF) && - (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & - (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS))) - vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS, - vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS) | DR6_BS); =20 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6); return 1; --=20 2.54.0.563.g4f69b47b94-goog From nobody Mon May 25 08:11:54 2026 Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3AEC3F5BE3 for ; Fri, 15 May 2026 22:26:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778884004; cv=none; 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Fri, 15 May 2026 15:26:41 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:30 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-3-seanjc@google.com> Subject: [PATCH v3 02/10] KVM: x86: Capture "struct x86_exception" in inject_emulated_exception() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong As all callers in inject_emulated_exception() use "struct x86_exception" directly, capture it locally instead of using the context. No functional change intended. Suggested-by: Sean Christopherson Signed-off-by: Hou Wenlong Signed-off-by: Sean Christopherson Reviewed-by: Yosry Ahmed --- arch/x86/kvm/x86.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 48f259015ce4..8ddb878934ed 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -8978,15 +8978,14 @@ static void toggle_interruptibility(struct kvm_vcpu= *vcpu, u32 mask) =20 static void inject_emulated_exception(struct kvm_vcpu *vcpu) { - struct x86_emulate_ctxt *ctxt =3D vcpu->arch.emulate_ctxt; + struct x86_exception *ex =3D &vcpu->arch.emulate_ctxt->exception; =20 - if (ctxt->exception.vector =3D=3D PF_VECTOR) - kvm_inject_emulated_page_fault(vcpu, &ctxt->exception); - else if (ctxt->exception.error_code_valid) - kvm_queue_exception_e(vcpu, ctxt->exception.vector, - ctxt->exception.error_code); + if (ex->vector =3D=3D PF_VECTOR) + kvm_inject_emulated_page_fault(vcpu, ex); + else if (ex->error_code_valid) + kvm_queue_exception_e(vcpu, ex->vector, ex->error_code); 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charset="utf-8" From: Hou Wenlong Record DR6 in emulate_db() and use kvm_queue_exception_p() to set DR6 instead of directly using kvm_set_dr6() in emulation, which keeps the handling of DR6 during #DB injection consistent with other code paths. No functional change intended. Signed-off-by: Hou Wenlong [sean: fix e vs. p goof, add kvm_inject_emulated_db() right away] Signed-off-by: Sean Christopherson Reviewed-by: Yosry Ahmed --- arch/x86/kvm/emulate.c | 14 ++++---------- arch/x86/kvm/kvm_emulate.h | 6 +++++- arch/x86/kvm/x86.c | 10 +++++++++- 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index c8c6cc0406d6..510244555a74 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -540,8 +540,9 @@ static int emulate_exception(struct x86_emulate_ctxt *c= txt, int vec, return X86EMUL_PROPAGATE_FAULT; } =20 -static int emulate_db(struct x86_emulate_ctxt *ctxt) +static int emulate_db(struct x86_emulate_ctxt *ctxt, unsigned long dr6) { + ctxt->exception.dr6 =3D dr6; return emulate_exception(ctxt, DB_VECTOR, 0, false); } =20 @@ -3847,15 +3848,8 @@ static int check_dr_read(struct x86_emulate_ctxt *ct= xt) if ((cr4 & X86_CR4_DE) && (dr =3D=3D 4 || dr =3D=3D 5)) return emulate_ud(ctxt); =20 - if (ctxt->ops->get_dr(ctxt, 7) & DR7_GD) { - ulong dr6; - - dr6 =3D ctxt->ops->get_dr(ctxt, 6); - dr6 &=3D ~DR_TRAP_BITS; - dr6 |=3D DR6_BD | DR6_ACTIVE_LOW; - ctxt->ops->set_dr(ctxt, 6, dr6); - return emulate_db(ctxt); - } + if (ctxt->ops->get_dr(ctxt, 7) & DR7_GD) + return emulate_db(ctxt, DR6_BD); =20 return X86EMUL_CONTINUE; } diff --git a/arch/x86/kvm/kvm_emulate.h b/arch/x86/kvm/kvm_emulate.h index 0abff36d0994..bb2a2aee0e13 100644 --- a/arch/x86/kvm/kvm_emulate.h +++ b/arch/x86/kvm/kvm_emulate.h @@ -24,7 +24,11 @@ struct x86_exception { bool error_code_valid; u16 error_code; bool nested_page_fault; - u64 address; /* cr2 or nested page fault gpa */ + union { + u64 address; /* cr2 or nested page fault gpa */ + unsigned long dr6; + u64 payload; + }; u8 async_page_fault; unsigned long exit_qualification; }; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8ddb878934ed..8a862d39302c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -8976,11 +8976,18 @@ static void toggle_interruptibility(struct kvm_vcpu= *vcpu, u32 mask) } } =20 +static void kvm_inject_emulated_db(struct kvm_vcpu *vcpu, unsigned long dr= 6) +{ + kvm_queue_exception_p(vcpu, DB_VECTOR, dr6); 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Fri, 15 May 2026 15:26:44 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:32 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-5-seanjc@google.com> Subject: [PATCH v3 04/10] KVM: x86: Honor KVM_GUESTDBG_USE_HW_BP when emulating MOV DR (in emulator) From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong When emulating a MOV DR instruction, honor KVM_GUESTDBG_USE_HW_BP when checking DR7.GD, and if there is a general-detect #DB, route it to host userspace as appropriate. Consulting only the guest's actual DR7 causes KVM to fail to report a DR access to userspace (assuming the guest itself doesn't have DR7.GD=3D1). Fixes: ae675ef01cd8 ("KVM: x86: Wire-up hardware breakpoints for guest debu= gging") Suggested-by: Lai Jiangshan Signed-off-by: Hou Wenlong [sean: only expose effective DR7 to emulator, massage changelog] Signed-off-by: Sean Christopherson --- arch/x86/kvm/emulate.c | 2 +- arch/x86/kvm/kvm_emulate.h | 1 + arch/x86/kvm/x86.c | 41 ++++++++++++++++++++++++++++++-------- 3 files changed, 35 insertions(+), 9 deletions(-) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 510244555a74..917a521c299f 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -3848,7 +3848,7 @@ static int check_dr_read(struct x86_emulate_ctxt *ctx= t) if ((cr4 & X86_CR4_DE) && (dr =3D=3D 4 || dr =3D=3D 5)) return emulate_ud(ctxt); =20 - if (ctxt->ops->get_dr(ctxt, 7) & DR7_GD) + if (ctxt->ops->get_eff_dr7(ctxt) & DR7_GD) return emulate_db(ctxt, DR6_BD); =20 return X86EMUL_CONTINUE; diff --git a/arch/x86/kvm/kvm_emulate.h b/arch/x86/kvm/kvm_emulate.h index bb2a2aee0e13..33bfc9aa948e 100644 --- a/arch/x86/kvm/kvm_emulate.h +++ b/arch/x86/kvm/kvm_emulate.h @@ -215,6 +215,7 @@ struct x86_emulate_ops { ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); int (*cpl)(struct x86_emulate_ctxt *ctxt); + ulong (*get_eff_dr7)(struct x86_emulate_ctxt *ctxt); ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, = u64 data); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8a862d39302c..8b07bd2f8310 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1601,6 +1601,14 @@ unsigned long kvm_get_dr(struct kvm_vcpu *vcpu, int = dr) } EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_get_dr); =20 +static unsigned long kvm_get_eff_dr7(struct kvm_vcpu *vcpu) +{ + if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) + return vcpu->arch.guest_debug_dr7; + + return vcpu->arch.dr7; +} + int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu) { u32 pmc =3D kvm_rcx_read(vcpu); @@ -8548,6 +8556,11 @@ static void emulator_wbinvd(struct x86_emulate_ctxt = *ctxt) kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt)); } =20 +static unsigned long emulator_get_eff_dr7(struct x86_emulate_ctxt *ctxt) +{ + return kvm_get_eff_dr7(emul_to_vcpu(ctxt)); +} + static unsigned long emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr) { return kvm_get_dr(emul_to_vcpu(ctxt), dr); @@ -8930,6 +8943,7 @@ static const struct x86_emulate_ops emulate_ops =3D { .get_cr =3D emulator_get_cr, .set_cr =3D emulator_set_cr, .cpl =3D emulator_get_cpl, + .get_eff_dr7 =3D emulator_get_eff_dr7, .get_dr =3D emulator_get_dr, .set_dr =3D emulator_set_dr, .set_msr_with_filter =3D emulator_set_msr_with_filter, @@ -8976,23 +8990,36 @@ static void toggle_interruptibility(struct kvm_vcpu= *vcpu, u32 mask) } } =20 -static void kvm_inject_emulated_db(struct kvm_vcpu *vcpu, unsigned long dr= 6) +static int kvm_inject_emulated_db(struct kvm_vcpu *vcpu, unsigned long dr6) { + struct kvm_run *kvm_run =3D vcpu->run; + + if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { + kvm_run->debug.arch.dr6 =3D dr6 | DR6_ACTIVE_LOW; + kvm_run->debug.arch.pc =3D kvm_get_linear_rip(vcpu); + kvm_run->debug.arch.exception =3D DB_VECTOR; + kvm_run->exit_reason =3D KVM_EXIT_DEBUG; + return 0; + } + kvm_queue_exception_p(vcpu, DB_VECTOR, dr6); + return 1; } =20 -static void inject_emulated_exception(struct kvm_vcpu *vcpu) +static int inject_emulated_exception(struct kvm_vcpu *vcpu) { struct x86_exception *ex =3D &vcpu->arch.emulate_ctxt->exception; =20 if (ex->vector =3D=3D DB_VECTOR) - kvm_inject_emulated_db(vcpu, ex->dr6); - else if (ex->vector =3D=3D PF_VECTOR) + return kvm_inject_emulated_db(vcpu, ex->dr6); + + if (ex->vector =3D=3D PF_VECTOR) kvm_inject_emulated_page_fault(vcpu, ex); else if (ex->error_code_valid) kvm_queue_exception_e(vcpu, ex->vector, ex->error_code); else kvm_queue_exception(vcpu, ex->vector); + return 1; } =20 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu) @@ -9501,8 +9528,7 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, gp= a_t cr2_or_gpa, */ WARN_ON_ONCE(ctxt->exception.vector =3D=3D UD_VECTOR || exception_type(ctxt->exception.vector) =3D=3D EXCPT_TRAP); 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Fri, 15 May 2026 15:26:45 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:33 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-6-seanjc@google.com> Subject: [PATCH v3 05/10] KVM: x86: Honor KVM_GUESTDBG_USE_HW_BP when checking for code breakpoints in emulation From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong When KVM_GUESTDBG_USE_HW_BP is enabled, i.e. userspace is usurping the guest's hardware debug registers, the guest's effective breakpoints are controlled by userspace rather than by the guest itself. Honor the KVM_GUESTDBG_USE_HW_BP behavior when handling code #DBs in the emulator so that userspace (and the guest) gets consistent behavior for code #DBs regardless of whether an instruction is executed natively or emulated by KVM. To aid in userspace debug, don't treat code breakpoints as inhibited if KVM_GUESTDBG_USE_HW_BP is enabled as accurately emulating x86 architecture is obviously a non-goal of guest-debug. Fixes: 4a1e10d5b5d8 ("KVM: x86: handle hardware breakpoints during emulatio= n") Signed-off-by: Hou Wenlong [sean: massage changelog] Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 35 ++++++++++------------------------- 1 file changed, 10 insertions(+), 25 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8b07bd2f8310..279e2734e088 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -9319,6 +9319,9 @@ EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_skip_emulated_inst= ruction); =20 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu *vcpu) { + if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) + return false; + if (kvm_get_rflags(vcpu) & X86_EFLAGS_RF) return true; =20 @@ -9335,6 +9338,8 @@ static bool kvm_is_code_breakpoint_inhibited(struct k= vm_vcpu *vcpu) static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int emulation_type, int *r) { + unsigned long dr7 =3D kvm_get_eff_dr7(vcpu); + WARN_ON_ONCE(emulation_type & EMULTYPE_NO_DECODE); =20 /* @@ -9355,34 +9360,14 @@ static bool kvm_vcpu_check_code_breakpoint(struct k= vm_vcpu *vcpu, EMULTYPE_TRAP_UD | EMULTYPE_VMWARE_GP | EMULTYPE_PF)) return false; =20 - if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) && - (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) { - struct kvm_run *kvm_run =3D vcpu->run; - unsigned long eip =3D kvm_get_linear_rip(vcpu); - u32 dr6 =3D kvm_vcpu_check_hw_bp(eip, 0, - vcpu->arch.guest_debug_dr7, - vcpu->arch.eff_db); - - if (dr6 !=3D 0) { - kvm_run->debug.arch.dr6 =3D dr6 | DR6_ACTIVE_LOW; - kvm_run->debug.arch.pc =3D eip; - kvm_run->debug.arch.exception =3D DB_VECTOR; - kvm_run->exit_reason =3D KVM_EXIT_DEBUG; - *r =3D 0; - return true; - } - } - - if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) && + if (unlikely(dr7 & DR7_BP_EN_MASK) && !kvm_is_code_breakpoint_inhibited(vcpu)) { unsigned long eip =3D kvm_get_linear_rip(vcpu); - u32 dr6 =3D kvm_vcpu_check_hw_bp(eip, 0, - vcpu->arch.dr7, - vcpu->arch.db); + u32 dr6 =3D kvm_vcpu_check_hw_bp(eip, 0, dr7, + vcpu->arch.eff_db); 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AFNElJ8E86sgAPJ2uUcuiAvYKx/BvEtAFFEXHagzNaN7LQq8n2VIXilY/vYmYQhLA7Af5CrtQobma+UyOEqc0b4=@vger.kernel.org X-Gm-Message-State: AOJu0YzamCey78ODMNF0vCrd3onfVOxia8Mjz+MIol3ZOO/2ad3frEOt ktyRS3iBHZUqrhJRpVi/SZWEt5YlLoly/fLhgqlHw5Jc1zd9FIljOgjeO0MWB7IPtVFINETWfce EhUGX7Q== X-Received: from pgnc6.prod.google.com ([2002:a63:7246:0:b0:c7d:a551:e17b]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:3c8f:b0:3b1:a9ce:5095 with SMTP id adf61e73a8af0-3b22ea4ce78mr6643197637.22.1778884006352; Fri, 15 May 2026 15:26:46 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:34 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-7-seanjc@google.com> Subject: [PATCH v3 06/10] KVM: x86: Move KVM_GUESTDBG_SINGLESTEP handling into kvm_inject_emulated_db() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong Move KVM_GUESTDBG_SINGLESTEP handling from kvm_vcpu_do_singlestep() into kvm_inject_emulated_db() to dedup the USE_HW_BP vs. SINGLESTEP logic, and to allow for removing kvm_vcpu_do_singlestep() entirely. No functional change intended. Suggested-by: Lai Jiangshan Signed-off-by: Hou Wenlong [sean: massage changelog] Signed-off-by: Sean Christopherson Reviewed-by: Yosry Ahmed --- arch/x86/kvm/x86.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 279e2734e088..ca30a8987f2f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -8994,7 +8994,7 @@ static int kvm_inject_emulated_db(struct kvm_vcpu *vc= pu, unsigned long dr6) { struct kvm_run *kvm_run =3D vcpu->run; =20 - if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { + if (vcpu->guest_debug & (KVM_GUESTDBG_USE_HW_BP | KVM_GUESTDBG_SINGLESTEP= )) { kvm_run->debug.arch.dr6 =3D dr6 | DR6_ACTIVE_LOW; kvm_run->debug.arch.pc =3D kvm_get_linear_rip(vcpu); kvm_run->debug.arch.exception =3D DB_VECTOR; @@ -9279,17 +9279,7 @@ static int kvm_vcpu_check_hw_bp(unsigned long addr, = u32 type, u32 dr7, =20 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu) { - struct kvm_run *kvm_run =3D vcpu->run; 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charset="utf-8" Now that all of kvm_vcpu_do_singlestep()'s previously-unique functionality has been moved into kvm_inject_emulated_db(), drop the one-line wrapper. No functional change intended. Signed-off-by: Sean Christopherson Reviewed-by: Yosry Ahmed --- arch/x86/kvm/x86.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ca30a8987f2f..758b99b2fa7f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -133,7 +133,6 @@ static void process_nmi(struct kvm_vcpu *vcpu); static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); static void store_regs(struct kvm_vcpu *vcpu); static int sync_regs(struct kvm_vcpu *vcpu); -static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu); =20 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2); @@ -9277,11 +9276,6 @@ static int kvm_vcpu_check_hw_bp(unsigned long addr, = u32 type, u32 dr7, return dr6; } =20 -static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu) -{ - return kvm_inject_emulated_db(vcpu, DR6_BS); -} - int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu) { unsigned long rflags =3D kvm_x86_call(get_rflags)(vcpu); @@ -9302,7 +9296,7 @@ int kvm_skip_emulated_instruction(struct kvm_vcpu *vc= pu) * that sets the TF flag". */ if (unlikely(rflags & X86_EFLAGS_TF)) - r =3D kvm_vcpu_do_singlestep(vcpu); + r =3D kvm_inject_emulated_db(vcpu, DR6_BS); return r; } EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_skip_emulated_instruction); @@ -9641,7 +9635,7 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, gp= a_t cr2_or_gpa, kvm_pmu_branch_retired(vcpu); kvm_rip_write(vcpu, ctxt->eip); if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP))) - r =3D kvm_vcpu_do_singlestep(vcpu); + r =3D kvm_inject_emulated_db(vcpu, DR6_BS); kvm_x86_call(update_emulated_instruction)(vcpu); __kvm_set_rflags(vcpu, ctxt->eflags); } --=20 2.54.0.563.g4f69b47b94-goog From nobody Mon May 25 08:11:54 2026 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F8B83F5BF3 for ; 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Fri, 15 May 2026 15:26:49 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:36 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-9-seanjc@google.com> Subject: [PATCH v3 08/10] KVM: selftests: Add all (known) EFLAGS bit definitions From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add #defines for all known EFLAGS bit, e.g. so that tests can use things like EFLAGS.TF to validate single-stepping behavior. Opportunistically use X86_EFLAGS_FIXED instead of an open-coded equivalent when stuffing initial vCPU state. No functional change intended. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86/processor.h | 19 ++++++++++++++++++- .../testing/selftests/kvm/lib/x86/processor.c | 2 +- tools/testing/selftests/kvm/lib/x86/vmx.c | 2 +- 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/te= sting/selftests/kvm/include/x86/processor.h index 77f576ee7789..851ffcd3340c 100644 --- a/tools/testing/selftests/kvm/include/x86/processor.h +++ b/tools/testing/selftests/kvm/include/x86/processor.h @@ -38,7 +38,24 @@ extern u64 guest_tsc_khz; =20 const char *ex_str(int vector); =20 -#define X86_EFLAGS_FIXED (1u << 1) +#define X86_EFLAGS_CF BIT(0) /* Carry Flag */ +#define X86_EFLAGS_FIXED BIT(1) /* Bit 1 - always on */ +#define X86_EFLAGS_PF BIT(2) /* Parity Flag */ +#define X86_EFLAGS_AF BIT(4) /* Auxiliary carry Flag */ +#define X86_EFLAGS_ZF BIT(6) /* Zero Flag */ +#define X86_EFLAGS_SF BIT(7) /* Sign Flag */ +#define X86_EFLAGS_TF BIT(8) /* Trap Flag */ +#define X86_EFLAGS_IF BIT(9) /* Interrupt Flag */ +#define X86_EFLAGS_DF BIT(10) /* Direction Flag */ +#define X86_EFLAGS_OF BIT(11) /* Overflow Flag */ +#define X86_EFLAGS_IOPL BIT(12) /* I/O Privilege Level (2 bits) */ +#define X86_EFLAGS_NT BIT(14) /* Nested Task */ +#define X86_EFLAGS_RF BIT(16) /* Resume Flag */ +#define X86_EFLAGS_VM BIT(17) /* Virtual Mode */ +#define X86_EFLAGS_AC BIT(18) /* Alignment Check/Access Control */ +#define X86_EFLAGS_VIF BIT(19) /* Virtual Interrupt Flag */ +#define X86_EFLAGS_VIP BIT(20) /* Virtual Interrupt Pending */ +#define X86_EFLAGS_ID BIT(21) /* CPUID detection */ =20 #define X86_CR4_VME (1ul << 0) #define X86_CR4_PVI (1ul << 1) diff --git a/tools/testing/selftests/kvm/lib/x86/processor.c b/tools/testin= g/selftests/kvm/lib/x86/processor.c index b51467d70f6e..4ca48de7a926 100644 --- a/tools/testing/selftests/kvm/lib/x86/processor.c +++ b/tools/testing/selftests/kvm/lib/x86/processor.c @@ -848,7 +848,7 @@ struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, u3= 2 vcpu_id) =20 /* Setup guest general purpose registers */ vcpu_regs_get(vcpu, ®s); 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Fri, 15 May 2026 15:26:50 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:37 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-10-seanjc@google.com> Subject: [PATCH v3 09/10] KVM: selftests: Verify guest debug DR7.GD checking during instruction emulation From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong Similar to the global disable test case in x86's debug_regs test, use 'KVM_FEP' to trigger instruction emulation in order to verify the guest debug DR7.GD checking during instruction emulation. Signed-off-by: Hou Wenlong Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86/debug_regs.c | 23 +++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86/debug_regs.c b/tools/testing/s= elftests/kvm/x86/debug_regs.c index 0dfaf03cd0a0..ee9d0f3a5807 100644 --- a/tools/testing/selftests/kvm/x86/debug_regs.c +++ b/tools/testing/selftests/kvm/x86/debug_regs.c @@ -19,6 +19,7 @@ u32 guest_value; =20 extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start; +extern unsigned char fep_bd_start; =20 static void guest_code(void) { @@ -64,6 +65,10 @@ static void guest_code(void) =20 /* DR6.BD test */ asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax"); + + if (is_forced_emulation_enabled) + asm volatile(KVM_FEP "fep_bd_start: mov %%dr0, %%rax" : : : "rax"); + GUEST_DONE(); } =20 @@ -185,7 +190,7 @@ int main(void) target_dr6); } =20 - /* Finally test global disable */ + /* test global disable */ memset(&debug, 0, sizeof(debug)); debug.control =3D KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; debug.arch.debugreg[7] =3D 0x400 | DR7_GD; @@ -202,6 +207,22 @@ int main(void) run->debug.arch.pc, target_rip, run->debug.arch.dr6, target_dr6); =20 + /* test global disable in emulation */ + if (is_forced_emulation_enabled) { + /* Skip the 3-bytes "mov dr0" */ + vcpu_skip_insn(vcpu, 3); + vcpu_run(vcpu); + TEST_ASSERT(run->exit_reason =3D=3D KVM_EXIT_DEBUG && + run->debug.arch.exception =3D=3D DB_VECTOR && + run->debug.arch.pc =3D=3D CAST_TO_RIP(fep_bd_start) && + run->debug.arch.dr6 =3D=3D target_dr6, + "DR7.GD: exit %d exception %d rip 0x%llx " + "(should be 0x%llx) dr6 0x%llx (should be 0x%llx)", + run->exit_reason, run->debug.arch.exception, + run->debug.arch.pc, target_rip, run->debug.arch.dr6, + target_dr6); + } + /* Disable all debug controls, run to the end */ memset(&debug, 0, sizeof(debug)); vcpu_guest_debug_set(vcpu, &debug); --=20 2.54.0.563.g4f69b47b94-goog From nobody Mon May 25 08:11:54 2026 Received: from mail-pg1-f202.google.com (mail-pg1-f202.google.com [209.85.215.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 542F93F5BEA for ; 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Fri, 15 May 2026 15:26:51 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 15:26:38 -0700 In-Reply-To: <20260515222638.1949982-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515222638.1949982-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515222638.1949982-11-seanjc@google.com> Subject: [PATCH v3 10/10] KVM: selftests: Verify VMX's GUEST_PENDING_DBG_EXCEPTIONS.BS Consistency Check From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Hou Wenlong , Lai Jiangshan Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Hou Wenlong In x86's debug_regs test, add a test case to cover the scenario where a single-step #DB occurs in an STI-shadow, in which case KVM needs to stuff vmcs.GUEST_PENDING_DBG_EXCEPTIONS.BS in order to satisfy a flawed VM-Entry Consistency Check. Wire up an IRQ handler to gain a bit of bonus coverage, as the subsequent IRET from the #DB sets RFLAGS.IF, but *without* STI-blocking, and so the pending IRQ is expected on the instruction immediately following STI. Signed-off-by: Hou Wenlong [sean: expect the IRQ on the CLI, and explain why] Signed-off-by: Sean Christopherson --- tools/testing/selftests/kvm/x86/debug_regs.c | 64 ++++++++++++++++++-- 1 file changed, 60 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/x86/debug_regs.c b/tools/testing/s= elftests/kvm/x86/debug_regs.c index ee9d0f3a5807..6299e921dc27 100644 --- a/tools/testing/selftests/kvm/x86/debug_regs.c +++ b/tools/testing/selftests/kvm/x86/debug_regs.c @@ -15,11 +15,46 @@ =20 #define IRQ_VECTOR 0xAA =20 +#define CAST_TO_RIP(v) ((unsigned long long)&(v)) + /* For testing data access debug BP */ u32 guest_value; =20 extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start; -extern unsigned char fep_bd_start; +extern unsigned char fep_bd_start, fep_sti_start, fep_sti_end; + +static void guest_db_handler(struct ex_regs *regs) +{ + static int count; + unsigned long target_rips[2] =3D { + CAST_TO_RIP(fep_sti_start), + CAST_TO_RIP(fep_sti_end), + }; + + __GUEST_ASSERT(regs->rip =3D=3D target_rips[count], + "STI[%u]: unexpected rip 0x%lx (should be 0x%lx)", + count, regs->rip, target_rips[count]); + regs->rflags &=3D ~X86_EFLAGS_TF; + count++; +} + +static void guest_irq_handler(struct ex_regs *regs) +{ + /* + * The pending IRQ should finally be take when KVM_GUESTDBG_BLOCKIRQ is + * cleared and IRQs are enabled. Note, the IRQ is expected to arrive + * on the instruction immediately after STI, even though its in an STI + * shadow. Because the next instruction has a coincident #DB, and #DBs + * are not subject to STI-blocking, the #DB will push RFLAGS.IF=3D1 on + * the stack, and the eventual IRET will unmask IRQs and obliterate the + * STI shadow in the process. + */ + unsigned long target_rip =3D CAST_TO_RIP(fep_sti_start); + + __GUEST_ASSERT(regs->rip =3D=3D target_rip, + "IRQ: unexpected rip 0x%lx (should be 0x%lx)", + regs->rip, target_rip); +} =20 static void guest_code(void) { @@ -66,14 +101,32 @@ static void guest_code(void) /* DR6.BD test */ asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax"); =20 - if (is_forced_emulation_enabled) + /* + * Note, the IRET from the #DB that occurs in the below STI-shadow will + * unmask IRQs, i.e. the pending interrupt will be delivered after #DB + * handling, on the CLI! + */ + if (is_forced_emulation_enabled) { asm volatile(KVM_FEP "fep_bd_start: mov %%dr0, %%rax" : : : "rax"); =20 + /* pending debug exceptions for emulation */ + asm volatile("pushf\n\t" + "orq $" __stringify(X86_EFLAGS_TF) ", (%rsp)\n\t" + "popf\n\t" + "sti\n\t" + "fep_sti_start:" + "cli\n\t" + "pushf\n\t" + "orq $" __stringify(X86_EFLAGS_TF) ", (%rsp)\n\t" + "popf\n\t" + KVM_FEP "sti\n\t" + "fep_sti_end:" + "cli\n\t"); + } + GUEST_DONE(); } =20 -#define CAST_TO_RIP(v) ((unsigned long long)&(v)) - static void vcpu_skip_insn(struct kvm_vcpu *vcpu, int insn_len) { struct kvm_regs regs; @@ -227,6 +280,9 @@ int main(void) memset(&debug, 0, sizeof(debug)); vcpu_guest_debug_set(vcpu, &debug); =20 + vm_install_exception_handler(vm, DB_VECTOR, guest_db_handler); + vm_install_exception_handler(vm, IRQ_VECTOR, guest_irq_handler); + vcpu_run(vcpu); TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); cmd =3D get_ucall(vcpu, &uc); --=20 2.54.0.563.g4f69b47b94-goog