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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: H/SdSl5v2xlJOHZvJ6CoKqM0z9+NJt63hderXmgoz0qT2BMeCAGsYHCnxnAmuguoC0UlZiSUlxQdIPh8QNFSCC7lz/ZV+DBS9HG2SGt+DHzw6J4qmHkwYgMZQ4XQzNc6fVzoctK5VIEuFzE7kqAdYMvz+px8qQu5xEbk2/mKz1wyvaJ0Uo3JfLK6jT7W0gZNNAwwrpR1WMsRVLLJoItR+l36N7T+J0f7B+igoP2oIJOJTcAOOe42qGzHXLHZofwJwWdcLJVVMAxvEb8j0ii7xvkxU+VGkapHgf1ce42WNvVHoxukQ9NuhSOsFD95e+8nWSZ71s0ztsh7yCIOW5hajMjmNHJ74+HuM5G01aujiV1aA43H8HqXFxpztZvrwrNjxLbkDn/CDx+S3wypW8StdEN5cAtTSsaFUzoigf6JBzsR45/o3IKkP7kJDl54ScPp X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 13:45:33.6837 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 681d37dc-8a6e-40ac-1321-08deb2883cb8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB78.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5937 From: Prathima Move SBTSI(Side-Band Temperature Sensor Interface) core functionality out of the hwmon-only path and into drivers/misc/amd-sbi so it can be reused by non-hwmon consumers. I2C probe parsing is moved from drivers/hwmon/sbtsi_temp.c into drivers/misc/amd-sbi/tsi.c under CONFIG_AMD_SBTSI. The core driver stores struct sbtsi_data on the bus device and registers an auxiliary device amd-sbtsi.temp-sensor. per target. This split prepares the driver for additional interfaces while keeping hwmon support in hwmon subsystem on top of common SBTSI core logic. Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - Use auxiliary device to probe hwmon sensor instead of moving the hwmon functionality to misc subsystem. This change is as per feedback. drivers/hwmon/Kconfig | 2 +- drivers/hwmon/sbtsi_temp.c | 73 ++++--------------- drivers/misc/amd-sbi/Kconfig | 13 ++++ drivers/misc/amd-sbi/Makefile | 3 + drivers/misc/amd-sbi/tsi.c | 129 ++++++++++++++++++++++++++++++++++ include/linux/misc/tsi.h | 34 +++++++++ 6 files changed, 194 insertions(+), 60 deletions(-) create mode 100644 drivers/misc/amd-sbi/tsi.c create mode 100644 include/linux/misc/tsi.h diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 14e4cea48acc..6fa51e6ef6ff 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1939,7 +1939,7 @@ config SENSORS_SL28CPLD =20 config SENSORS_SBTSI tristate "Emulated SB-TSI temperature sensor" - depends on I2C + depends on AMD_SBTSI help If you say yes here you get support for emulated temperature sensors on AMD SoCs with SB-TSI interface connected to a BMC device. diff --git a/drivers/hwmon/sbtsi_temp.c b/drivers/hwmon/sbtsi_temp.c index c5b2488c4c7f..28258bf49922 100644 --- a/drivers/hwmon/sbtsi_temp.c +++ b/drivers/hwmon/sbtsi_temp.c @@ -7,13 +7,12 @@ * Copyright (c) 2020, Kun Yi */ =20 +#include #include -#include -#include #include +#include #include -#include -#include +#include =20 /* * SB-TSI registers only support SMBus byte data access. "_INT" registers = are @@ -22,39 +21,17 @@ */ #define SBTSI_REG_TEMP_INT 0x01 /* RO */ #define SBTSI_REG_STATUS 0x02 /* RO */ -#define SBTSI_REG_CONFIG 0x03 /* RO */ #define SBTSI_REG_TEMP_HIGH_INT 0x07 /* RW */ #define SBTSI_REG_TEMP_LOW_INT 0x08 /* RW */ #define SBTSI_REG_TEMP_DEC 0x10 /* RW */ #define SBTSI_REG_TEMP_HIGH_DEC 0x13 /* RW */ #define SBTSI_REG_TEMP_LOW_DEC 0x14 /* RW */ =20 -/* - * Bit for reporting value with temperature measurement range. - * bit =3D=3D 0: Use default temperature range (0C to 255.875C). - * bit =3D=3D 1: Use extended temperature range (-49C to +206.875C). - */ -#define SBTSI_CONFIG_EXT_RANGE_SHIFT 2 -/* - * ReadOrder bit specifies the reading order of integer and decimal part of - * CPU temperature for atomic reads. If bit =3D=3D 0, reading integer part= triggers - * latching of the decimal part, so integer part should be read first. - * If bit =3D=3D 1, read order should be reversed. - */ -#define SBTSI_CONFIG_READ_ORDER_SHIFT 5 - #define SBTSI_TEMP_EXT_RANGE_ADJ 49000 =20 #define SBTSI_TEMP_MIN 0 #define SBTSI_TEMP_MAX 255875 =20 -/* Each client has this additional data */ -struct sbtsi_data { - struct i2c_client *client; - bool ext_range_mode; - bool read_order; -}; - /* * From SB-TSI spec: CPU temperature readings and limit registers encode t= he * temperature in increments of 0.125 from 0 to 255.875. The "high byte" @@ -195,55 +172,33 @@ static const struct hwmon_chip_info sbtsi_chip_info = =3D { .info =3D sbtsi_info, }; =20 -static int sbtsi_probe(struct i2c_client *client) +static int sbtsi_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) { - struct device *dev =3D &client->dev; + struct sbtsi_data *data =3D dev_get_drvdata(adev->dev.parent); + struct device *dev =3D &adev->dev; struct device *hwmon_dev; - struct sbtsi_data *data; - int err; =20 - data =3D devm_kzalloc(dev, sizeof(struct sbtsi_data), GFP_KERNEL); - if (!data) - return -ENOMEM; - - data->client =3D client; - - err =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_CONFIG); - if (err < 0) - return err; - data->ext_range_mode =3D FIELD_GET(BIT(SBTSI_CONFIG_EXT_RANGE_SHIFT), err= ); - data->read_order =3D FIELD_GET(BIT(SBTSI_CONFIG_READ_ORDER_SHIFT), err); - - hwmon_dev =3D devm_hwmon_device_register_with_info(dev, client->name, dat= a, + hwmon_dev =3D devm_hwmon_device_register_with_info(dev, "sbtsi", data, &sbtsi_chip_info, NULL); =20 return PTR_ERR_OR_ZERO(hwmon_dev); } =20 -static const struct i2c_device_id sbtsi_id[] =3D { - {"sbtsi"}, - {} +static const struct auxiliary_device_id sbtsi_id[] =3D { + { .name =3D AMD_SBTSI_ADEV "." AMD_SBTSI_AUX_HWMON }, + { } }; -MODULE_DEVICE_TABLE(i2c, sbtsi_id); +MODULE_DEVICE_TABLE(auxiliary, sbtsi_id); =20 -static const struct of_device_id __maybe_unused sbtsi_of_match[] =3D { - { - .compatible =3D "amd,sbtsi", - }, - { }, -}; -MODULE_DEVICE_TABLE(of, sbtsi_of_match); - -static struct i2c_driver sbtsi_driver =3D { +static struct auxiliary_driver sbtsi_driver =3D { .driver =3D { .name =3D "sbtsi", - .of_match_table =3D of_match_ptr(sbtsi_of_match), }, .probe =3D sbtsi_probe, .id_table =3D sbtsi_id, }; - -module_i2c_driver(sbtsi_driver); +module_auxiliary_driver(sbtsi_driver); =20 MODULE_AUTHOR("Kun Yi "); MODULE_DESCRIPTION("Hwmon driver for AMD SB-TSI emulated sensor"); diff --git a/drivers/misc/amd-sbi/Kconfig b/drivers/misc/amd-sbi/Kconfig index 30e7fad7356c..512251690e0e 100644 --- a/drivers/misc/amd-sbi/Kconfig +++ b/drivers/misc/amd-sbi/Kconfig @@ -20,3 +20,16 @@ config AMD_SBRMI_HWMON This provides support for RMI device hardware monitoring. If enabled, a hardware monitoring device will be created for each socket in the system. + +config AMD_SBTSI + tristate "AMD side band TSI support" + depends on I2C + depends on ARM || ARM64 || COMPILE_TEST + select AUXILIARY_BUS + help + Enables support for the AMD SB-TSI (Side Band Temperature Sensor + Interface) driver, which provides access to emulated CPU temperature + sensors on AMD SoCs via an I2C connected BMC device. + + This driver can also be built as a module. If so, the module will + be called sbtsi. diff --git a/drivers/misc/amd-sbi/Makefile b/drivers/misc/amd-sbi/Makefile index 38eaaa651fd9..28f95b9e204f 100644 --- a/drivers/misc/amd-sbi/Makefile +++ b/drivers/misc/amd-sbi/Makefile @@ -2,3 +2,6 @@ sbrmi-i2c-objs +=3D rmi-i2c.o rmi-core.o sbrmi-i2c-$(CONFIG_AMD_SBRMI_HWMON) +=3D rmi-hwmon.o obj-$(CONFIG_AMD_SBRMI_I2C) +=3D sbrmi-i2c.o +# SBTSI Configuration +sbtsi-objs +=3D tsi.o +obj-$(CONFIG_AMD_SBTSI) +=3D sbtsi.o diff --git a/drivers/misc/amd-sbi/tsi.c b/drivers/misc/amd-sbi/tsi.c new file mode 100644 index 000000000000..ee2216785550 --- /dev/null +++ b/drivers/misc/amd-sbi/tsi.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * tsi.c - AMD SBTSI I2C core driver. Probes the SBTSI device over I2C + * and publishes an auxiliary device on the auxiliary bus. + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. + */ + +#include +#include +#include +#include +#include +#include + +#define SBTSI_REG_CONFIG 0x03 /* RO */ + +/* + * Bit for reporting value with temperature measurement range. + * bit =3D=3D 0: Use default temperature range (0C to 255.875C). + * bit =3D=3D 1: Use extended temperature range (-49C to +206.875C). + */ +#define SBTSI_CONFIG_EXT_RANGE_SHIFT 2 + +/* + * ReadOrder bit specifies the reading order of integer and decimal part of + * CPU temperature for atomic reads. If bit =3D=3D 0, reading integer part= triggers + * latching of the decimal part, so integer part should be read first. + */ +#define SBTSI_CONFIG_READ_ORDER_SHIFT 5 + +static void sbtsi_adev_release(struct device *dev) +{ + kfree(to_auxiliary_dev(dev)); +} + +static void sbtsi_unregister_hwmon_adev(void *_adev) +{ + struct auxiliary_device *adev =3D _adev; + + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +/* + * Create and publish an auxiliary device. The hwmon driver in + * drivers/hwmon/sbtsi_temp.c binds to this device. + * + * @dev: I2C device (parent of the auxiliary device) + * @dev_addr: I2C address =E2=80=94 used as the auxiliary device instance = ID so that + * each socket gets a unique name. + */ +static int sbtsi_create_hwmon_adev(struct device *dev, u8 dev_addr) +{ + struct auxiliary_device *adev; + int ret; + + adev =3D kzalloc_obj(*adev); + if (!adev) + return -ENOMEM; + + adev->name =3D AMD_SBTSI_AUX_HWMON; + adev->id =3D dev_addr; + adev->dev.parent =3D dev; + adev->dev.release =3D sbtsi_adev_release; + + ret =3D auxiliary_device_init(adev); + if (ret) { + kfree(adev); + return ret; + } + + ret =3D __auxiliary_device_add(adev, AMD_SBTSI_ADEV); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(dev, sbtsi_unregister_hwmon_adev, adev); +} + +static int sbtsi_i2c_probe(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + struct sbtsi_data *data; + int err; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->client =3D client; + err =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_CONFIG); + if (err < 0) + return err; + data->ext_range_mode =3D FIELD_GET(BIT(SBTSI_CONFIG_EXT_RANGE_SHIFT), err= ); + data->read_order =3D FIELD_GET(BIT(SBTSI_CONFIG_READ_ORDER_SHIFT), err); + + dev_set_drvdata(dev, data); + return sbtsi_create_hwmon_adev(dev, client->addr); +} + +static const struct i2c_device_id sbtsi_id[] =3D { + {"sbtsi"}, + {} +}; +MODULE_DEVICE_TABLE(i2c, sbtsi_id); + +static const struct of_device_id __maybe_unused sbtsi_of_match[] =3D { + { + .compatible =3D "amd,sbtsi", + }, + { }, +}; +MODULE_DEVICE_TABLE(of, sbtsi_of_match); + +static struct i2c_driver sbtsi_driver =3D { + .driver =3D { + .name =3D "sbtsi-i2c", + .of_match_table =3D of_match_ptr(sbtsi_of_match), + }, + .probe =3D sbtsi_i2c_probe, + .id_table =3D sbtsi_id, +}; + +module_i2c_driver(sbtsi_driver); + +MODULE_DESCRIPTION("AMD SB-TSI I2C core driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/misc/tsi.h b/include/linux/misc/tsi.h new file mode 100644 index 000000000000..6f7177edbcf5 --- /dev/null +++ b/include/linux/misc/tsi.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * AMD SBTSI shared data structure and auxiliary bus definitions. + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. + */ + +#ifndef _LINUX_TSI_H_ +#define _LINUX_TSI_H_ + +#include +#include + +/** + * struct sbtsi_data - driver private data for an AMD SB-TSI device + * @client: underlying I2C client + * @ext_range_mode: sensor uses extended temperature range + * @read_order: if set, decimal part must be read before integer part + */ +struct sbtsi_data { + struct i2c_client *client; + bool ext_range_mode; + bool read_order; +}; + +/* + * Name of the auxiliary device published on the auxiliary bus by the core + * driver. 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charset="utf-8" From: Prathima Extract the paired integer/decimal register reads and writes from the hwmon read/write callbacks into sbtsi_temp_read() and sbtsi_temp_write() helpers. This consolidates error handling and respects the ReadOrder bit for atomic temperature latching. This keeps register access independent while preserving existing hwmon functionality. Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - New patch drivers/hwmon/sbtsi_temp.c | 84 +++++++++++++++++++++++++++----------- 1 file changed, 61 insertions(+), 23 deletions(-) diff --git a/drivers/hwmon/sbtsi_temp.c b/drivers/hwmon/sbtsi_temp.c index 28258bf49922..078f4ab25bde 100644 --- a/drivers/hwmon/sbtsi_temp.c +++ b/drivers/hwmon/sbtsi_temp.c @@ -61,40 +61,82 @@ static inline void sbtsi_mc_to_reg(s32 temp, u8 *intege= r, u8 *decimal) *decimal =3D (temp & 0x7) << 5; } =20 +/* + * Read integer and decimal parts of an SB-TSI temperature register pair + * The read order is determined by the ReadOrder bit to ensure atomic latc= hing. + */ +static int sbtsi_temp_read(struct sbtsi_data *data, u8 reg1, u8 reg2, + u8 *val1, u8 *val2) +{ + int ret; + + ret =3D i2c_smbus_read_byte_data(data->client, reg1); + if (ret < 0) + return ret; + *val1 =3D ret; + ret =3D i2c_smbus_read_byte_data(data->client, reg2); + if (ret < 0) + return ret; + *val2 =3D ret; + return 0; +} + +/* + * Write integer and decimal parts of an SB-TSI temperature register pair. + */ +static int sbtsi_temp_write(struct sbtsi_data *data, u8 reg_int, u8 reg_de= c, + u8 val_int, u8 val_dec) +{ + int ret; + + ret =3D i2c_smbus_write_byte_data(data->client, reg_int, val_int); + if (!ret) + ret =3D i2c_smbus_write_byte_data(data->client, reg_dec, val_dec); + return ret; +} + static int sbtsi_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) { struct sbtsi_data *data =3D dev_get_drvdata(dev); s32 temp_int, temp_dec; + int err; + u8 val_int, val_dec; =20 switch (attr) { case hwmon_temp_input: - if (data->read_order) { - temp_dec =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_DEC); - temp_int =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_INT); - } else { - temp_int =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_INT); - temp_dec =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_DEC); - } + if (data->read_order) + err =3D sbtsi_temp_read(data, + SBTSI_REG_TEMP_DEC, SBTSI_REG_TEMP_INT, + &val_dec, &val_int); + else + err =3D sbtsi_temp_read(data, + SBTSI_REG_TEMP_INT, SBTSI_REG_TEMP_DEC, + &val_int, &val_dec); + if (err < 0) + return err; break; case hwmon_temp_max: - temp_int =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_HIGH_= INT); - temp_dec =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_HIGH_= DEC); + err =3D sbtsi_temp_read(data, + SBTSI_REG_TEMP_HIGH_INT, SBTSI_REG_TEMP_HIGH_DEC, + &val_int, &val_dec); + if (err < 0) + return err; break; case hwmon_temp_min: - temp_int =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_LOW_I= NT); - temp_dec =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_TEMP_LOW_D= EC); + err =3D sbtsi_temp_read(data, + SBTSI_REG_TEMP_LOW_INT, SBTSI_REG_TEMP_LOW_DEC, + &val_int, &val_dec); + + if (err < 0) + return err; break; default: return -EINVAL; } =20 - - if (temp_int < 0) - return temp_int; - if (temp_dec < 0) - return temp_dec; - + temp_int =3D val_int; + temp_dec =3D val_dec; *val =3D sbtsi_reg_to_mc(temp_int, temp_dec); if (data->ext_range_mode) *val -=3D SBTSI_TEMP_EXT_RANGE_ADJ; @@ -106,7 +148,7 @@ static int sbtsi_write(struct device *dev, enum hwmon_s= ensor_types type, u32 attr, int channel, long val) { struct sbtsi_data *data =3D dev_get_drvdata(dev); - int reg_int, reg_dec, err; + int reg_int, reg_dec; u8 temp_int, temp_dec; =20 switch (attr) { @@ -127,11 +169,7 @@ static int sbtsi_write(struct device *dev, enum hwmon_= sensor_types type, val =3D clamp_val(val, SBTSI_TEMP_MIN, SBTSI_TEMP_MAX); sbtsi_mc_to_reg(val, &temp_int, &temp_dec); =20 - err =3D i2c_smbus_write_byte_data(data->client, reg_int, temp_int); - if (err) - return err; - - return i2c_smbus_write_byte_data(data->client, reg_dec, temp_dec); + return sbtsi_temp_write(data, reg_int, reg_dec, temp_int, temp_dec); } =20 static umode_t sbtsi_is_visible(const void *data, --=20 2.34.1 From nobody Fri Jun 12 11:07:38 2026 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012007.outbound.protection.outlook.com [40.93.195.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41904480949; 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charset="utf-8" From: Prathima Move the I2C read/write byte operations from the sbtsi hwmon driver into a common sbtsi_xfer() function in tsi-core.c. This decouples the hwmon sensor driver from the underlying bus transport, preparing for I3C support in a subsequent patch. This patch does not introduce any functional changes. The updates are limit= ed to code organization/cleanup and should not affect the runtime behavior of the driver Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - New patch drivers/hwmon/sbtsi_temp.c | 17 ++++++----------- drivers/misc/amd-sbi/Makefile | 2 +- drivers/misc/amd-sbi/tsi-core.c | 30 ++++++++++++++++++++++++++++++ include/linux/misc/tsi.h | 13 +++++++++++++ 4 files changed, 50 insertions(+), 12 deletions(-) create mode 100644 drivers/misc/amd-sbi/tsi-core.c diff --git a/drivers/hwmon/sbtsi_temp.c b/drivers/hwmon/sbtsi_temp.c index 078f4ab25bde..d7ae986d824c 100644 --- a/drivers/hwmon/sbtsi_temp.c +++ b/drivers/hwmon/sbtsi_temp.c @@ -70,15 +70,10 @@ static int sbtsi_temp_read(struct sbtsi_data *data, u8 = reg1, u8 reg2, { int ret; =20 - ret =3D i2c_smbus_read_byte_data(data->client, reg1); - if (ret < 0) - return ret; - *val1 =3D ret; - ret =3D i2c_smbus_read_byte_data(data->client, reg2); - if (ret < 0) - return ret; - *val2 =3D ret; - return 0; + ret =3D sbtsi_xfer(data, reg1, val1, true); + if (!ret) + ret =3D sbtsi_xfer(data, reg2, val2, true); + return ret; } =20 /* @@ -89,9 +84,9 @@ static int sbtsi_temp_write(struct sbtsi_data *data, u8 r= eg_int, u8 reg_dec, { int ret; =20 - ret =3D i2c_smbus_write_byte_data(data->client, reg_int, val_int); + ret =3D sbtsi_xfer(data, reg_int, &val_int, false); if (!ret) - ret =3D i2c_smbus_write_byte_data(data->client, reg_dec, val_dec); + ret =3D sbtsi_xfer(data, reg_dec, &val_dec, false); return ret; } =20 diff --git a/drivers/misc/amd-sbi/Makefile b/drivers/misc/amd-sbi/Makefile index 28f95b9e204f..ce9321f5c601 100644 --- a/drivers/misc/amd-sbi/Makefile +++ b/drivers/misc/amd-sbi/Makefile @@ -3,5 +3,5 @@ sbrmi-i2c-objs +=3D rmi-i2c.o rmi-core.o sbrmi-i2c-$(CONFIG_AMD_SBRMI_HWMON) +=3D rmi-hwmon.o obj-$(CONFIG_AMD_SBRMI_I2C) +=3D sbrmi-i2c.o # SBTSI Configuration -sbtsi-objs +=3D tsi.o +sbtsi-objs +=3D tsi.o tsi-core.o obj-$(CONFIG_AMD_SBTSI) +=3D sbtsi.o diff --git a/drivers/misc/amd-sbi/tsi-core.c b/drivers/misc/amd-sbi/tsi-cor= e.c new file mode 100644 index 000000000000..6ef1831515bb --- /dev/null +++ b/drivers/misc/amd-sbi/tsi-core.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * tsi-core.c - file defining SB-TSI protocols compliant + * AMD SoC device. + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. + */ + +#include +#include + +/* I2C transfer function */ +static int sbtsi_i2c_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool i= s_read) +{ + if (is_read) { + int ret =3D i2c_smbus_read_byte_data(data->client, reg); + + if (ret < 0) + return ret; + *val =3D ret; + return 0; + } + return i2c_smbus_write_byte_data(data->client, reg, *val); +} + +int sbtsi_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool is_read) +{ + return sbtsi_i2c_xfer(data, reg, val, is_read); +} +EXPORT_SYMBOL_GPL(sbtsi_xfer); diff --git a/include/linux/misc/tsi.h b/include/linux/misc/tsi.h index 6f7177edbcf5..8f8cb90c2023 100644 --- a/include/linux/misc/tsi.h +++ b/include/linux/misc/tsi.h @@ -31,4 +31,17 @@ struct sbtsi_data { #define AMD_SBTSI_ADEV "amd-sbtsi" #define AMD_SBTSI_AUX_HWMON "temp-sensor" =20 +/** + * sbtsi_xfer - Perform a register read or write transfer on an AMD SB-TSI= device. + * + * @data: Pointer to the sbtsi_data structure containing the device con= text + * @reg: Register address to access. + * @val: Pointer to the value to read into or write from. + * @is_read: If true, performs a read transfer and stores the result in @v= al. + * If false, performs a write transfer using the value in @val. + * + * Returns 0 on success, or a negative error code on failure. + */ +int sbtsi_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool is_read); 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charset="utf-8" From: Prathima AMD SB-TSI temperature sensors can be accessed over both I2C and I3C buses depending on the platform configuration. Extend the SB-TSI driver to support both I2C and I3C bus interfaces by selecting the appropriate transport based on the probed bus type. The driver maintains backward compatibility with existing I2C deployments while enabling support for systems using the I3C bus. Register both I2C and I3C drivers using module_i3c_i2c_driver() and update the Kconfig dependency from I2C to I3C_OR_I2C. Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - Changes in accordance with usage of auxiliary device drivers/misc/amd-sbi/Kconfig | 4 +-- drivers/misc/amd-sbi/tsi-core.c | 38 ++++++++++++++++++++ drivers/misc/amd-sbi/tsi.c | 61 +++++++++++++++++++++++++++++++-- include/linux/misc/tsi.h | 10 +++++- 4 files changed, 107 insertions(+), 6 deletions(-) diff --git a/drivers/misc/amd-sbi/Kconfig b/drivers/misc/amd-sbi/Kconfig index 512251690e0e..1a96b71f8506 100644 --- a/drivers/misc/amd-sbi/Kconfig +++ b/drivers/misc/amd-sbi/Kconfig @@ -23,13 +23,13 @@ config AMD_SBRMI_HWMON =20 config AMD_SBTSI tristate "AMD side band TSI support" - depends on I2C + depends on I3C_OR_I2C depends on ARM || ARM64 || COMPILE_TEST select AUXILIARY_BUS help Enables support for the AMD SB-TSI (Side Band Temperature Sensor Interface) driver, which provides access to emulated CPU temperature - sensors on AMD SoCs via an I2C connected BMC device. + sensors on AMD SoCs via an I2C/I3C connected BMC device. =20 This driver can also be built as a module. If so, the module will be called sbtsi. diff --git a/drivers/misc/amd-sbi/tsi-core.c b/drivers/misc/amd-sbi/tsi-cor= e.c index 6ef1831515bb..19388737b225 100644 --- a/drivers/misc/amd-sbi/tsi-core.c +++ b/drivers/misc/amd-sbi/tsi-core.c @@ -23,8 +23,46 @@ static int sbtsi_i2c_xfer(struct sbtsi_data *data, u8 re= g, u8 *val, bool is_read return i2c_smbus_write_byte_data(data->client, reg, *val); } =20 +/* I3C read transfer function */ +static int sbtsi_i3c_read(struct sbtsi_data *data, u8 reg, u8 *val) +{ + struct i3c_xfer xfers[2] =3D { }; + + /* Add Register data to read/write */ + xfers[0].rnw =3D false; + xfers[0].len =3D 1; + xfers[0].data.out =3D ® + + xfers[1].rnw =3D true; + xfers[1].len =3D 1; + xfers[1].data.in =3D val; + + return i3c_device_do_xfers(data->i3cdev, xfers, 2, I3C_SDR); +} + +/* I3C write transfer function */ +static int sbtsi_i3c_write(struct sbtsi_data *data, u8 reg, u8 val) +{ + u8 buf[2]; + struct i3c_xfer xfers =3D { + .rnw =3D false, + .len =3D 2, + .data.out =3D buf, + }; + + buf[0] =3D reg; + buf[1] =3D val; + + return i3c_device_do_xfers(data->i3cdev, &xfers, 1, I3C_SDR); +} + +/* Unified transfer function for I2C and I3C access */ int sbtsi_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool is_read) { + if (data->is_i3c) + return is_read ? sbtsi_i3c_read(data, reg, val) + : sbtsi_i3c_write(data, reg, *val); + return sbtsi_i2c_xfer(data, reg, val, is_read); } EXPORT_SYMBOL_GPL(sbtsi_xfer); diff --git a/drivers/misc/amd-sbi/tsi.c b/drivers/misc/amd-sbi/tsi.c index ee2216785550..43bbac7faf08 100644 --- a/drivers/misc/amd-sbi/tsi.c +++ b/drivers/misc/amd-sbi/tsi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* - * tsi.c - AMD SBTSI I2C core driver. Probes the SBTSI device over I2C + * tsi.c - AMD SBTSI I2C/I3C core driver. Probes the SBTSI device over I2C= /I3C * and publishes an auxiliary device on the auxiliary bus. * * Copyright (C) 2026 Advanced Micro Devices, Inc. @@ -89,6 +89,7 @@ static int sbtsi_i2c_probe(struct i2c_client *client) if (!data) return -ENOMEM; =20 + data->is_i3c =3D false; data->client =3D client; err =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_CONFIG); if (err < 0) @@ -123,7 +124,61 @@ static struct i2c_driver sbtsi_driver =3D { .id_table =3D sbtsi_id, }; =20 -module_i2c_driver(sbtsi_driver); +static int sbtsi_i3c_probe(struct i3c_device *i3cdev) +{ + struct device *dev =3D i3cdev_to_dev(i3cdev); + struct sbtsi_data *data; + int err; + u8 val; + + /* + * AMD OOB devices differ on basis of Instance ID, + * for SBTSI, instance ID is 0. + * As the device Id match is not on basis of Instance ID, + * add the below check to probe the SBTSI device only and + * not other OOB devices. + */ + if (I3C_PID_INSTANCE_ID(i3cdev->desc->info.pid) !=3D 0) + return -ENXIO; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->i3cdev =3D i3cdev; + data->is_i3c =3D true; + + err =3D sbtsi_xfer(data, SBTSI_REG_CONFIG, &val, true); + if (err) + return err; + + data->ext_range_mode =3D FIELD_GET(BIT(SBTSI_CONFIG_EXT_RANGE_SHIFT), val= ); + data->read_order =3D FIELD_GET(BIT(SBTSI_CONFIG_READ_ORDER_SHIFT), val); + + dev_set_drvdata(dev, data); + return sbtsi_create_hwmon_adev(dev, i3cdev->desc->info.dyn_addr); +} + +static const struct i3c_device_id sbtsi_i3c_id[] =3D { + /* PID for AMD SBTSI device */ + I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x1, NULL), + I3C_DEVICE_EXTRA_INFO(0x0, 0x0, 0x118, NULL), /* Socket:0, Venice */ + I3C_DEVICE_EXTRA_INFO(0x0, 0x100, 0x118, NULL), /* Socket:1, Venice */ + I3C_DEVICE_EXTRA_INFO(0x112, 0x0, 0x119, NULL), /* Socket:0, Venice */ + I3C_DEVICE_EXTRA_INFO(0x112, 0x100, 0x119, NULL), /* Socket:1, Venice */ + {} +}; +MODULE_DEVICE_TABLE(i3c, sbtsi_i3c_id); + +static struct i3c_driver sbtsi_i3c_driver =3D { + .driver =3D { + .name =3D "sbtsi-i3c", + }, + .probe =3D sbtsi_i3c_probe, + .id_table =3D sbtsi_i3c_id, +}; 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charset="utf-8" From: Prathima Implement IOCTL interface for SB-TSI driver to enable userspace access to TSI register read/write operations through the AMD Advanced Platform Management Link (APML) protocol. Add an ioctl command (SBTSI_IOCTL_REG_XFER_CMD) that accepts a register address, data byte, and direction flag. Serialize access with a mutex shared between the hwmon and ioctl paths to prevent concurrent bus transactions from corrupting register state. Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - Use of devm_mutex_init in place of mutex_init - Use of guard_mutex in place of mutex_lock()/mutex_unlock() - Use of devm_add_action_or_reset() for clean removal =20 drivers/hwmon/sbtsi_temp.c | 6 +++ drivers/misc/amd-sbi/tsi-core.c | 84 ++++++++++++++++++++++++++++++++- drivers/misc/amd-sbi/tsi-core.h | 15 ++++++ drivers/misc/amd-sbi/tsi.c | 20 ++++++-- include/linux/misc/tsi.h | 8 ++++ include/uapi/misc/amd-apml.h | 23 +++++++++ 6 files changed, 151 insertions(+), 5 deletions(-) create mode 100644 drivers/misc/amd-sbi/tsi-core.h diff --git a/drivers/hwmon/sbtsi_temp.c b/drivers/hwmon/sbtsi_temp.c index d7ae986d824c..00e982f4c716 100644 --- a/drivers/hwmon/sbtsi_temp.c +++ b/drivers/hwmon/sbtsi_temp.c @@ -64,12 +64,15 @@ static inline void sbtsi_mc_to_reg(s32 temp, u8 *intege= r, u8 *decimal) /* * Read integer and decimal parts of an SB-TSI temperature register pair * The read order is determined by the ReadOrder bit to ensure atomic latc= hing. + * The mutex protects against concurrent access to the shared I2C/I3C bus = by + * the hwmon sysfs and a userspace ioctl */ static int sbtsi_temp_read(struct sbtsi_data *data, u8 reg1, u8 reg2, u8 *val1, u8 *val2) { int ret; =20 + guard(mutex)(&data->lock); ret =3D sbtsi_xfer(data, reg1, val1, true); if (!ret) ret =3D sbtsi_xfer(data, reg2, val2, true); @@ -78,12 +81,15 @@ static int sbtsi_temp_read(struct sbtsi_data *data, u8 = reg1, u8 reg2, =20 /* * Write integer and decimal parts of an SB-TSI temperature register pair. + * The mutex protects against concurrent access to the shared I2C/I3C bus = by + * the hwmon sysfs and a userspace ioctl */ static int sbtsi_temp_write(struct sbtsi_data *data, u8 reg_int, u8 reg_de= c, u8 val_int, u8 val_dec) { int ret; =20 + guard(mutex)(&data->lock); ret =3D sbtsi_xfer(data, reg_int, &val_int, false); if (!ret) ret =3D sbtsi_xfer(data, reg_dec, &val_dec, false); diff --git a/drivers/misc/amd-sbi/tsi-core.c b/drivers/misc/amd-sbi/tsi-cor= e.c index 19388737b225..c5bd60409d5b 100644 --- a/drivers/misc/amd-sbi/tsi-core.c +++ b/drivers/misc/amd-sbi/tsi-core.c @@ -6,8 +6,12 @@ * Copyright (C) 2026 Advanced Micro Devices, Inc. */ =20 +#include +#include #include -#include +#include +#include +#include "tsi-core.h" =20 /* I2C transfer function */ static int sbtsi_i2c_xfer(struct sbtsi_data *data, u8 reg, u8 *val, bool i= s_read) @@ -62,7 +66,83 @@ int sbtsi_xfer(struct sbtsi_data *data, u8 reg, u8 *val,= bool is_read) if (data->is_i3c) return is_read ? sbtsi_i3c_read(data, reg, val) : sbtsi_i3c_write(data, reg, *val); - return sbtsi_i2c_xfer(data, reg, val, is_read); } EXPORT_SYMBOL_GPL(sbtsi_xfer); + +/* + * The mutex protects against concurrent access to the shared I2C/I3C bus = by + * the hwmon sysfs and a userspace ioctl. + */ +static int sbtsi_xfer_ioctl(struct sbtsi_data *data, u8 reg, u8 *val, bool= is_read) +{ + guard(mutex)(&data->lock); + return sbtsi_xfer(data, reg, val, is_read); +} + +static int apml_tsi_reg_xfer(struct sbtsi_data *data, + struct apml_tsi_xfer_msg __user *arg) +{ + struct apml_tsi_xfer_msg msg =3D { 0 }; + int ret; + + if (copy_from_user(&msg, arg, sizeof(struct apml_tsi_xfer_msg))) + return -EFAULT; + + ret =3D sbtsi_xfer_ioctl(data, msg.reg_addr, &msg.data_in_out, msg.rflag); + + if (msg.rflag && !ret) { + if (copy_to_user(arg, &msg, sizeof(struct apml_tsi_xfer_msg))) + return -EFAULT; + } + return ret; +} + +static long sbtsi_ioctl(struct file *fp, unsigned int cmd, unsigned long a= rg) +{ + void __user *argp =3D (void __user *)arg; + struct sbtsi_data *data; + + data =3D container_of(fp->private_data, struct sbtsi_data, sbtsi_misc_dev= ); + switch (cmd) { + case SBTSI_IOCTL_REG_XFER_CMD: + return apml_tsi_reg_xfer(data, argp); + default: + return -ENOTTY; + } +} + +static const struct file_operations sbtsi_fops =3D { + .owner =3D THIS_MODULE, + .unlocked_ioctl =3D sbtsi_ioctl, + .compat_ioctl =3D compat_ptr_ioctl, +}; + +static void sbtsi_misc_deregister(void *data) +{ + misc_deregister((struct miscdevice *)data); +} + +int create_misc_tsi_device(struct sbtsi_data *data, struct device *dev) +{ + int ret; + + data->sbtsi_misc_dev.name =3D devm_kasprintf(dev, GFP_KERNEL, + "sbtsi-%x", data->dev_addr); + if (!data->sbtsi_misc_dev.name) + return -ENOMEM; + data->sbtsi_misc_dev.minor =3D MISC_DYNAMIC_MINOR; + data->sbtsi_misc_dev.fops =3D &sbtsi_fops; + data->sbtsi_misc_dev.parent =3D dev; + data->sbtsi_misc_dev.nodename =3D devm_kasprintf(dev, GFP_KERNEL, + "sbtsi-%x", data->dev_addr); + if (!data->sbtsi_misc_dev.nodename) + return -ENOMEM; + data->sbtsi_misc_dev.mode =3D 0600; + + ret =3D misc_register(&data->sbtsi_misc_dev); + if (ret) + return ret; + return devm_add_action_or_reset(dev, sbtsi_misc_deregister, + &data->sbtsi_misc_dev); +} diff --git a/drivers/misc/amd-sbi/tsi-core.h b/drivers/misc/amd-sbi/tsi-cor= e.h new file mode 100644 index 000000000000..7bf967a09837 --- /dev/null +++ b/drivers/misc/amd-sbi/tsi-core.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * AMD SBTSI misc tsi device . + * + * Copyright (C) 2026 Advanced Micro Devices, Inc. + */ + +#ifndef _LINUX_TSI_CORE_H_ +#define _LINUX_TSI_CORE_H_ + +#include + +int create_misc_tsi_device(struct sbtsi_data *data, struct device *dev); + +#endif /* _LINUX_TSI_CORE_H_ */ diff --git a/drivers/misc/amd-sbi/tsi.c b/drivers/misc/amd-sbi/tsi.c index 43bbac7faf08..6a9356740f4e 100644 --- a/drivers/misc/amd-sbi/tsi.c +++ b/drivers/misc/amd-sbi/tsi.c @@ -10,8 +10,8 @@ #include #include #include -#include #include +#include "tsi-core.h" =20 #define SBTSI_REG_CONFIG 0x03 /* RO */ =20 @@ -89,6 +89,9 @@ static int sbtsi_i2c_probe(struct i2c_client *client) if (!data) return -ENOMEM; =20 + err =3D devm_mutex_init(dev, &data->lock); + if (err) + return err; data->is_i3c =3D false; data->client =3D client; err =3D i2c_smbus_read_byte_data(data->client, SBTSI_REG_CONFIG); @@ -98,7 +101,11 @@ static int sbtsi_i2c_probe(struct i2c_client *client) data->read_order =3D FIELD_GET(BIT(SBTSI_CONFIG_READ_ORDER_SHIFT), err); =20 dev_set_drvdata(dev, data); - return sbtsi_create_hwmon_adev(dev, client->addr); + err =3D sbtsi_create_hwmon_adev(dev, client->addr); + if (err < 0) + return err; + data->dev_addr =3D client->addr; + return create_misc_tsi_device(data, dev); } =20 static const struct i2c_device_id sbtsi_id[] =3D { @@ -145,6 +152,9 @@ static int sbtsi_i3c_probe(struct i3c_device *i3cdev) if (!data) return -ENOMEM; =20 + err =3D devm_mutex_init(dev, &data->lock); + if (err) + return err; data->i3cdev =3D i3cdev; data->is_i3c =3D true; =20 @@ -156,7 +166,11 @@ static int sbtsi_i3c_probe(struct i3c_device *i3cdev) data->read_order =3D FIELD_GET(BIT(SBTSI_CONFIG_READ_ORDER_SHIFT), val); =20 dev_set_drvdata(dev, data); - return sbtsi_create_hwmon_adev(dev, i3cdev->desc->info.dyn_addr); + err =3D sbtsi_create_hwmon_adev(dev, i3cdev->desc->info.dyn_addr); + if (err < 0) + return err; + data->dev_addr =3D i3cdev->desc->info.dyn_addr; + return create_misc_tsi_device(data, dev); } =20 static const struct i3c_device_id sbtsi_i3c_id[] =3D { diff --git a/include/linux/misc/tsi.h b/include/linux/misc/tsi.h index 7ce689081427..184b1aa14f0a 100644 --- a/include/linux/misc/tsi.h +++ b/include/linux/misc/tsi.h @@ -11,12 +11,17 @@ #include #include #include +#include +#include #include =20 /** * struct sbtsi_data - driver private data for an AMD SB-TSI device * @client: underlying I2C client * @i3cdev: underlying I3C device (when using I3C bus) + * @sbtsi_misc_dev: miscdevice exposing ioctl interface at /dev/sbtsi- + * @lock: mutex protecting concurrent access to the device + * @dev_addr: I2C/I3C device address, used to name the misc device n= ode * @ext_range_mode: sensor uses extended temperature range * @read_order: if set, decimal part must be read before integer part * @is_i3c: true when the device is accessed over I3C @@ -26,6 +31,9 @@ struct sbtsi_data { struct i2c_client *client; struct i3c_device *i3cdev; }; + struct miscdevice sbtsi_misc_dev; + struct mutex lock; /* protects concurrent access to the device */ + u8 dev_addr; bool ext_range_mode; bool read_order; bool is_i3c; diff --git a/include/uapi/misc/amd-apml.h b/include/uapi/misc/amd-apml.h index 745b3338fc06..8a85f79b0938 100644 --- a/include/uapi/misc/amd-apml.h +++ b/include/uapi/misc/amd-apml.h @@ -73,6 +73,13 @@ struct apml_reg_xfer_msg { __u8 rflag; }; =20 +struct apml_tsi_xfer_msg { + __u8 reg_addr; /* TSI register address offset */ + __u8 data_in_out; /* Register data for read/write */ + __u8 rflag; /* Register read or write */ + __u8 pad; /* Explicit padding */ +}; + /* * AMD sideband interface base IOCTL */ @@ -149,4 +156,20 @@ struct apml_reg_xfer_msg { */ #define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_re= g_xfer_msg) =20 +/** + * DOC: SBTSI_IOCTL_REG_XFER_CMD + * + * @Parameters + * + * @struct apml_tsi_xfer_msg + * Pointer to the &struct apml_tsi_xfer_msg that will contain the protocol + * information + * + * @Description + * IOCTL command for APML TSI messages using generic _IOWR + * The IOCTL provides userspace access to AMD sideband TSI register xfer p= rotocol + * - TSI protocol to read/write temperature sensor registers + */ +#define SBTSI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 4, struct apml_ts= i_xfer_msg) + #endif /*_AMD_APML_H_*/ --=20 2.34.1 From nobody Fri Jun 12 11:07:38 2026 Received: from BN8PR05CU002.outbound.protection.outlook.com (mail-eastus2azon11011038.outbound.protection.outlook.com [52.101.57.38]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE0AC481ABC; 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User space C-APIs are made available by esmi_oob_library [1], which is provided by the E-SMS project [2]. Link: https://github.com/amd/esmi_oob_library [1] Link: https://www.amd.com/en/developer/e-sms.html [2] Include a user-space open example for /dev/sbtsi-* and list auxiliary bus sysfs paths. Reviewed-by: Akshay Gupta Signed-off-by: Prathima --- Changes since v1: - Elaborate the document Documentation/misc-devices/amd-sbi.rst | 64 ++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/Documentation/misc-devices/amd-sbi.rst b/Documentation/misc-de= vices/amd-sbi.rst index f91ddadefe48..6a6344439ef5 100644 --- a/Documentation/misc-devices/amd-sbi.rst +++ b/Documentation/misc-devices/amd-sbi.rst @@ -48,6 +48,56 @@ Access restrictions: * APML Mailbox messages and Register xfer access are read-write, * CPUID and MCA_MSR access is read-only. =20 +SBTSI device +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +sbtsi driver under the drivers/misc/amd-sbi creates miscdevice +/dev/sbtsi-* to let user space programs run APML TSI register xfer +commands. + +The driver supports both I2C and I3C transports for SB-TSI targets. +The transport is selected by the bus where the device is enumerated. + +.. code-block:: bash + + $ ls -al /dev/sbtsi-4c + crw------- 1 root root 10, 116 Apr 2 05:22 /dev/sbtsi-4c + + +Access restrictions: + * Only root user is allowed to open the file. + * APML TSI Register xfer access is read-write. + +SBTSI hwmon interface +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +The sbtsi_temp auxiliary driver binds to the auxiliary device published +by the core sbtsi driver on the auxiliary bus. The auxiliary device is +named amd-sbtsi.temp-sensor. where is the device's dynamic +address. + +It registers a hwmon device, providing a standard Linux hwmon interface +for reading CPU temperature and managing temperature limits. + +The hwmon device appears under ``/sys/class/hwmon/`` when both ``sbtsi.ko`` +and ``sbtsi_temp.ko`` are loaded. + +Verify auxiliary bus device:: + + ls /sys/bus/auxiliary/devices/ + # e.g. amd-sbtsi.temp-sensor.X + +Example usage:: + + # Read current temperature + cat /sys/class/hwmon/hwmon/temp1_input + + # Set high temperature limit to 70 =C2=B0C + echo 70000 > /sys/class/hwmon/hwmon/temp1_max + + # Verify + cat /sys/class/hwmon/hwmon/temp1_max + Driver IOCTLs =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 @@ -63,6 +113,9 @@ Driver IOCTLs .. c:macro:: SBRMI_IOCTL_REG_XFER_CMD .. kernel-doc:: include/uapi/misc/amd-apml.h :doc: SBRMI_IOCTL_REG_XFER_CMD +.. c:macro:: SBTSI_IOCTL_REG_XFER_CMD +.. kernel-doc:: include/uapi/misc/amd-apml.h + :doc: SBTSI_IOCTL_REG_XFER_CMD =20 User-space usage =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D @@ -85,6 +138,16 @@ Next thing, open the device file, as follows:: exit(1); } =20 +To open SB-TSI device:: + + int file; + + file =3D open("/dev/sbtsi-*", O_RDWR); + if (file < 0) { + /* ERROR HANDLING */ + exit(1); + } + The following IOCTLs are defined: =20 ``#define SB_BASE_IOCTL_NR 0xF9`` @@ -92,6 +155,7 @@ The following IOCTLs are defined: ``#define SBRMI_IOCTL_CPUID_CMD _IOWR(SB_BASE_IOCTL_NR, 1, struct apml_cp= uid_msg)`` ``#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mc= amsr_msg)`` ``#define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_= reg_xfer_msg)`` +``#define SBTSI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 4, struct = apml_tsi_xfer_msg)`` =20 =20 User space C-APIs are made available by esmi_oob_library, hosted at --=20 2.34.1