From nobody Fri Jun 12 12:44:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD3F921FF2E for ; Fri, 15 May 2026 00:27:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804831; cv=none; b=bcHPkVkBKyk9MeIvRHcJ9SQFH/hf1i2QTlguq+RXM55adKW73aVOkJS/1sfNtVvUaWnWQ68j2iVls94h01cm3dwVYrXU5BOWqWOm7fhcr0UEsHl8ItYAUDgmxT2fp+lzDBul3PtCLM2+TQPwZGKtgThUP4HNHDCq3CAHQGHT1QY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804831; c=relaxed/simple; bh=70dF4NSBOzzqyJCf95BBO0NRcByTjoO440kK2N8B2ug=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=duOPOQV1r9yHrZYqaF0HkUKPl66rJiGN1YQ/CJBhQarlTLxYQv24No2yvvrVsw0WeF+XG/ZVJ4Ru+QZclvVO+hnK2qr5sQa8Nedj1EjvQ7K7l63f7kTJwunXzOb9RlBDaz8W95b5cPt2iPNoIBdEOIBWqaAiNARcD9Vt+8JbPYs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BhsigFnK; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BhsigFnK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778804829; x=1810340829; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=70dF4NSBOzzqyJCf95BBO0NRcByTjoO440kK2N8B2ug=; b=BhsigFnKL6ripPDZssMOVogGk2iFQ1qqfl9J2scXaOeRvcvooY7DTudY 8ymzhZVareOvzsswjpV9w8tE0+PZRVpz+a2FzrjBZv8N/S23a6dOw6GhU 3mCXt+6utItWEcLIWRbCM2MjgXqQgJz1e6bQFZpCIGUkFLEo7rWiwRcm4 sQbcaaCZxAdF6VRgkhqBK+AX3ebVG75LgzCpmQ+O6KNc+C5ix0st2Wvi6 6CWhAIBJWDYTE3aHkVXVku/WNcgSkFoVaM3xAo6Gan3gFi/AUJtCAupif Qaxtsjdba2o3eUAeMq9ZAoy/gGmQfG6sLV8bPQTXDF64k4/LnUXoioXDV Q==; X-CSE-ConnectionGUID: x6fWMqhJT7eGUyAhnMrAHw== X-CSE-MsgGUID: pAZEiok7RWKNxEGbFNmhqA== X-IronPort-AV: E=McAfee;i="6800,10657,11786"; a="83613074" X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="83613074" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2026 17:27:02 -0700 X-CSE-ConnectionGUID: LOs8g3nkSX2xR8/LhPxRZA== X-CSE-MsgGUID: 42HLrR4oQTOGXFJQXOl3gA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="238418079" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa008.jf.intel.com with ESMTP; 14 May 2026 17:27:01 -0700 From: Sohil Mehta To: Dave Hansen , Borislav Petkov , x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Josh Poimboeuf , Richard Weinberger , Andrew Cooper , Tony Luck , Sohil Mehta , "Ahmed S . Darwish" , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] x86/cpu/intel: Don't clear X86_BUG_F00F before setting it Date: Thu, 14 May 2026 17:24:58 -0700 Message-ID: <20260515002500.2463393-2-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260515002500.2463393-1-sohil.mehta@intel.com> References: <20260515002500.2463393-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Richard Weinberger On x86 SMP systems with the F00F bug present, the following warning occurs for each AP: WARNING: arch/x86/kernel/cpu/cpuid-deps.c:126 at do_clear_cpu_cap+0xb4/0x= 110 Call Trace: clear_cpu_cap+0x8/0x10 init_intel+0x1b/0x4b0 identify_cpu+0x154/0x750 identify_secondary_cpu+0x3d/0x90 start_secondary+0x6b/0xf0 startup_32_smp+0x151/0x160 The X86_BUG_F00F CPU feature is first cleared in intel_workarounds() and then set for the affected models. This sequence works fine on the BSP but on AP bringup, where alternatives have already been patched, clearing the flag triggers the warning. There is no technical reason for clearing the flag before setting it. It is mainly an artifact of the introduction of X86_BUG_F00F in commit e2604b49e8a8 ("x86, cpu: Convert F00F bug detection"). Remove the unnecessary clearing of the flag. Note that the fixes tag references a recent commit that introduced the warning rather than the old commit that converted F00F bug detection to use clear_cpu_bug(). Fixes: ee8962082a44 ("x86/alternatives: Catch late X86_FEATURE modifiers") Signed-off-by: Richard Weinberger [sohil: reworded commit message] Signed-off-by: Sohil Mehta Reviewed-by: Ahmed S. Darwish --- v2: - Reworded commit message to clarify the issue. --- arch/x86/kernel/cpu/intel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index f28c0efb7c8f..e957c5a1501c 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -395,7 +395,6 @@ static void intel_workarounds(struct cpuinfo_x86 *c) * system. Announce that the fault handler will be checking for it. * The Quark is also family 5, but does not have the same bug. */ - clear_cpu_bug(c, X86_BUG_F00F); if (c->x86_vfm >=3D INTEL_FAM5_START && c->x86_vfm < INTEL_QUARK_X1000) { static int f00f_workaround_enabled; =20 --=20 2.43.0 From nobody Fri Jun 12 12:44:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4146D2222C5 for ; Fri, 15 May 2026 00:27:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804831; cv=none; b=cFPxzyd+lIlYUa5IX7I8zGWL6kEyF6scSvx4j1vFqRGg0x86ebPW83/tOA2Ef0IAi12qRdC5ePSq4KDJ36esiAqDP/GpKoBOGXiCpPiKMUUq/SJkwr8tB6LoSclpq9dux4/moVWFaiXeMh3DmF4bymZyKlrDUkqC7XZgnS3xmSI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804831; c=relaxed/simple; bh=daMdODWfPrbmw3etySP1c4z70x4yqCWF3J78M8sY+a0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T2/C41/XZNFlFLNga+k7+N7M1qSEf7l+j5vXzwq0Jm8TKdVB8YLg7G77bp19qN41qk7IfZoCveE3i+dhNc2IH7H6qVjyvkGNABZ/hkuQlGxJTouggPISvoay9sykMpizj7umz0+4lIPBCORoCVxdSFzF3OpPDL9nu+XlBj0PF6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MOp4S1JM; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MOp4S1JM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778804829; x=1810340829; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=daMdODWfPrbmw3etySP1c4z70x4yqCWF3J78M8sY+a0=; b=MOp4S1JMFIqjh0eMKNB/iLOhT3911JLyZqyw94C3EcalZ+aGr3dQ0+3D XYnvFtP3/iBM3GQhxDldlII4s90ChMUn4+eQ9aox72zP0W0g13DJozVwy SmoARoiVMCciDRfNYga5rNcqFU+Y/i/oijmjOFsriAA+rqPNsyCX3X05b KMwRWadp8Aj6zr1q3AUKDtSKxi/NzKGafYAZcRm7pVjKP/PGxVOpzsYjg cExZHmhN5y0qwn8h97Q7lWbl5z2RsHzo3wYpRSA3eIcyGkyfrrfrPZSZB Vh0IXMeEsX8bESZSPauy68gUNoALG2vWlbxILLYuIgtD9HFhymItITrAs A==; X-CSE-ConnectionGUID: DUmR6u6mQyOZxYLotMrdrg== X-CSE-MsgGUID: OF6ejhOdRQW0/lODywD9Dw== X-IronPort-AV: E=McAfee;i="6800,10657,11786"; a="83613082" X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="83613082" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2026 17:27:03 -0700 X-CSE-ConnectionGUID: Ssfbp7E9R/+7ASebj2qliQ== X-CSE-MsgGUID: V+yMyemLRtSk7SlyAUvepg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="238418086" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa008.jf.intel.com with ESMTP; 14 May 2026 17:27:01 -0700 From: Sohil Mehta To: Dave Hansen , Borislav Petkov , x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Josh Poimboeuf , Richard Weinberger , Andrew Cooper , Tony Luck , Sohil Mehta , "Ahmed S . Darwish" , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] x86/cpu/intel: Simplify F00F bug notice using pr_notice_once() Date: Thu, 14 May 2026 17:24:59 -0700 Message-ID: <20260515002500.2463393-3-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260515002500.2463393-1-sohil.mehta@intel.com> References: <20260515002500.2463393-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The F00F bug workaround goes through a lot of effort to print the kernel notice exactly once. Replace it with pr_notice_once(), which precisely does that. Signed-off-by: Sohil Mehta --- v2: - New patch --- arch/x86/kernel/cpu/intel.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index e957c5a1501c..84a652a7dd41 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -396,13 +396,8 @@ static void intel_workarounds(struct cpuinfo_x86 *c) * The Quark is also family 5, but does not have the same bug. */ if (c->x86_vfm >=3D INTEL_FAM5_START && c->x86_vfm < INTEL_QUARK_X1000) { - static int f00f_workaround_enabled; - set_cpu_bug(c, X86_BUG_F00F); - if (!f00f_workaround_enabled) { - pr_notice("Intel Pentium with F0 0F bug - workaround enabled.\n"); - f00f_workaround_enabled =3D 1; - } + pr_notice_once("Intel Pentium with F0 0F bug - workaround enabled.\n"); } #endif =20 --=20 2.43.0 From nobody Fri Jun 12 12:44:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6798E21CA03 for ; Fri, 15 May 2026 00:27:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804834; cv=none; b=Y6vU1cTs9CDqlYA/BtaljsdZ8z5xTv+Bn/yX7KvNSw/cKqpIWRlUB3fUsN26+GHafsHFiOs5FaSdC4IZ9JRurKglO1dBplr45YTUdmwwi7MQxXssKEJNYjq4JdCYYzYgXtZYesGZFHY8IjubdMOGfqoaCrolRwoLinTW8e00ch8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778804834; c=relaxed/simple; bh=YozxeemWOv9D3BVE1MgfOU6LA4NMcI6BF8t2x1qU5gE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hP1UlMSj/bDVKM5SBEllV77oJmM4QZf9xZdLA1BHl648X6e6Qh8tnBVxlJSVECn3JidSOAgKTKCzOmif7H5EYU/e5/caUFn+IzG1zHtTOdHtugW7/r7uCJTJEIWYETfHW/yNMoZXuG1t73kntS0zeuoHEhCQWkuRbby7OIiXwgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=J5U7oji8; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="J5U7oji8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778804831; x=1810340831; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YozxeemWOv9D3BVE1MgfOU6LA4NMcI6BF8t2x1qU5gE=; b=J5U7oji8HmXpNYSstScVRP5unX2fTYqEzTRulnvuCb6wj8gGPM0OTatz uVWgKBKDYBnSf/H6hJfe/d/GJXp38g4dfmP+Q7l7I3gHX/Tdrl2eDIY7N iEQkl/OWxCXCB4h0WzFjxz+YqsaBMwdY/6LmOklSkXLlgpRQrUpky4NwB iiXLT5U/ItWR420+wPpirV0/tRF/deFBeSYx+bRML1n3N4VQFBGzOcJld gE4HsZm1eHSiL/WzpexY7a/XwX8e8xTlE2ewSw7HMLQt5ZijEF/xSfMyA aXwB1U3z2vtf0HfHrTymoCdFOGpEkeKeJ7eQBNlNhP1UZpzb/7vRXugvH w==; X-CSE-ConnectionGUID: JOEZKVqmTESoM+cCufgFMQ== X-CSE-MsgGUID: 2I9eXJbJRMq4rBvA0oI96A== X-IronPort-AV: E=McAfee;i="6800,10657,11786"; a="83613087" X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="83613087" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2026 17:27:03 -0700 X-CSE-ConnectionGUID: AAHGdILjQyGoCcwNuUc3Gw== X-CSE-MsgGUID: N1WMuSHHTnil/E8Y1ZmlAw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,235,1770624000"; d="scan'208";a="238418090" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa008.jf.intel.com with ESMTP; 14 May 2026 17:27:02 -0700 From: Sohil Mehta To: Dave Hansen , Borislav Petkov , x86@kernel.org Cc: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Josh Poimboeuf , Richard Weinberger , Andrew Cooper , Tony Luck , Sohil Mehta , "Ahmed S . Darwish" , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] x86/cpufeature: Remove clear_cpu_bug() Date: Thu, 14 May 2026 17:25:00 -0700 Message-ID: <20260515002500.2463393-4-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260515002500.2463393-1-sohil.mehta@intel.com> References: <20260515002500.2463393-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Richard Weinberger X86_BUG_F00F was the last remaining user of clear_cpu_bug(). With no users left, remove this helper. Signed-off-by: Richard Weinberger Signed-off-by: Sohil Mehta Reviewed-by: Ahmed S. Darwish --- v2: - Improve commit message --- arch/x86/include/asm/cpufeature.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index 3ddc1d33399b..90680f978d43 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -125,7 +125,6 @@ static __always_inline bool _static_cpu_has(u16 bit) =20 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) -#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) =20 #define static_cpu_has_bug(bit) static_cpu_has((bit)) #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) --=20 2.43.0