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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f19c7ed3fsm3355974b3a.45.2026.05.14.11.19.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 11:19:06 -0700 (PDT) From: Yadu M G To: shawn.lin@rock-chips.com Cc: jingoohan1@gmail.com, mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, robh@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] PCI: dwc: Initialize pp->lock before MSI domain registration Date: Thu, 14 May 2026 23:49:01 +0530 Message-ID: <20260514181901.315647-1-yadu.mg@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE0MDE4MyBTYWx0ZWRfX2XLTw81Hiocq ux0ulmjdV2lYUF1n1CxBhuP3cpkumnwU+ZHXpaoCdjntjyJccxeuAumbSThSs0tZP0ezsC493Oi adKD1UgS44MID09VZtU4bwIOCQkCw2Eo4vVYi/Pitm6nWKj6kc9zPt7rUHFMp96hWwRjO3+KrTw tHRZF9+YT4yVnFEaywKt/0dmEVxUDXKkdZAk10eG0fBVx8omq4PQqOy9p4G1A9kLAxpxhmVbe+O sYqQgf5ZekuGzY+UU65dSLUrJAQUNqSJHdhFElNNTGvJck4prVuki+1jqxc02xofds6bum6xwI6 FIE20Ox/dr5iHCJNo08rPFhdeRCcP9q4nZvJ5bWcy+EKt4edqnYOGVyBmsDCXHU2Yhxbzo1T+xn lBIHiFYDeHzvHPBO7+Jcw2ixfpZq4+77I0UXgnFaVR3pE4mZZ3Skcf1szPHrp4XEmNCqlEXENrF fuLsCfWwKAawLs982qg== X-Proofpoint-ORIG-GUID: sD8axVbED2CNN6nrIFstzW0SpM1Ot_6k X-Authority-Analysis: v=2.4 cv=N6AZ0W9B c=1 sm=1 tr=0 ts=6a06121c cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=zSJiG3aQ0SmOekOxMd4A:9 a=IoOABgeZipijB_acs4fv:22 X-Proofpoint-GUID: sD8axVbED2CNN6nrIFstzW0SpM1Ot_6k X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-14_04,2026-05-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605050000 definitions=main-2605140183 Content-Type: text/plain; charset="utf-8" A lockdep warning is observed during boot on a Qcom firmware managed platform: INFO: trying to register non-static key. The code is fine but needs lockdep annotation, or maybe you didn't initialize this object before use? turning off the locking correctness validator. ... Call trace: register_lock_class+0x128/0x4d8 __lock_acquire+0x110/0x1db0 lock_acquire+0x278/0x3d8 _raw_spin_lock_irq+0x6c/0xc0 dw_pcie_irq_domain_alloc+0x48/0x190 irq_domain_alloc_irqs_parent+0x2c/0x48 msi_domain_alloc+0x90/0x160 ... dw_pcie_irq_domain_alloc() takes pp->lock while allocating MSI interrupts. pp->lock is initialized in dw_pcie_host_init(). However, on Qcom firmware managed platforms the MSI domain is allocated from a custom .msi_init callback by calling dw_pcie_allocate_domains() directly, bypassing dw_pcie_host_init(). This leaves pp->lock without a lockdep key and triggers the warning when MSI vectors are later allocated. Initialize pp->lock in dw_pcie_allocate_domains() before registering the MSI IRQ domain so direct callers from custom .msi_init() paths always have a properly initialized lock. Keep the existing initialization in dw_pcie_host_init(), since pp->lock is also used by legacy INTx handling and may be taken from glue .init() callbacks even when MSI is disabled. Signed-off-by: Yadu M G --- drivers/pci/controller/dwc/pcie-designware-host.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index c9517a348836..de316f103c73 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -215,6 +215,13 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) .host_data =3D pp, }; =20 + /* + * Initialize pp->lock here to cover direct callers from custom + * .msi_init() paths (e.g. firmware-managed platforms) that + * bypass dw_pcie_host_init(). + */ + raw_spin_lock_init(&pp->lock); + pp->irq_domain =3D msi_create_parent_irq_domain(&info, &dw_pcie_msi_paren= t_ops); if (!pp->irq_domain) { dev_err(pci->dev, "Failed to create IRQ domain\n"); --=20 2.43.0