From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D95F402BA0; Thu, 14 May 2026 15:09:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771398; cv=none; b=LB5UfJGNJ/iO34L6dj060BUGXKXBgj52W8XoJyWdZIY3kqjbCc7UVNgeiBDTYj5fQcWjGqeLK9pMBrN2AssSwWKi1w5lab97xbjFQMh93e/odfEGXwt4OpDShnDc5Ukw0SOXaU5HXLoRve9COFvB7mcYNPqVu9nH0gvV0cqcKPk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771398; c=relaxed/simple; bh=t5gE4bxe3l8Rm89s70bV5esQES6c2DxTzt/nvkCifQM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k326F2Rnsv3hMtwoA+iUjcxid0kIIH422aenpjG3ldJFT2uOqz/lM9Z1l4Kpj0Kx5SSi+40KSrz4ON8bJp8YF6Ee4tQFeJ80kjwPklfrjaMNOgcWxAlV34UtZcBqRzgtkXhtKDTMH8xSwhhlgYTHGfb74FMevXRfZgT+XmfIer8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LydMEQYy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LydMEQYy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A5142C2BCB8; Thu, 14 May 2026 15:09:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771397; bh=t5gE4bxe3l8Rm89s70bV5esQES6c2DxTzt/nvkCifQM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LydMEQYykl+lrouBNxHsfLVGYzROXndlLpIbgH6j0m2tH/PvpdX+T4PKnkEePAGXJ c+SWlcf0tRdp9R4ycU6c1fGIsHuiu7L7vSo7UNjlp26c1Eqn3QWjBn08/z15+pWrJ4 r448PK7bN9ERWC0wmgvourvyLhsRgsx3zD0IE4JMq9Cn5EKUBZAILS1Q3XJ4fS4GpS oPHJMDP6uFtU327aMaa4Q65Vcy6orGWiUDS68E06VbEVcnWqge4Wpd/VAplO8sozhp uTWmohZ/cNTPb3/0tnhxIs5R6EnvZM444E2D4zoVmOs7ECPV9AkfLmAJI/Q7j8EaGu n850763jlqEBQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhD-00000002Oqg-0nJO; Thu, 14 May 2026 15:09:55 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 01/17] ACPI: GTDT: Account for GTDTv3 size when walking the platform timer descriptors Date: Thu, 14 May 2026 16:09:29 +0100 Message-ID: <20260514150945.3917510-2-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Since ARMv8.1, the architecture has grown an EL2-private virtual timer. This has been described in ACPI since ACPI v6.3 and revision 3 of the GTDT table. An aditional structure was added in ACPICA, though in a rather bizarre way, and merged in v5.1 as 8f5a14d053100 ("ACPICA: ACPI 6.3: add GTDT Revision 3 support"). Finally plug the table parsing in GTDT, and correct the parsing of the platform timer subtables to account for the expanded size of the base table. Suggested-by: Sudeep Holla Signed-off-by: Marc Zyngier Reviewed-by: Sudeep Holla --- drivers/acpi/arm64/gtdt.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index ffc867bac2d60..b9d9b8edf2df7 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -32,6 +32,12 @@ struct acpi_gtdt_descriptor { struct acpi_table_gtdt *gtdt; void *gtdt_end; void *platform_timer; + bool v3; +}; + +struct gtdt_v3 { + struct acpi_table_gtdt gtdt_v2; + struct acpi_gtdt_el2 el2_vtimer; }; =20 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; @@ -39,8 +45,14 @@ static struct acpi_gtdt_descriptor acpi_gtdt_desc __init= data; static __init bool platform_timer_valid(void *platform_timer) { struct acpi_gtdt_header *gh =3D platform_timer; + void *platform_timer_begin; + + if (acpi_gtdt_desc.v3) + platform_timer_begin =3D container_of(acpi_gtdt_desc.gtdt, struct gtdt_v= 3, gtdt_v2) + 1; + else + platform_timer_begin =3D acpi_gtdt_desc.gtdt + 1; =20 - return (platform_timer >=3D (void *)(acpi_gtdt_desc.gtdt + 1) && + return (platform_timer >=3D platform_timer_begin && platform_timer < acpi_gtdt_desc.gtdt_end && gh->length !=3D 0 && platform_timer + gh->length <=3D acpi_gtdt_desc.gtdt_end); @@ -169,6 +181,7 @@ int __init acpi_gtdt_init(struct acpi_table_header *tab= le, acpi_gtdt_desc.gtdt =3D gtdt; acpi_gtdt_desc.gtdt_end =3D (void *)table + table->length; acpi_gtdt_desc.platform_timer =3D NULL; + acpi_gtdt_desc.v3 =3D gtdt->header.revision >=3D 3 && gtdt->header.length= >=3D sizeof(struct gtdt_v3); if (platform_timer_count) *platform_timer_count =3D 0; =20 --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCA54426EA7; Thu, 14 May 2026 15:09:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771399; cv=none; b=mtA4QErR1ig68SK6yyU2+/ttzf/jERtjTcdxjso1imGCTQg9xvk/VhfyONrkoRkKHYPuw8OFIYxdVuAC8p3Z4FRtfIdpkk0FVIBQ8rJ1vpJY0sAjh+Ev5LZ+jfcGdc+OgGYQxStkFpY3s3MFKfCzcmZKoUNWu1+UzE3zTosOmlE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771399; c=relaxed/simple; bh=+Y/GGoTKNCM3giuKbq04aPtsbFnmhL9znjR/JyKh7Js=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DqeWh4GHe+zijGcwBIC3eVd6VkZVlM5jxBknM9Z2b293YJgEgdJa8KJe3nBskVXyyjJu070138+41DRi2eS2Nd28rmrstXnOy7SDK9fFlaUMTjS7StRC4rD9I1k8Sl27Zs1TlQPjZuEwlsD7DhCcZPeIS28X/AqPrEOYFz4j4To= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LDMDAMzG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LDMDAMzG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CEF8CC2BD05; Thu, 14 May 2026 15:09:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771397; bh=+Y/GGoTKNCM3giuKbq04aPtsbFnmhL9znjR/JyKh7Js=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LDMDAMzGaA9jC172A8eLW/Cb0mO2TltTn8gVbgo/Zu4q/jYWo3Znc+RhmuMsC2Rdk DrE+eWcdwRjhRlKy+13DyVwe+uR8xaRCv5XUpspSMep1T5jwIatMHujwLSLo7576cC L3Um7uOf+i/wLipca02Vku6OO8ANsm+A3eJxH3UaQnYAQPchqQcgD31ZiOAhpkkEHz EPHtwH0GL63NCZpCykOs/slBb6U1UmYrMDI+19mYOAvy1dxm3QwXEcpHMRYq1EIX/y ssmif1ajBeDmtTW9NAqTcP3eT7QDd2biSGD0+EQKLI8uXI2FEodphCyZ2k6k3hR6JG wAdkXRHD52M8g== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhD-00000002Oqg-3KQ6; Thu, 14 May 2026 15:09:55 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 02/17] ACPI: GTDT: Parse information related to the EL2 virtual timer Date: Thu, 14 May 2026 16:09:30 +0100 Message-ID: <20260514150945.3917510-3-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Now that we have a way to identify GTDTv3, allow the information related to the EL2 virtual timer to be retrieved by the interface used by the architected timer driver. Reviewed-by: Sudeep Holla Signed-off-by: Marc Zyngier --- drivers/acpi/arm64/gtdt.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index b9d9b8edf2df7..d9b43592c22cd 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -42,6 +42,14 @@ struct gtdt_v3 { =20 static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; =20 +static __init struct acpi_gtdt_el2 *gtdt_to_el2_vtimer(struct acpi_table_g= tdt *gtdt) +{ + if (!acpi_gtdt_desc.v3) + return NULL; + + return &container_of(gtdt, struct gtdt_v3, gtdt_v2)->el2_vtimer; +} + static __init bool platform_timer_valid(void *platform_timer) { struct acpi_gtdt_header *gh =3D platform_timer; @@ -113,6 +121,7 @@ static int __init map_gt_gsi(u32 interrupt, u32 flags) int __init acpi_gtdt_map_ppi(int type) { struct acpi_table_gtdt *gtdt =3D acpi_gtdt_desc.gtdt; + struct acpi_gtdt_el2 *el2_vtimer =3D gtdt_to_el2_vtimer(gtdt); =20 switch (type) { case ARCH_TIMER_PHYS_NONSECURE_PPI: @@ -125,6 +134,12 @@ int __init acpi_gtdt_map_ppi(int type) case ARCH_TIMER_HYP_PPI: return map_gt_gsi(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags); + case ARCH_TIMER_HYP_VIRT_PPI: + if (el2_vtimer && el2_vtimer->virtual_el2_timer_gsiv) + return map_gt_gsi(el2_vtimer->virtual_el2_timer_gsiv, + el2_vtimer->virtual_el2_timer_flags); + + return 0; default: pr_err("Failed to map timer interrupt: invalid type.\n"); } @@ -142,6 +157,7 @@ int __init acpi_gtdt_map_ppi(int type) bool __init acpi_gtdt_c3stop(int type) { struct acpi_table_gtdt *gtdt =3D acpi_gtdt_desc.gtdt; + struct acpi_gtdt_el2 *el2_vtimer =3D gtdt_to_el2_vtimer(gtdt); =20 switch (type) { case ARCH_TIMER_PHYS_NONSECURE_PPI: @@ -153,6 +169,10 @@ bool __init acpi_gtdt_c3stop(int type) case ARCH_TIMER_HYP_PPI: return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON); =20 + case ARCH_TIMER_HYP_VIRT_PPI: + return el2_vtimer && el2_vtimer->virtual_el2_timer_gsiv && + !(el2_vtimer->virtual_el2_timer_flags & ACPI_GTDT_ALWAYS_ON); + default: pr_err("Failed to get c3stop info: invalid type.\n"); } --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C96D3DD847; Thu, 14 May 2026 15:09:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; cv=none; b=JnKzDkVtJkECu2gtxqxqZ3Tax0uFj18hIBFA+dpWE01FYN3VyZ1mh+BN+PueKb3kSFh31X/s1AG7lvxXe7374eqfvjPqShEYpGhy31U0DO8ELj9bbggvNlqFlbySndDiT01wvmMd5L6FFkSK2EHAqzzita9ZTAkK55J/w+O/sgU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; c=relaxed/simple; bh=HTUoneqquTaHhqPUa5kCxkZPw+ky0sQKsSZIjAZkIDA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=W+1Ow5LtQ+BbTVbiwMNb1axc7Gt/fENYsIZpvjk7kRTSGua2omJ5iT4M9BK6X/AeLv60TVrGvMn0mMpSrYInVc5/Wn0iwHNZxyw09zbSW4x/TA6jEwuQwMKsZ9ZsEekWro4DPS7FJq0w1FsuWJxJk+SRk5QTZg80UDAZBOf1KnM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XcyPxnTL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XcyPxnTL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1700C2BCC7; Thu, 14 May 2026 15:09:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771399; bh=HTUoneqquTaHhqPUa5kCxkZPw+ky0sQKsSZIjAZkIDA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XcyPxnTL93T8+lgQhnerH1w/2lJTpn5OcF3Cx/Yk6V1j0ZnfcNq6pI0wiOg4cGv+m GfhMiH04I676xPDlED8vtbKgtkUbBMOtdmI/uMTsrDNPraInGadr/avLjXwP9Tvj9H 9KMQAnmYyUd43vQPsWj2Sc+QTESk2XY/PYB/40ycphIMdiGBh7vfZ99Ri7xO14BJEX keuig3LTGmkCMwNG4qro9ckabAGjnkwYNsDJ3iGu+5CfRg4b1gOf2ynD5m0wm2BIic Ab57ZqMbL9F7zU29PERTtUNaprZWycEs8Faku+PZBM8moHyP1GlIW85qCUCbbN9wOf ILP9I6C1XhgaQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhE-00000002Oqg-1SdD; Thu, 14 May 2026 15:09:56 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 03/17] clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE Date: Thu, 14 May 2026 16:09:31 +0100 Message-ID: <20260514150945.3917510-4-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" When running with at EL2 with VHE enabled, the architecture provides two EL2 timer/counters, dubbed physical and virtual. Apart from their names, they are strictly identical. However, they don't get virtualised the same way, specially when it comes to adding arbitrary offsets to the timers. When running as a guest, the host CNTVOFF_EL2 does apply to the guest's view of CNTHV*_El2. This is not true for CNTPOFF_EL2 and CNTHP*_EL2, as the architecture is broken past the first level of virtualisation (it lacks some essential mechanisms to be usable, despite what the ARM ARM pretends). This means that when running as a L2 guest hypervisor, using the physical timer results in traps to L0, which are then forwarded to L1 in order to emulate the offset, leading to even worse performance due to massive trap amplification (the combination of register and ERET trapping is absolutely lethal). Switch the arch timer code to using the virtual timer when running in VHE by default, only using the physical timer if the interrupt is not correctly described in the firmware tables (which seems to be an unfortunately common case). This comes as no impact on bare-metal, and slightly improves the situation in the virtualised case. Signed-off-by: Marc Zyngier --- drivers/clocksource/arm_arch_timer.c | 47 ++++++++++++++++------------ 1 file changed, 27 insertions(+), 20 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm= _arch_timer.c index 90aeff44a2764..e3eb527650ec7 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -688,6 +688,7 @@ static void __arch_timer_setup(struct clock_event_devic= e *clk) clk->irq =3D arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { case ARCH_TIMER_VIRT_PPI: + case ARCH_TIMER_HYP_VIRT_PPI: clk->set_state_shutdown =3D arch_timer_shutdown_virt; clk->set_state_oneshot_stopped =3D arch_timer_shutdown_virt; sne =3D erratum_handler(set_next_event_virt); @@ -879,7 +880,7 @@ static void __init arch_timer_banner(void) pr_info("cp15 timer running at %lu.%02luMHz (%s).\n", (unsigned long)arch_timer_rate / 1000000, (unsigned long)(arch_timer_rate / 10000) % 100, - (arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI) ? "virt" : "phys"); + arch_timer_ppi_names[arch_timer_uses_ppi]); } =20 u32 arch_timer_get_rate(void) @@ -912,7 +913,8 @@ static void __init arch_counter_register(void) int width; =20 if ((IS_ENABLED(CONFIG_ARM64) && !is_hyp_mode_available()) || - arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI) { + arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI || + arch_timer_uses_ppi =3D=3D ARCH_TIMER_HYP_VIRT_PPI) { if (arch_timer_counter_has_wa()) { rd =3D arch_counter_get_cntvct_stable; scr =3D raw_counter_get_cntvct_stable; @@ -1023,6 +1025,7 @@ static int __init arch_timer_register(void) ppi =3D arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { case ARCH_TIMER_VIRT_PPI: + case ARCH_TIMER_HYP_VIRT_PPI: err =3D request_percpu_irq(ppi, arch_timer_handler_virt, "arch_timer", arch_timer_evt); break; @@ -1090,25 +1093,34 @@ static int __init arch_timer_common_init(void) /** * arch_timer_select_ppi() - Select suitable PPI for the current system. * - * If HYP mode is available, we know that the physical timer - * has been configured to be accessible from PL1. Use it, so - * that a guest can use the virtual timer instead. + * On AArch32, if HYP mode is available, we know that the physical + * timer has been configured to be accessible from PL1. Use it, so + * that a guest can use the virtual timer instead (though KVM host + * support has long been removed). * - * On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE - * accesses to CNTP_*_EL1 registers are silently redirected to - * their CNTHP_*_EL2 counterparts, and use a different PPI - * number. + * On ARMv8.1 with FEAT_VHE, the kernel runs in EL2. Accesses to + * CNTV_*_EL1 registers are silently redirected to their CNTHV_*_EL2 + * counterparts, and the timer uses a different PPI number. Similar + * thing happen when using the EL2 physical timer. Note that a bunch + * of DTs out there omit the virtual EL2 timer, so fallback gracefully + * on the physical timer. + * + * Without VHE, if no interrupt provided for virtual timer, we'll have + * to stick to the physical timer. It'd better be accessible... * - * If no interrupt provided for virtual timer, we'll have to - * stick to the physical timer. It'd better be accessible... * For arm64 we never use the secure interrupt. * * Return: a suitable PPI type for the current system. */ static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void) { - if (is_kernel_in_hyp_mode()) + if (is_kernel_in_hyp_mode()) { + if (arch_timer_ppi[ARCH_TIMER_HYP_VIRT_PPI]) + return ARCH_TIMER_HYP_VIRT_PPI; + + pr_warn_once(FW_BUG "VHE-capable CPU without EL2 virtual timer interrupt= \n"); return ARCH_TIMER_HYP_PPI; + } =20 if (!is_hyp_mode_available() && arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) return ARCH_TIMER_VIRT_PPI; @@ -1200,14 +1212,9 @@ static int __init arch_timer_acpi_init(struct acpi_t= able_header *table) if (ret) return ret; =20 - arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI); - - arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI); - - arch_timer_ppi[ARCH_TIMER_HYP_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI); + /* The GTDT parser can't be bothered with the secure timer */ + for (int i =3D ARCH_TIMER_PHYS_NONSECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PP= I; i++) + arch_timer_ppi[i] =3D acpi_gtdt_map_ppi(i); =20 arch_timer_populate_kvm_info(); =20 --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C8572737FC; Thu, 14 May 2026 15:09:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; cv=none; b=NhAXY+NWsDRl2E1AQRF51u5+nQBBNVJwgFsEqeqtYs/ptGpy5N/rUtmOwPTaUWOuy5DLZlwHsmzsfYQRiDAwhzuWF3ToyphYGnY8G5JanqK02q+5YPJYnF5JeWHantPM8kG7VNRkOApB/l8qKZwb9ZGduNiKvrlQU85eP14At3E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; c=relaxed/simple; bh=d59g25bV3UFh+I0ByUj8LqrxAPLpikSFsp0XFERtE2U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VwKHCVbpi2hCSixi77bwA7ntb5NMJ8h/fTcwgCviVFjQ+yveFwPjdYjFaJ4Zt2xEr977jGcfi7/aX5/XX/mVcdPPKRaUTpntHtjvEn8QLkWA0dM1eJb3TUSYpSJJnSsYbf02jZ3ExVUKDALttnb5/9x0uF4C+aDgPUUBGxJWJQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HZfWwpAv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HZfWwpAv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39D0DC2BCB3; Thu, 14 May 2026 15:09:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771399; bh=d59g25bV3UFh+I0ByUj8LqrxAPLpikSFsp0XFERtE2U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HZfWwpAvlCpy8TtLoTUUk5j0mLxbrJOfeQsQK2TKkyrZqPax+uY7KiyNPaRxJYyZx TBoxICftxEorOA2+m7blY40Xy7M/s4lh/qF2ED3iPWV8Ay40bl+edSwH6XUe8TExok K7BugzPHe9NdYIAirgReckitBbhtSBF5ta83Lw+UX6tnUOBfGrj41JayDEezKqmlD3 SNgxO7jsLysGYne18wiG4/Bkx9Ua/BhU6rpDGGBsY2ZIWtXzuxiC0LIz4GR9nbx2vH GaynATfhY6vdklPhFURUdo6+ZU2mOaKgDCdURXEOUiSfvlOdbYwmyXHJc+H5mWUZ0l A9tVSythGUeew== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhE-00000002Oqg-3lxV; Thu, 14 May 2026 15:09:56 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 04/17] dt-bindings: timer: arm,arch_timer: Fix requirements for interrupt description Date: Thu, 14 May 2026 16:09:32 +0100 Message-ID: <20260514150945.3917510-5-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The arm,arch_timer DT binding is extremely imprecise in describing the requirements for interrupts. Follow the architecture by making it explicit that: - the EL1 secure timer irq is required if EL3 is implemented - the EL1 physical timer irq is always required - the EL1 virtual timer irq is always required - the EL2 physical timer irq is required if EL2 is implemented - the EL2 virtual timer irq is required if FEAT_VHE is implemented The consequence of the above is that the minimum number of interrupts to be described is 2, and not 1. Finally, clean up the description which made the assumption that the timers are plugged into a GIC (unfortunately, that's not always true), drop the MMIO nonsense that has long be moved to a separate binding, and use the architectural terminology to describe the various interrupts. Acked-by: Rob Herring (Arm) Signed-off-by: Marc Zyngier --- .../bindings/timer/arm,arch_timer.yaml | 21 +++++++------------ 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/= Documentation/devicetree/bindings/timer/arm,arch_timer.yaml index c5fc3b6c8bd0b..c65e48a155ab6 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml @@ -10,13 +10,8 @@ maintainers: - Marc Zyngier - Mark Rutland description: |+ - ARM cores may have a per-core architected timer, which provides per-cpu = timers, - or a memory mapped architected timer, which provides up to 8 frames with= a - physical and optional virtual timer per frame. - - The per-core architected timer is attached to a GIC to deliver its - per-processor interrupts via PPIs. The memory mapped timer is attached t= o a GIC - to deliver its interrupts via SPIs. + The per-core architected timer is expected to deliver per-CPU interrupts + (commonly to a GIC to deliver its per-processor interrupts as PPIs). =20 properties: compatible: @@ -33,13 +28,13 @@ properties: - const: arm,armv7-timer =20 interrupts: - minItems: 1 + minItems: 2 items: - - description: secure timer irq - - description: non-secure timer irq - - description: virtual timer irq - - description: hypervisor timer irq - - description: hypervisor virtual timer irq + - description: EL1 secure physical timer irq, if EL3 is implemented + - description: EL1 non-secure physical timer irq + - description: EL1 virtual timer irq + - description: EL2 physical timer irq, if EL2 is implemented + - description: EL2 virtual timer irq, if FEAT_VHE is implemented =20 interrupt-names: oneOf: --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E471427A10; Thu, 14 May 2026 15:10:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; cv=none; b=BxnEC0gwZnpucOUlY1mHtZfx47YWALaPAhGxVHp2AoVYmjsxCXHLSBSfVA9Oo8XfW7RLE2r3H34+RAIXn9ksjWLh1TMwJhPcqLnD1m7WMeuqEcr3f3/8JYvCLSnaWXB2R8Br1ZkJhoxMr1RI87hZGbs0kJvmBnsi6LEi4ohKjWY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771400; c=relaxed/simple; bh=AUUR2mNpd4MZjYN5NiaEO2JmuYp8gYDD2xKReT+S1UA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aGX80p5b96N3ue3tS/yxNjRK7A74D+1YUFElPtQXCjIDMumVwuOHAt2TBiWzdZOTS01B1vukygMp18lb5OPdUm7hxmAqB+mTNXxBznHMz3GgAL4qBftb+eX7C02PVNQlwcMPKLc5quRSazDZ0s7a32m8MpXudNBF7R3lDlF0pUc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SG+xOPmw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SG+xOPmw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6AF23C2BCFB; Thu, 14 May 2026 15:09:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771399; bh=AUUR2mNpd4MZjYN5NiaEO2JmuYp8gYDD2xKReT+S1UA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SG+xOPmwQfEwmi60wxXn13aXig2rzNj7gGwX7r8a8w3dhb5abuddwrXYi9ytKPeK9 miGFEa/RAVBrncFx0lL1vI8DH48o+NR4SEW+LhzhRt9Awgl/+GMlgbC8T1jFjcaOhx 1f+cCh7/do+PmrRzFJFg2a+to7fEGNxdnKIobtmUbVNQSAQKcubDfrx4tIC/9SrjSF mrb1HW08D/S1FCkF8ov/+FZ25tfN9gbzv14WsRGCzLWtdQBDOsuJXdY3nzCxgUdHlP M4gVKmxHVY9cE4OXNL07q7JZ9YDJ4NyS1tgQ704CZtYEHLiqkg2Ako7Luq4p20L7Y2 03tPGpFoD2uCA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhF-00000002Oqg-23HS; Thu, 14 May 2026 15:09:57 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 05/17] arm64: dts: allwinner: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:33 +0100 Message-ID: <20260514150945.3917510-6-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the A523 SoC (and derivatives) are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier Reviewed-by: Andre Przywara Tested-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi index 5afa8d92acbfb..d3c47966e8fc8 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -101,7 +101,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 787F6428496; Thu, 14 May 2026 15:10:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; cv=none; b=Wfr5uG6cgtSKliAJ/d5Gt4CbdGTVaVrysu1o9IPtEWgI6zZgHjnbN5RzDnpOYRNVzGVslRm0rLxarXhHfvUQG9JktwqYRyJcegj+vUOuo9zU8kEz7l47DCUZ8hq588CKUOJVMAQ9Ieh+s2ZpAcF0uB+JsFwZK+06GS+a8dBfzII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; c=relaxed/simple; bh=//ab//nBSGWkAN6jHlWAMfQLVdAXXBGKAkY5w2l+eco=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uFaLFuinrYaZLGKZjntJ0FlQpLa6ab02NFash8VyYmtYK6otP//YSLJ5k8pKbR/KBOCmplD8mRyR8bbryB1OwrpNR61L5Msq7ZbhHXHyO+x4vroPp7H0hnzSBS5DeToQbqDkXpvCW8k9eOXZfZQ56L9A8D0mObkbZdGb45ILiSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qzNEOn0s; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qzNEOn0s" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62A31C2BCC7; Thu, 14 May 2026 15:10:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771400; bh=//ab//nBSGWkAN6jHlWAMfQLVdAXXBGKAkY5w2l+eco=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qzNEOn0sEunXkW1gzwrVOqwD2dgmlci6nF6Aeb7wJ2hFTjN00HRuefXwZl84PvIC5 hFRAiSAcZaGGrY7mrtUoNZ6UUrGXhC+GIOKYRXNWydiyY9/KoUcK/+yKavgTbJjMQx RHOa6JnUIIeZZOAd7yb5fg1UylMKFjVNj+/tjsGFGzPfXkvr36ZW59tJVSUxEtQ1dC 41WwAeEJD7VPWSdhxi9UUiRVmEGOYVDukmZO0cTD9wjpKXbAdWQAsm4Og3MZ0L4W4/ jIOHNl1E2pCLV1OrtoixEAo+prDCAFmPrXuLwlncZ2DLLveNmcak+xBf9po03mq7HV XntqLrcVrfgXA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhG-00000002Oqg-0KIc; Thu, 14 May 2026 15:09:58 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 06/17] arm64: dts: amlogic: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:34 +0100 Message-ID: <20260514150945.3917510-7-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Amlogic SoCs are missing the EL2 virtual timer interrupt. Add it. This requires some surgery in the "common" files to move the timer node to locations that makes it possible to add the interrupt only where it is actually implemented. Reviewed-by: Neil Armstrong Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi | 8 -------- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 8 ++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 9 +++++++++ arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 13 ------------- arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 10 ++++++++++ 9 files changed, 42 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm6= 4/boot/dts/amlogic/amlogic-a4-common.dtsi index 54d7a2d56ef64..6f559e4dd9ee9 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi @@ -7,14 +7,6 @@ #include #include / { - timer { - compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; - }; - psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a4.dtsi index fce45933fa28b..c28fc7fcbae7f 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -86,6 +86,14 @@ pwrc: power-controller { #power-domain-cells =3D <1>; }; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a5.dtsi index 2b12d8284594f..c22c0acb4807e 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -49,6 +49,15 @@ pwrc: power-controller { #power-domain-cells =3D <1>; }; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + , + ; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index ab3acef2b147e..853d32929ff46 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -56,7 +56,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s7.dtsi index a3faf4d188e11..bfaac5f3e22da 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -94,7 +94,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot= /dts/amlogic/amlogic-s7d.dtsi index 0c4417bcd6827..32d8683059964 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -58,7 +58,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64= /boot/dts/amlogic/meson-g12-common.dtsi index 00609d2da6743..a911a5181a88d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -2579,19 +2579,6 @@ map { }; }; =20 - timer { - compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; - arm,no-tick-in-suspend; - }; - xtal: xtal-clk { compatible =3D "fixed-clock"; clock-frequency =3D <24000000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-g12.dtsi index 664912d1beaab..866fc07d1b0ae 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi @@ -43,6 +43,15 @@ tdmif_c: audio-controller-2 { clock-names =3D "sclk", "lrclk", "mclk"; status =3D "disabled"; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + arm,no-tick-in-suspend; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-sm1.dtsi index 8f5b850b1774f..77c72936ffdd3 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -128,6 +128,16 @@ l2: l2-cache0 { }; }; =20 + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + , + ; + arm,no-tick-in-suspend; + }; + cpu_opp_table: opp-table { compatible =3D "operating-points-v2"; opp-shared; --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0353F428477; Thu, 14 May 2026 15:10:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; cv=none; b=aftpL9m41iM9a02PWF8O9+xo+4WrSf6L48m9BvGQdmVrkeEyMk0ewY7GKF4ZIkeJnLr2xOKLbVseItY3JoclUb8p0LhWOb2Phn6BiZlNf5FThEkEf3GaFFI1owtBHDOCvDupp5tJu4gTYxXuGBuernLImJpdHS4eRVV92u31NA4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; c=relaxed/simple; bh=VLsh85YozgAjTbaFo7luW5wp3AU+M3q21SDYWi9Ryio=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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Thu, 14 May 2026 15:09:58 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 07/17] arm64: dts: bst: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:35 +0100 Message-ID: <20260514150945.3917510-8-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the bst c1200 SoC are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/bst/bstc1200.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/bst/bstc1200.dtsi b/arch/arm64/boot/dts/bs= t/bstc1200.dtsi index dd13c6bfc3c89..104ecf76ced10 100644 --- a/arch/arm64/boot/dts/bst/bstc1200.dtsi +++ b/arch/arm64/boot/dts/bst/bstc1200.dtsi @@ -92,6 +92,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77472428495; Thu, 14 May 2026 15:10:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; cv=none; b=ug2qbOdsDTxcXOgezgZ5WLjkO9kkgzno7kFsZxY/EEDIZsF54fu9vrDX6+oxuXFZLD9WXkZdaBLbz2dWih8QYeMfT+MS3SN5J+KKLZ5IKg1oZAqlv/3qAslb+NnsVS+9y7NQJ83iaG7ZwO647FpCtOTR/4WZZ9DoWKaJDBvKsTA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771401; c=relaxed/simple; bh=hbcIsDgU/MN/j2ZCbXVvpO0+sIa+ENtAb27eTIE//6Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TX23nvHQCahEIVL/JR/dxCoDYgh48OF8FJi1zDAYDkLpdZ5uEJsz5YyGmT2+jZheseaH1bSMSpzldc8coOF5Gbe7YglPFGw4N5W/+Q9vjn1ZIzt9MfRySVKHNrrI8FdTHDBQGwZNoEoLc1Y4PlVBFn17JitjXdBYPBKSjtQeaV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fURyLn3t; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fURyLn3t" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 231FFC2BCB3; Thu, 14 May 2026 15:10:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771401; bh=hbcIsDgU/MN/j2ZCbXVvpO0+sIa+ENtAb27eTIE//6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fURyLn3tvP3SPdfM82aQwPcK4XOfPIPZIWE1W14L0EDvheK8bczP6dzcjc+9lT5gw 7BLixb1tYORVh+0Csx6Q1WRplJYsICP5Q48vRXH+n28u90/qd9x5B9y8cj95Qvkc5K NpLghQsRirXvqX/FqGI6/HDSsODmVidvfOur1qWuy1ojXp/5mujTsv9+oTOHgQdbPh Tgwu1uK8wnv5d9HR5YE7wX2OHNxEqYhyyhYYwUJ9Rc/Zw/1WibznCIKdIJ3Rv3RKH+ fhGJwDLY6ZOTehOBJQk//cFiuXyHTpu4sEl5ymdPv2xl28y6tU+5EWfRJ70JVHA0D4 nRpm2fEP4KX7A== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhH-00000002Oqg-0xDF; Thu, 14 May 2026 15:09:59 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 08/17] arm64: dts: exynos: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:36 +0100 Message-ID: <20260514150945.3917510-9-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" A bunch of Samsung SoCs are missing the EL2 virtual timer interrupt despite using ARMv8.1+ CPUs. Add the missing interrupt, except for those broken designs where the interrupt is documented as not being wired. Acked-by: Jesper Nilsson Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/exynos/axis/artpec9.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos2200.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos990.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 3 ++- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi b/arch/arm64/boot= /dts/exynos/axis/artpec9.dtsi index f8ed43c6e8258..cd46aaf056287 100644 --- a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi +++ b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi @@ -272,6 +272,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/d= ts/exynos/exynos2200.dtsi index 6487ccb58ae76..59662f9bdb98f 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -1911,7 +1911,8 @@ timer { interrupts =3D , , , - ; + , + ; /* * Non-updatable, broken stock Samsung bootloader does not * configure CNTFRQ_EL0 diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index f8e2a31b4b751..2e6fb24a3c928 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -405,7 +405,8 @@ timer { interrupts =3D , , , - ; + , + ; =20 /* * Non-updatable, broken stock Samsung bootloader does not diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot= /dts/exynos/exynosautov9.dtsi index 66628cb32776e..2c34a2b30ad02 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -148,7 +148,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 fixed-rate-clocks { diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index d085f9fb0f62a..86933f22647b7 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1856,7 +1856,8 @@ timer { , , , - ; + , + ; }; }; =20 --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D45123A5420; Thu, 14 May 2026 15:10:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; cv=none; b=SmCTblyV0nDJmkajR/VrsSWG4v79bXUB+mMfGy3rhN693te6gtVgmQtDizaK4AicVYOH6/RSfkZcPFfX9XBpXcH1bHGA2w30JiUCnmsg/IDmcuFUJ2IeaifwVa274pYaYIPWL010923xmLsR+nke/0iLYBwqQdtcRhEWFM76qf4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; c=relaxed/simple; bh=CJXY43NWPhe/kEFDLFlqtBJ4A3u4UFccm33o2sFJ4aY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iep7OXzqqX+3heQo6/D6yMoKZjFVy4e4XK1+Sx6PMy6ROvF3QfqfqHO61tB5NNrdW/lEI2ilzPfOZYumWffxmuljGMC0dOmMghV0mui8QJsFmZ+YnqfTF3pW536oUEVof3HBW3MwFBzdP1XjFf4GkMjgVUM3mnQnYZwa2z3clBE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gO0a0pIh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gO0a0pIh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7203C2BCB3; Thu, 14 May 2026 15:10:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771401; bh=CJXY43NWPhe/kEFDLFlqtBJ4A3u4UFccm33o2sFJ4aY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gO0a0pIhUpTdgHdyF4vgz6aqQo36picuSTdt6Q2FcDwt/v7L6H1qUbB+ltK0gvtnz bqmgTV8vd9+QM6u4gs88ZtQQ1aqAE4gokOnNL4B/uZhxXBcqMwv9DexusdvcfLWOwS TAg/AZd9p0SDyzGAz+6+AJUyPCMZdBIQydWMiKIs1Ed0Xt4YyvctL+HkZKVfgnosdf rLc7h42v1aH/QfdxZE1PQdaZwmq1vlHtJj5BVq4YbYqlb/oSofhZgg4nbiZjzG+nJI oc9WoQnHs9aLuyym/VYNTiDHvkW1AirfIuKbxeG7XbisFffac8MnLFwfhOTrIc1i0T a4KJx5Or0OHWQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhH-00000002Oqg-3Nc6; Thu, 14 May 2026 15:09:59 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 09/17] arm64: dts: freescale: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:37 +0100 Message-ID: <20260514150945.3917510-10-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of NXP/FSL SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/freescale/imx91_93_common.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx94.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx95.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx952.dtsi | 3 ++- arch/arm64/boot/dts/freescale/s32n79.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm6= 4/boot/dts/freescale/imx91_93_common.dtsi index 46a5d2df074d5..679b9a6f7160f 100644 --- a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi @@ -82,7 +82,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts= /freescale/imx94.dtsi index c460ece6070f8..7431ce293625b 100644 --- a/arch/arm64/boot/dts/freescale/imx94.dtsi +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi @@ -147,7 +147,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; interrupt-parent =3D <&gic>; arm,no-tick-in-suspend; diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 71394871d8dd0..e318048dc755b 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -524,7 +524,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx952.dtsi b/arch/arm64/boot/dt= s/freescale/imx952.dtsi index b30707837f353..7c65956bc72dc 100644 --- a/arch/arm64/boot/dts/freescale/imx952.dtsi +++ b/arch/arm64/boot/dts/freescale/imx952.dtsi @@ -298,7 +298,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/s32n79.dtsi b/arch/arm64/boot/dt= s/freescale/s32n79.dtsi index 94ab58783fdc8..fb40abec4c5cd 100644 --- a/arch/arm64/boot/dts/freescale/s32n79.dtsi +++ b/arch/arm64/boot/dts/freescale/s32n79.dtsi @@ -357,6 +357,7 @@ timer: timer { interrupts =3D , , , - ; + , + ; }; }; --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED367429800; Thu, 14 May 2026 15:10:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; cv=none; b=UxY/yuCb/4kP3nyLe1B8wEmhe4HSxOEX7CmgA6MwZlN8dUNkRwa0o/CB9i6f6cKUjxzTGr9ii8RBvk8Rz1UlYAkyFen+hxz+YfZPvqwnCKHt2rVNj+FvuD0BToepoAdVRoCYkriTaI47vm9VylQodC5vJ8/h7J0szDRURTRZHiI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; c=relaxed/simple; bh=W4cmxivtYi3nun2PcS0FnwCVsLQ2R9LW3MSa/17BLCA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LY8GF0RUQsQal6vwgasLYh1Qe4IxJZXL52jo6elGfbhIM9wyMeLyo4e4P6x+u9l6gJqMfx9oGb6fF/DflctkIQCv0tCyp0ZwBo2BuauyCf7zQyCZKxTclqNqWh+Pr2gZhdvSKzhrk3of50PR9cIqKoCaKuXFNwNkzZUTsN/ZAPU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N1u8qFST; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N1u8qFST" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 998A4C2BCC9; Thu, 14 May 2026 15:10:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771402; bh=W4cmxivtYi3nun2PcS0FnwCVsLQ2R9LW3MSa/17BLCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N1u8qFSTueub8f6SMSIy8pRg06DFSctNcD1DQzp9+byRtu1kd33GwHylMAv8sr7sp bWUsHoeItXUranDbQA34K59y5XHwkaRCBa1iEotpQWd8vHRjfr7uwdnws2J5MH0WFa opLakp78xUuFPfQFtFzdEOJRbBsAw0YJBSzUedDo8SgkD3zkIVmbqoqDvr0PPhIVnY OLdlfZ+Kxz7de+HJfa+4cq11IwV4mN3iAH9KUZ+oDBs6n2EXGKFBYDGONM5ApPvdPB tOe8cUe7dRAFo8gnfnjiJTQtev5XTY+qZ7Y2y2lABF/8ojsTaWQkhEnAsGk/hlb+QG Oe5PL7LhUybtw== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhI-00000002Oqg-1Sww; Thu, 14 May 2026 15:10:00 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 10/17] arm64: dts: intel: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:38 +0100 Message-ID: <20260514150945.3917510-11-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the agilex5 SoC are missing the EL2 virtual timer interrupt. Add it. Acked-by: Dinh Nguyen Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/bo= ot/dts/intel/socfpga_agilex5.dtsi index 02e62d954e949..6db2d48b9bad3 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -155,7 +155,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 usbphy0: usbphy { --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED9D5429801; Thu, 14 May 2026 15:10:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; cv=none; b=oe/mdlOxnFJImo5P3V0NpaOJM3VlFkYZmkmkuwu2yAaFR6339+g5HdhRar3OEZzGvkjWSN6d7SnfdwYa3vIwMNtmbmb/S1es1D1TuHN04RTMK20eYl8S8pcJETG6viQwFx/YfWlAnK5ainBPrWq8HqJ2nVm/yfafbI+2AEonVKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771404; c=relaxed/simple; bh=C8QlCN0PZK11mrLCs9oNNpttQLwIcnWA9/xtBgloldA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Mwzdhw/ybiB256+UcBmHcWsphtybFWIlBxI77FvCVaOqjpvA7/Be/7TIl5rHnqZo2SPTUqTcpWF3wheypfDBEitU+c8V++j7855nEPBsZktQtAS5u+1ZgZufWdXAU6Tm6HE1/JedSUqrOCu0o4NmyFpQenrbujmTQfuIb+JrD0I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bB+58+95; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bB+58+95" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EDDB1C2BCF7; Thu, 14 May 2026 15:10:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771403; bh=C8QlCN0PZK11mrLCs9oNNpttQLwIcnWA9/xtBgloldA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bB+58+95/TzzBp24rUI1z+IPih41NT7A/xFOGhhrt9+ymAUJrMnkFNP0tEkE8O9ht RYqH2VnHH4wOFjCe/KwMDKhbub8irBzh+dK/9rHHg1NPuSSiWzMsen183uWoIEQqRF 5T9VkrXghJJHurlvTptdq5eDcuKEg0SFD1zfLYD110W8zLO8Zbw0ou7IBXlrcsZH/b 9Ag3w/NfzTHpDcywEmH8w7RtdYotx5MO3Y6pPUqO+HLDn8Tlwld0ivnZoTEx4vv+VQ 29jjeKo/cv5tE5bsaRmDgAs8nYYHn2AjK/zcOJhFIS6pOTdR0jgn9anzZQ0PEinmLk B1BfOWhNpic7A== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhI-00000002Oqg-3wPw; Thu, 14 May 2026 15:10:01 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 11/17] arm64: dts: mediatek: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:39 +0100 Message-ID: <20260514150945.3917510-12-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.1+ based CPUs used in a number of Mediatek SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts= /mediatek/mt6779.dtsi index 70f3375916e8c..106df7603d533 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -108,7 +108,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index b91f88ffae0e8..a4621ce370d8e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -815,7 +815,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts= /mediatek/mt8188.dtsi index 75133794cec38..614e75f46c72d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -918,7 +918,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <13000000>; }; =20 diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 9f8f115edd4cc..873c4fae6afc9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -328,7 +328,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <13000000>; }; =20 diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index c72e34c57629d..3c9a7a08612b9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -451,7 +451,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; }; =20 soc { --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D57183BB683; Thu, 14 May 2026 15:10:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771403; cv=none; b=mfVKa+6UTiBlT2+fkoo7+rU63fWlifCtpvHZuTjU5eTZTXlVo7z9T5mH2gwv7tAMs18oZ/mrj8SZpJcW+LEk7MSl6rBcAL+PJVyNjs8kjmEk4wRbSK3bc6P7y2ZkYgC2n9r/wNKuNP2YTU3xryFd+ftCDnxNno7NCC+zsd77lAs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771403; c=relaxed/simple; bh=VC6LANEhwgs+80fyZ4VYEW4hOL3vmlUcBIfmWto4pj8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EbIFxPqkbRZntDGHiW2HQen4YrLMpLaBGnMDljKL3twvpDLb1ba1mKW8a2i9fWTxj7+LDbp3Pn7dORvKdm9nDIFOpgolUFLKQsWlF9vMdTZCtUKT7wdSiVBHe7MI/YN1HcQ1vFLC2OMEpfhoibDcPQtGRs9ERzjAdbwsF42GLic= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Es1RJIPA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Es1RJIPA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61F5CC2BCFA; Thu, 14 May 2026 15:10:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771403; bh=VC6LANEhwgs+80fyZ4VYEW4hOL3vmlUcBIfmWto4pj8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Es1RJIPAGDyyeqjbKKdh5hErUvtyukBcrKID7q4gTF39L8aFdwN/fBQ+9zJsuPzDC w9JgTtcB/lDuiQ2XW3Io/CaMtP95QgVgmmmpOf33sNJoUC3OvWWKFIKjq7Qt7RBfGO 9w+0CQKJi6NCpMZsihl0TtyKytBMyPVctWqU2Q8W5F0z1gqeZQhTj1N6NtWHDn6TYQ eye0o5P3tWpZ1KtVhnFh19NfPvGf4BmbHk1cBWcPno/d+Vg/quhaz6zDNlcJCGzQnZ /K5/XpquESj+uEUByp8CL5++bQ55YyUO0QALpRpOAhMzcsIb7l0sYsfzjwD6HbAbEf Tf8agXQObN3VQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhJ-00000002Oqg-27aB; Thu, 14 May 2026 15:10:01 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 12/17] arm64: dts: nvidia: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:40 +0100 Message-ID: <20260514150945.3917510-13-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of nvidia SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 ++ arch/arm64/boot/dts/nvidia/tegra234.dtsi | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts= /nvidia/tegra194.dtsi index 849694f751d90..45cc180ac9973 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -3163,6 +3163,8 @@ timer { , , + ; interrupt-parent =3D <&gic>; always-on; diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts= /nvidia/tegra234.dtsi index 04a95b6658caa..ab9813f9ba30c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -5872,7 +5872,8 @@ timer { interrupts =3D , , , - ; + , + ; interrupt-parent =3D <&gic>; always-on; }; --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1C542B72A; Thu, 14 May 2026 15:10:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771405; cv=none; b=JXA2L0PUvAXyGNYNo7PKEnLA//ywZoSY6BCcljZSBAWeBeWZ8UcslJ5jPn9qIZ7TUkq3lyKRWnmlBrOOkr2bgJICWZBrLjUgi7vxitvhA3aMYqYRe2aBqIJt92Rviwf8qdq6hMmbKXQFl/W+YZf1sXCxZ7onZYSLnBVt8iMV3IY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771405; c=relaxed/simple; bh=4/6vzm3F89tYIBWYAzm8ccRLU9saqSBjgruCZuRt+ck=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l/AHMgil9pku1T3qMHOYLIpjAMEAAAaUqUI0lqzDitVb+wNSqdTYXfBVxbuxQf8M43j5YP24WVdf0bGw2MSkS0Z0qV3jAkMQI4iKxFo0N7Qv+t3UIJE3M5BJNNeGxIoPszdbrGqET8FHqK0fCb4iMsWk+jWceDDSh6WEcl2EQoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Dc86wbum; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Dc86wbum" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC25EC2BCB8; Thu, 14 May 2026 15:10:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771404; bh=4/6vzm3F89tYIBWYAzm8ccRLU9saqSBjgruCZuRt+ck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Dc86wbumo75wkbnAHcFHy0rJm1HrHah+LgsVwUGxtzUyTWHxrsrFyU9K3QdgNs6en +BXSkFrtHjisu5VZ1oB7DQHnl8icl30+HnGFaKqXGsmMBGyfxSBhGefgqIrD8ddbGF 1/j6Nf70j+1BybKgQadB/QCBdovRaM33RSa8IkGyQUskthO/3hd8LWrQsIxyaVYLCJ cM4M/4TP4fhz3MMaq97xH/YCKMhLkXDKbSwzz0vobvzpPcEbGNeBWSOasC6HDyhwL/ MWij1ZWiHQb8kY7tSK+W8dHpHVYcEmiVuLZQkpZOmLglsZnJvwHOgSiIn+YqujnH9j EAMov+EvMRwOQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhK-00000002Oqg-0KU7; Thu, 14 May 2026 15:10:02 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 13/17] arm64: dts: qcom: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:41 +0100 Message-ID: <20260514150945.3917510-14-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.1+ based CPUs used in a number of Qualcomm SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/qcom/eliza.dtsi | 3 ++- arch/arm64/boot/dts/qcom/hamoa.dtsi | 3 ++- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 3 ++- arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++- arch/arm64/boot/dts/qcom/lemans.dtsi | 3 ++- arch/arm64/boot/dts/qcom/milos.dtsi | 1 + arch/arm64/boot/dts/qcom/monaco.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sar2130p.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdm670.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdx75.dtsi | 1 + arch/arm64/boot/dts/qcom/sm4450.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm6350.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm6375.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8650.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8750.dtsi | 3 ++- arch/arm64/boot/dts/qcom/talos.dtsi | 3 ++- 25 files changed, 48 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom= /eliza.dtsi index 4a7a0ac40ce62..7267e0ec44b2b 100644 --- a/arch/arm64/boot/dts/qcom/eliza.dtsi +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi @@ -1880,6 +1880,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 051dee0764167..cc638b9162c25 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -8982,7 +8982,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal_zones: thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 7cc326aa1a1aa..149275828f1bc 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -6953,7 +6953,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 tpdm-cdsp-llm { diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 988ca5f7c8a0e..8e0a1ca0125d1 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -7876,6 +7876,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index fe6e763518230..cd9c964e884f3 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -8585,7 +8585,8 @@ arch_timer: timer { interrupts =3D , , , - ; + , + ; }; =20 turing-llm-tpdm { diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom= /milos.dtsi index 4a64a98a434b6..b991124b8ce9f 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -3235,6 +3235,7 @@ timer { interrupts =3D , , , + , ; }; }; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 7b1d57460f1e6..38e54b91f0d81 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -8312,6 +8312,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/q= com/sar2130p.dtsi index d65ad0df68652..11ea2330f3ac5 100644 --- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi +++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi @@ -3165,7 +3165,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index a4b17564469ee..25a9235f41b7a 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -4861,6 +4861,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qc= om/sc8180x.dtsi index f45deb188c6c0..10344e682495c 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -4399,6 +4399,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 761f229e8f472..e5fc52e6f613e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -7043,6 +7043,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index c195c79c1c85b..f6e6ac4d8abcc 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -604,7 +604,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc: soc@0 { diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 4ae8627d6dbc3..9ad4cd36c8927 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -6041,6 +6041,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom= /sdx75.dtsi index d1b61530b562f..b6cdf71051026 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -1583,6 +1583,7 @@ timer { interrupts =3D , , , + , ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qco= m/sm4450.dtsi index 696e2e0841ad9..c7890f5ab8f13 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -681,6 +681,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qco= m/sm6350.dtsi index 034545d2af2d1..a06c1f54e228d 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -3528,6 +3528,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qco= m/sm6375.dtsi index ccf572bb1549b..e89cf4829f10b 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -2472,6 +2472,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 0e101096209ab..c77fea73eaeee 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4630,7 +4630,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index 7076720413ab2..ad44ab7d89fdb 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -6293,7 +6293,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index c830953156ec6..63081dcc94aac 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -4542,6 +4542,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 03bf30b53f289..e7a890dc2e57f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -6327,7 +6327,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <19200000>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 912525e9bca6f..4958b653678ae 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -6806,6 +6806,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 1604bc8cff373..24714688b50af 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -8599,6 +8599,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index 18fb52c14acd7..e9192b806f9f0 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -6796,7 +6796,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 tpdm-cdsp-llm { diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index ff5afbfce2a47..9b3172e8c5545 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -5153,7 +5153,8 @@ arch_timer: timer { interrupts =3D , , , - ; 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Thu, 14 May 2026 15:10:02 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 14/17] arm64: dts: realtek: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:42 +0100 Message-ID: <20260514150945.3917510-15-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Realtek SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts= /realtek/rtd16xx.dtsi index 3a7f6e35b7f74..43b13d133c324 100644 --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi @@ -105,7 +105,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 arm_pmu: pmu { --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB29D42DFF0; Thu, 14 May 2026 15:10:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771406; cv=none; b=EyNQvDB7BzMbAvWkjkv+vjrLdPH+nQMYy66HYpim80tq/0sWxqFvDKZi/FunOjEy1BHkAyVZ+fIug0eoKvECoxvYesdqozMSfN4usftywhc5lvCspHqjWEB3smbO7yVzqxR1qh39yCUloFtnEkqBZMHPl+5aVBLCMg0J25o/nm8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771406; c=relaxed/simple; bh=MJi7t5TPt89sDo4VGxfAxl6xMQMyA0A0mhskuAXvJcY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nEEWUlOq9Gq6scvUu35Cq8CGcGtwbp2veLahphTG4v7WLLfUOVayWsiYOEAgqfJT5Sh1Xzk/HwwR5cPpDDuNB3JPKb/5+kJ5DDRMnQ5LSdlfCZ0XaL//UnHIt/LQ+WaOTRllaQQUab+QnJgPTlGO5SfzIW0jJt2+Ewp5Y/1Iy40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WNU9PJPo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WNU9PJPo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 21E0CC2BCB3; Thu, 14 May 2026 15:10:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771405; bh=MJi7t5TPt89sDo4VGxfAxl6xMQMyA0A0mhskuAXvJcY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WNU9PJPowuhssWeGJO1BUIFX7sLHIe7hIso0qsGzNLGQM4PaVe9Uxewj6tsP3cQYU Es2G3W6gI9epB/2G2oDi+rJbB0NxjUB//BjT9Xe7vyH46u0rOHU4uW/NBNP+7ZzvQa x+ALi1J/9fsZt1tQHW5r0dhwfim7fA01GCvgDrDHYP4r57RX1xNjqLHE2sW4h2je3S VSI/axqomx6pRei/0WBZrbxG4itk3GNYjSoJFUvQ5FWDDTDb+D4mGQRv/OhEF/6xeA 13xDLhzHrveGXO6ZSQ+AOn6MXKRHXw/8jStnDCGUjuCsbp+u/JkL3AWWWQWwAPBbDp Ht2uwHaNEWn8w== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhL-00000002Oqg-0w0j; Thu, 14 May 2026 15:10:03 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 15/17] arm64: dts: rockchip: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:43 +0100 Message-ID: <20260514150945.3917510-16-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Rockchip SoCs are missing the EL2 virtual timer interrupt. Add it. Acked-by: Heiko Stuebner Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk356x-base.dtsi index 64bdd8b7754b5..a5832895bd392 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -195,7 +195,8 @@ timer { interrupts =3D , , , - ; + , + ; arm,no-tick-in-suspend; }; =20 --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7C9D42846D; Thu, 14 May 2026 15:10:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771406; cv=none; b=sCxj2Hz3N2neGBrBh/X3O+MoaX4S2CBlzK3vBlEbvsLTuK9iB2+kZwDosfGJ1NlLX5ZXpOHHKm9t12yo5/pFCZ4zFsffGebT08Nxm0QpjohM+A2NjmeVwYr7gtvE+d4I9rcQ02wZ5zKmojWT+/t7WsYLHQpCuksVXYt3/0ucbXE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771406; c=relaxed/simple; bh=SYhI9mJBt1jThfR8leDkHslN2mb7/RuCI4SqdrZLTgs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=B7CDpDvAClOrcW9+tW1ePKkvIo5ZxKZW1oPw4OJTFXl9kUEs4/zv675A1wWO6iyU7M5BrNvmjc8iH32PXbSWz8s+isIdOzfmo3oo/TCRaW5mtm4alTrA3c5GBqeui4cgnqqid0+xrIgNpRsdvXwVKgOz9vNwftgWgfka9BjhwCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ES1xi4wd; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ES1xi4wd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7CA9C2BCB8; Thu, 14 May 2026 15:10:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771405; bh=SYhI9mJBt1jThfR8leDkHslN2mb7/RuCI4SqdrZLTgs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ES1xi4wdqz35qugKqn7dzEHIcXb+EnegUzxMOTIXu/cc5MT9KY8dinU1xUTvCVlv0 LpFM3TMyyshZ2MId8/l4u4mVDmpFX0WHqtsG03fnbpY7LZfSupnpr7n/wdIwGlVqhj AYB2oOF8t4ZYN4Ziu+DLmQeT4+8u9oNo2/L2S7G3+9KQ4Ip4EUNe/8M7Y8pzvkRnSa mSViOnZMDrzOQW24gTbveeKkN2GJJXDDoLhPZBBdApxXKc2fuUblud5H85xJgSLA3l kXJA+NcMidCGYPDMYidzRKUrCdxLJkA8zFTknWzKYv6W8i68SOhQpta1z+L/VitYdv 7yt7Gt5d2AbZw== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhL-00000002Oqg-3XbW; Thu, 14 May 2026 15:10:03 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 16/17] arm64: dts: sprd: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:44 +0100 Message-ID: <20260514150945.3917510-17-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Unisoc SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/sprd/sc9863a.dtsi | 3 ++- arch/arm64/boot/dts/sprd/ums512.dtsi | 3 ++- arch/arm64/boot/dts/sprd/ums9620.dtsi | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sp= rd/sc9863a.dtsi index 31799579d7f2e..18e61c25aa36f 100644 --- a/arch/arm64/boot/dts/sprd/sc9863a.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9863a.dtsi @@ -130,7 +130,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu { diff --git a/arch/arm64/boot/dts/sprd/ums512.dtsi b/arch/arm64/boot/dts/spr= d/ums512.dtsi index efa14309cc4ef..4105647aabd17 100644 --- a/arch/arm64/boot/dts/sprd/ums512.dtsi +++ b/arch/arm64/boot/dts/sprd/ums512.dtsi @@ -133,7 +133,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu-a55 { diff --git a/arch/arm64/boot/dts/sprd/ums9620.dtsi b/arch/arm64/boot/dts/sp= rd/ums9620.dtsi index 2458071320c9b..037e3401d4991 100644 --- a/arch/arm64/boot/dts/sprd/ums9620.dtsi +++ b/arch/arm64/boot/dts/sprd/ums9620.dtsi @@ -141,7 +141,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu-a55 { --=20 2.47.3 From nobody Fri Jun 12 13:55:42 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D79C13DFC78; Thu, 14 May 2026 15:10:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771407; cv=none; b=ZMyeXGPi2Cla/w/xEFX6bX8t7GX8oh3YGHPOqQ7IhIWLggJu1QGscU6xSnpfr7WRyPnWmwBgnurjZWGg+b9O2prhvz9bv3H+EJr8w2E4b6oyDcxSQ2V6lMHfa7FZhDeW7xBGo7u1Ld6yAJre/yUHsIqlN1eQ0JlqbLr6cNz6/VE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778771407; c=relaxed/simple; bh=aUhTz9jm+Ra2Q6RC2n0qYxb1bA+A3HUaTCXCNCF7HOA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ffzk+iwEeeYYPpscD6SBjNk5Yw+7yUZjFAN9ngJB8UZF+my8GCfSf7SqZkpfFPID4VhH7vFN1/kGMkBZULvGBGl8/VvMh4CnlGlq7QAUkwWxrY80ksHyl/EMnjj8ovFy2xG7u2qlrRYyNnG/4PCBKQfp1aQ0878ioRReCxwVPxs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=p/mr/DHL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="p/mr/DHL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4ECF2C2BCC9; Thu, 14 May 2026 15:10:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778771406; bh=aUhTz9jm+Ra2Q6RC2n0qYxb1bA+A3HUaTCXCNCF7HOA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=p/mr/DHL62FqjAlt+scNdgghJYFGghyQpnZdxz19HujERiMA3DcovaJKai0z39pHP WjgfvM+FtUY6fJ5+Pb+nHms5M9xQTXp1txiplYm7/bA705yRybXiAcGvgNwV+Vwgnn EWVhAO1qtgtHbPix28nU0FJBDN6njTAKJk8fWBEbq07e1YNjCwN09fCdLIjOVLLw6V dWclJ74btBgQtpng2GaR4qfqaZCj5c0RxYkQa4azpRZK4TAUruVs7g6QJFbXrdUgY4 szvvwIwNd55M3aM+/9E+5LuaxYSrINL8NLGGsPmkdVKyLtB4ZF4Ha/94FANvU8CWBo WwlK8rkZm9Srg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wNXhM-00000002Oqg-1mBD; Thu, 14 May 2026 15:10:04 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH v2 17/17] arm64: dts: xilinx: Add EL2 virtual timer interrupt Date: Thu, 14 May 2026 16:09:45 +0100 Message-ID: <20260514150945.3917510-18-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260514150945.3917510-1-maz@kernel.org> References: <20260514150945.3917510-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the versal SoC are missing the EL2 virtual timer interrupt. Add it. Acked-by: Michal Simek Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/xilinx/versal-net.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/d= ts/xilinx/versal-net.dtsi index 15f767608e67f..0aac93675ad77 100644 --- a/arch/arm64/boot/dts/xilinx/versal-net.dtsi +++ b/arch/arm64/boot/dts/xilinx/versal-net.dtsi @@ -728,7 +728,8 @@ fpga: fpga-region { =20 timer: timer { compatible =3D "arm,armv8-timer"; - interrupts =3D <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>; + interrupts =3D <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>, + <1 12 4>; }; =20 versal_fpga: versal-fpga { --=20 2.47.3