From nobody Fri Jun 12 15:49:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 238E73A6F1C; Thu, 14 May 2026 07:04:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778742242; cv=none; b=dtbeZcrFDWI6TReFtbHz8CfE2bWbwLyIXJ5YCgaNQkdPeCYHuEKOy7XwCfrKYLKiXztEaNs4Q8e3YAocbiL46xgLhymb07JTnXKqJEqdn7yTVh4hMnMKoZ6M12Eywlz244qEQt8PIUCZUo5kY+f8eOHAWtM5Ay71Grea7q3QEB0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778742242; c=relaxed/simple; bh=gnBNB2f/S7tRA17HfkNyztEuzXrqrHY6BCF9ckDYP48=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=e5GfmLrtCaNgqPR9iiJL87z4qBwzrJuoEitvAEUh/kJjVJeGyA7h6JYHqjFAGhM1/KhNmlAkLbIIuYPC/rwZol5YREGnJTSXaUtNGS0TeUg8sFE6m8f4Wk9i41lZSqkIv5JNGnuYZBWAL8m7aBCwJSxYMQtiQPNNXPm0RPhC1uw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Xzd1pJ15; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Xzd1pJ15" Received: by smtp.kernel.org (Postfix) with ESMTPS id D3CEEC2BCC6; Thu, 14 May 2026 07:04:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778742241; bh=gnBNB2f/S7tRA17HfkNyztEuzXrqrHY6BCF9ckDYP48=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Xzd1pJ15eSBSN/5GwUPQXWlqBPYSDgGgtd2MlkJlTP8mJaUeGWww2i2KSv2cApewU /7MVXabedbI8Fw8ZhDKA1u+ECJMmgiWUNVMGrjw9DSVuhEeAg7tGxOAHTxAJ7Oxpyg Krv35TFv2updKCw5bOqI+J9W0CeE81j8kLZfZBq3RqPf8dHFL9LLY3NIy6qxZKUPlZ +n7zufpNdZlK0iFtYOLDOS8n8STXk6lvgr4Q/Lb5cWl8W9k7Ok6pA2MdJwCmEyDP/L qmC/hMD69tRp7vNSxYuVvM80asJtquzgFMvkN/8fys2F9bhlfh2ScQzVX4UEAWhLeY zQ36+9Sn3A3qw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3937CD4F25; Thu, 14 May 2026 07:04:01 +0000 (UTC) From: Rudraksha Gupta via B4 Relay Date: Thu, 14 May 2026 00:04:00 -0700 Subject: [PATCH 1/3] dt-bindings: soc: qcom: saw2: Rename MSM8960 SAW2 compatible to v1.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260514-expressatt_cpufreq-v1-1-487fd2d78859@gmail.com> References: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> In-Reply-To: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rudraksha Gupta X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778742241; l=1155; i=guptarud@gmail.com; s=20240916; h=from:subject:message-id; bh=kNjii0mqGqmFn4GGiHWFBoaRtbaipmmzXSF2oiS82cc=; b=oHPl67Wu2/1eEYL7Ap56R6la/LoJQOJlgUWbNVXT9BpjaTveGN63qmGT5W00v6e06kE2IVR5Q JB0al5j5FOODpa+vw1qPw7WDP2OEMQ/CeLcSbil6uAoeK3731gsNqkO X-Developer-Key: i=guptarud@gmail.com; a=ed25519; pk=ETrudRugWAtOpr0OhRiheQ1lXM4Kk4KGFnBySlKDi2I= X-Endpoint-Received: by B4 Relay for guptarud@gmail.com/20240916 with auth_id=211 X-Original-From: Rudraksha Gupta Reply-To: guptarud@gmail.com From: Rudraksha Gupta Rename qcom,msm8960-saw2-cpu to qcom,msm8960-saw2-v1.1-cpu to follow the naming convention used by other SAW2 compatibles that include the hardware version (e.g. qcom,apq8064-saw2-v1.1-cpu). The MSM8960 uses SAW2 v1.1, the same hardware version as the APQ8064. Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Rudraksha Gupta --- Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Do= cumentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml index c2f1f5946cfa..ff0e2697a7c6 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -37,7 +37,7 @@ properties: - qcom,msm8939-saw2-v3.0-cpu - qcom,msm8226-saw2-v2.1-cpu - qcom,msm8226-saw2-v2.1-l2 - - qcom,msm8960-saw2-cpu + - qcom,msm8960-saw2-v1.1-cpu - qcom,msm8974-saw2-v2.1-cpu - qcom,msm8974-saw2-v2.1-l2 - qcom,msm8976-gold-saw2-v2.3-l2 --=20 2.54.0 From nobody Fri Jun 12 15:49:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 239B33AC0DD; Thu, 14 May 2026 07:04:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778742242; cv=none; b=lhCeitHfGLGhg8izRMnE5zyD2/FQEAwDH7AQJZU6U0nJmV0YTJux5oGD+xeP8ztreeH5BYkvB40D433JOQfXi6t9Rgm1nKrtXLPe8d54Ve+VKeGMK0xwbnxasKxnY55NugJE2jZREp0g/mVZGkT5weN4irsV3CFE7AvrC8rDvug= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778742242; c=relaxed/simple; bh=MiMD2MLAknKqm/C40NQmjCA1v02tDQb4pWIBMZ/KaVo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ijkX9icdj63E3eUot60Un/qVh8OyRC8BAKMxgPmRit65WP2uUNCdQS/y+W2x1fNKwT4YkJIrlQPv+sF8FOV/xEUZ/qomkWNAOqn/JoZnWtLZslMESRQC4BfV8wvdIKa/qfz42DyuUYptmSueglD3jFJOgYsY9Ksd3uW6mAqrs28= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ge4k9A9B; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ge4k9A9B" Received: by smtp.kernel.org (Postfix) with ESMTPS id E4BDAC2BCF6; Thu, 14 May 2026 07:04:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778742242; bh=MiMD2MLAknKqm/C40NQmjCA1v02tDQb4pWIBMZ/KaVo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ge4k9A9B9R5QMxz2dIRstH8sFQVphDZztDABPN8AMDyuGSTJK78Y5sYcTJHpOrkox g4RHWb6DI/nVu7BeJZBKmY6u7Rzm0zEnT5pIobwTOdstQifbICOGagn+3XFLouSsMl rn25m11OOiboJg+U9M3cQI1vQyMsCICT1Sq4sfNS69DUm5Uw60F+htRfjDw2yFLHOS 8yVy13sxeHdzPk8eTXFjekJJBei5LKaX5XLqWrXb2RIhnn1LXhrIGSqnhhQ7UcxFLg F4pu70bIxVZbtlvtDn6S8Ju8z0ASqE4vvGJENAqh2Vvtf1G9UWrxqXgfwQ8e/jft4h Kmu7YkXDorDUg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6CA6CD4F3E; Thu, 14 May 2026 07:04:01 +0000 (UTC) From: Rudraksha Gupta via B4 Relay Date: Thu, 14 May 2026 00:04:01 -0700 Subject: [PATCH 2/3] soc: qcom: spm: Add MSM8960 SAW2 CPU support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260514-expressatt_cpufreq-v1-2-487fd2d78859@gmail.com> References: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> In-Reply-To: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rudraksha Gupta X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778742241; l=2299; i=guptarud@gmail.com; s=20240916; h=from:subject:message-id; bh=nrLplu9+cKSqhALRTglWbMzBGC3bon3VtGeZsCT7sGQ=; b=UIKrGrwHTX76SeWIsGzDcTrzwRTiJPsh3jweNO+73SQm4NCLT+K87OiaDN45ldZp/Z1rBhkd9 RzmFjmz8/sPBCpO0h7hUObP/pr30DMtR9rWXN0sO95ox/k5Vlkf+E9Z X-Developer-Key: i=guptarud@gmail.com; a=ed25519; pk=ETrudRugWAtOpr0OhRiheQ1lXM4Kk4KGFnBySlKDi2I= X-Endpoint-Received: by B4 Relay for guptarud@gmail.com/20240916 with auth_id=211 X-Original-From: Rudraksha Gupta Reply-To: guptarud@gmail.com From: Rudraksha Gupta The MSM8960 uses SAW2 v1.1, the same hardware version as the APQ8064. Add SPM register data so that the SAW2 driver can program the correct SPM sequences and PMIC parameters for MSM8960 CPUs. The register layout, SPM sequences, voltage range, and regulator parameters are shared with APQ8064. The only difference is pmic_dly: 0x03020004 on MSM8960 vs 0x02020004 on APQ8064. Link: https://github.com/CyanogenMod/android_kernel_samsung_d2/blob/0dbe2b5= 6847b304d30b809dfd08ba3b4a61d9af8/arch/arm/mach-msm/board-express.c#L3353-L= 3381 Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Rudraksha Gupta --- drivers/soc/qcom/spm.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c index f75659fff287..596431b00a03 100644 --- a/drivers/soc/qcom/spm.c +++ b/drivers/soc/qcom/spm.c @@ -233,7 +233,7 @@ static const u16 spm_reg_offset_v1_1[SPM_REG_NR] =3D { =20 static void smp_set_vdd_v1_1(void *data); =20 -/* SPM register data for 8064 */ +/* SPM register data for 8064, 8960 */ static struct linear_range spm_v1_1_regulator_range =3D REGULATOR_LINEAR_RANGE(700000, 0, 56, 12500); =20 @@ -253,6 +253,22 @@ static const struct spm_reg_data spm_reg_8064_cpu =3D { .ramp_delay =3D 1250, }; =20 +static const struct spm_reg_data spm_reg_8960_cpu =3D { + .reg_offset =3D spm_reg_offset_v1_1, + .spm_cfg =3D 0x1F, + .pmic_dly =3D 0x03020004, + .pmic_data[0] =3D 0x0084009C, + .pmic_data[1] =3D 0x00A4001C, + .seq =3D { 0x03, 0x0F, 0x00, 0x24, 0x54, 0x10, 0x09, 0x03, 0x01, + 0x10, 0x54, 0x30, 0x0C, 0x24, 0x30, 0x0F }, + .start_index[PM_SLEEP_MODE_STBY] =3D 0, + .start_index[PM_SLEEP_MODE_SPC] =3D 2, + .set_vdd =3D smp_set_vdd_v1_1, + .range =3D &spm_v1_1_regulator_range, + .init_uV =3D 1300000, + .ramp_delay =3D 1250, +}; + static inline void spm_register_write(struct spm_driver_data *drv, enum spm_reg reg, u32 val) { @@ -501,6 +517,8 @@ static const struct of_device_id spm_match_table[] =3D { .data =3D &spm_reg_8974_8084_cpu }, { .compatible =3D "qcom,apq8064-saw2-v1.1-cpu", .data =3D &spm_reg_8064_cpu }, + { .compatible =3D "qcom,msm8960-saw2-v1.1-cpu", + .data =3D &spm_reg_8960_cpu }, { }, }; MODULE_DEVICE_TABLE(of, spm_match_table); --=20 2.54.0 From nobody Fri Jun 12 15:49:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36BE53AD50A; Thu, 14 May 2026 07:04:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778742242; cv=none; b=gpNSlRFDuQH2su/VElpsWYDcwOq7M+GqZR9hxFSEsTiN6uVtVDKkgzMEovyuJKrV0N6gMmiEemilCjbJ8X9uSoJL0tdU88iKZYAAGhX69EevJBjZ7yeGIwj55vy0z6ypAqglPYQBPc00b61rd1lyDxYxuMl0TlaHBv7hgpm8gxI= ARC-Message-Signature: i=1; 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b=OT3tVIeLqzt673LooJYHoaGO0aY+UftnjkrFMONkp2Hey4svOxcvGc6FY2khvwRfq F8HlOqWcIgS2zAyNA1dnhu9qoYsLpSIEhyCW7YLPsG2r//utvS0TG5tbW/pjSLPbTP P5btSAjZizICBogP0VBZ1rB/YsxXORLHJYtrb4s3cBDvH6fKFIG9HFn8KeAqNlm1dU g+J/KxZxWOHLCzc0Qfth2JhV8pjghcCl+C1uP6X5WmDuqZ4ZArCSONVHpT96cpgfxK AX51YDBa/koCb01tm3lEwvMG12A4dFv2JJ4Yi4U/KmIDcLfxY/i+LcabDdSXbAxTub oMc6UYoSV/dew== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8EF1CD4851; Thu, 14 May 2026 07:04:01 +0000 (UTC) From: Rudraksha Gupta via B4 Relay Date: Thu, 14 May 2026 00:04:02 -0700 Subject: [PATCH 3/3] ARM: dts: qcom: msm8960: Add CPU frequency scaling support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260514-expressatt_cpufreq-v1-3-487fd2d78859@gmail.com> References: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> In-Reply-To: <20260514-expressatt_cpufreq-v1-0-487fd2d78859@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rudraksha Gupta X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778742241; l=6751; i=guptarud@gmail.com; s=20240916; h=from:subject:message-id; bh=IeR+d4K/5j6SSF3Qt1EdfG/VVX1WUOv9oq94PSWVQE8=; b=bYHSWaiN6ctsmGuqClUdwNTMbOR524TV4dwpCN/60kVY5WqQZme+KATZUqeGM0UQ8niBHZ2pv BoaBESE/9aQBbtAIKYgQy65kWQngsEiJkmGnDj7E5CNcbN12fkEWF5R X-Developer-Key: i=guptarud@gmail.com; a=ed25519; pk=ETrudRugWAtOpr0OhRiheQ1lXM4Kk4KGFnBySlKDi2I= X-Endpoint-Received: by B4 Relay for guptarud@gmail.com/20240916 with auth_id=211 X-Original-From: Rudraksha Gupta Reply-To: guptarud@gmail.com From: Rudraksha Gupta Enable Krait DVFS on MSM8960 by adding the required device tree nodes: - OPP table with 12 operating points from 384 MHz to 1.512 GHz, with per-PVS voltages for slow, nominal, and fast silicon bins. - Krait clock controller (krait-cc-v1) driving the CPU muxes from PLL9/PLL10, ACC aux outputs, and PXO. - PVS efuse nvmem cell in qfprom for the cpufreq-nvmem driver to read the speed-bin and process voltage class. - CPU idle state for Standalone Power Collapse (SPC). - operating-points-v2, clocks, cpu-supply, and cpu-idle-states wired into both CPU nodes. Link: https://github.com/CyanogenMod/android_kernel_samsung_d2/blob/0dbe2b5= 6847b304d30b809dfd08ba3b4a61d9af8/arch/arm/mach-msm/acpuclock-8960.c#L120-L= 235 Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Rudraksha Gupta Tested-by: Antony Kurniawan Soemardi --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 133 +++++++++++++++++++++++++++= +++- 1 file changed, 131 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/q= com/qcom-msm8960.dtsi index a427f0f41cd1..b5b9239c7aa0 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -54,6 +54,10 @@ cpu@0 { reg =3D <0>; enable-method =3D "qcom,kpss-acc-v1"; device_type =3D "cpu"; + operating-points-v2 =3D <&cpu_opp_table>; + clocks =3D <&kraitcc 0>; + cpu-supply =3D <&saw0_vreg>; + cpu-idle-states =3D <&cpu_spc>; next-level-cache =3D <&l2>; qcom,acc =3D <&acc0>; qcom,saw =3D <&saw0>; @@ -64,6 +68,10 @@ cpu@1 { reg =3D <1>; enable-method =3D "qcom,kpss-acc-v1"; device_type =3D "cpu"; + operating-points-v2 =3D <&cpu_opp_table>; + clocks =3D <&kraitcc 1>; + cpu-supply =3D <&saw1_vreg>; + cpu-idle-states =3D <&cpu_spc>; next-level-cache =3D <&l2>; qcom,acc =3D <&acc1>; qcom,saw =3D <&saw1>; @@ -74,6 +82,116 @@ l2: l2-cache { cache-level =3D <2>; cache-unified; }; + + idle-states { + cpu_spc: cpu-spc { + compatible =3D "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us =3D <400>; + exit-latency-us =3D <900>; + min-residency-us =3D <3000>; + }; + }; + }; + + cpu_opp_table: opp-table-cpu { + compatible =3D "operating-points-v2-krait-cpu"; + nvmem-cells =3D <&pvs_efuse>; + + opp-384000000 { + opp-hz =3D /bits/ 64 <384000000>; + opp-microvolt-speed0-pvs0-v0 =3D <950000>; + opp-microvolt-speed0-pvs1-v0 =3D <900000>; + opp-microvolt-speed0-pvs3-v0 =3D <850000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-486000000 { + opp-hz =3D /bits/ 64 <486000000>; + opp-microvolt-speed0-pvs0-v0 =3D <975000>; + opp-microvolt-speed0-pvs1-v0 =3D <925000>; + opp-microvolt-speed0-pvs3-v0 =3D <875000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-594000000 { + opp-hz =3D /bits/ 64 <594000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1000000>; + opp-microvolt-speed0-pvs1-v0 =3D <950000>; + opp-microvolt-speed0-pvs3-v0 =3D <900000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-702000000 { + opp-hz =3D /bits/ 64 <702000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1025000>; + opp-microvolt-speed0-pvs1-v0 =3D <975000>; + opp-microvolt-speed0-pvs3-v0 =3D <925000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-810000000 { + opp-hz =3D /bits/ 64 <810000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1075000>; + opp-microvolt-speed0-pvs1-v0 =3D <1025000>; + opp-microvolt-speed0-pvs3-v0 =3D <975000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-918000000 { + opp-hz =3D /bits/ 64 <918000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1100000>; + opp-microvolt-speed0-pvs1-v0 =3D <1050000>; + opp-microvolt-speed0-pvs3-v0 =3D <1000000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1026000000 { + opp-hz =3D /bits/ 64 <1026000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1125000>; + opp-microvolt-speed0-pvs1-v0 =3D <1075000>; + opp-microvolt-speed0-pvs3-v0 =3D <1025000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1134000000 { + opp-hz =3D /bits/ 64 <1134000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1175000>; + opp-microvolt-speed0-pvs1-v0 =3D <1125000>; + opp-microvolt-speed0-pvs3-v0 =3D <1075000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1242000000 { + opp-hz =3D /bits/ 64 <1242000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1200000>; + opp-microvolt-speed0-pvs1-v0 =3D <1150000>; + opp-microvolt-speed0-pvs3-v0 =3D <1100000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1350000000 { + opp-hz =3D /bits/ 64 <1350000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1225000>; + opp-microvolt-speed0-pvs1-v0 =3D <1175000>; + opp-microvolt-speed0-pvs3-v0 =3D <1125000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1458000000 { + opp-hz =3D /bits/ 64 <1458000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1237500>; + opp-microvolt-speed0-pvs1-v0 =3D <1187500>; + opp-microvolt-speed0-pvs3-v0 =3D <1137500>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; + + opp-1512000000 { + opp-hz =3D /bits/ 64 <1512000000>; + opp-microvolt-speed0-pvs0-v0 =3D <1250000>; + opp-microvolt-speed0-pvs1-v0 =3D <1200000>; + opp-microvolt-speed0-pvs3-v0 =3D <1150000>; + opp-supported-hw =3D <0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF>; + }; }; =20 memory@80000000 { @@ -81,6 +199,13 @@ memory@80000000 { reg =3D <0x80000000 0>; }; =20 + kraitcc: clock-controller { + compatible =3D "qcom,krait-cc-v1"; + clocks =3D <&gcc PLL9>, <&gcc PLL10>, <&acc0>, <&acc1>, <&pxo_board>; + clock-names =3D "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb"; + #clock-cells =3D <1>; + }; + soc: soc { compatible =3D "simple-bus"; ranges; @@ -112,6 +237,10 @@ qfprom: efuse@700000 { #address-cells =3D <1>; #size-cells =3D <1>; =20 + pvs_efuse: pvs@c0 { + reg =3D <0xc0 0x04>; + }; + tsens_calib: calib@404 { reg =3D <0x404 0x10>; }; @@ -348,7 +477,7 @@ acc0: clock-controller@2088000 { }; =20 saw0: power-manager@2089000 { - compatible =3D "qcom,msm8960-saw2-cpu", "qcom,saw2"; + compatible =3D "qcom,msm8960-saw2-v1.1-cpu", "qcom,saw2"; reg =3D <0x02089000 0x1000>, <0x02009000 0x1000>; =20 saw0_vreg: regulator { @@ -367,7 +496,7 @@ acc1: clock-controller@2098000 { }; =20 saw1: power-manager@2099000 { - compatible =3D "qcom,msm8960-saw2-cpu", "qcom,saw2"; + compatible =3D "qcom,msm8960-saw2-v1.1-cpu", "qcom,saw2"; reg =3D <0x02099000 0x1000>, <0x02009000 0x1000>; =20 saw1_vreg: regulator { --=20 2.54.0