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So, the managed lifecycle doesn't map cleanly onto it. Since the lifecycle of this device_link is managed by the msm driver, pass DL_FLAG_STATELESS together with the existing DL_FLAG_PM_RUNTIME flag. This fix is required to avoid the below splat when a driver is attached to the GMU: [ 9.624509] WARNING: drivers/base/core.c:1383 at dvice_links_driver_boun= d+0x178/0x330, CPU#6: (udev-worker)/354e [ 9.781167] pc : device_links_driver_bound+0x178/0x330 [ 9.786456] lr : device_links_driver_bound+0x158/0x330 [ 9.798622] sp : ffff8000827bb820 [ 9.802042] x29: ffff8000827bb820 x28: ffff000808915800 x27: 00000000000= 00044 [ 9.809573] x26: ffffb7caf3f983d0 x25: 0000000000000003 x24: ffffb7caf41= 645a0 [ 9.816920] x23: ffffb7caf3f982d8 x22: ffff000801239cb8 x21: ffff0008012= 39c10 [ 9.816921] x20: ffff00080b3a8c00 x19: ffff000801239c98 x18: 00000000fff= fffff [ 9.816922] x17: 736d5b2073706f5f x16: ffffb7caf1eb5940 x15: ffff8001027= bb3b7 [ 9.816922] x14: 0000000000000026 x13: ffff00080084c110 x12: 00000000000= 00000 [ 9.816923] x11: ffff0008004a5828 x10: ffff0008004a56d0 x9 : ffffb7caf22= 27870 [ 9.816924] x8 : ffff0008004a56f8 x7 : 0000000000000001 x6 : 00000000000= 01000ocket. [ 9.816925] x5 : 00000000001a7fbf x4 : ffff0008004a56e8 x3 : ffff0008012= 38cc8 [ 9.816926] x2 : ffffb7caf4164000 x1 : ffff000801239c10 x0 : 00000000000= 00000 [ 9.816927] Call trace: [ 9.816927] device_links_driver_bound+0x178/0x330 (P) [ 9.893492] driver_bound+0x7c/0xd0 [ 9.893493] really_probe+0x208/0x2a8 [ 9.893495] __driver_probe_device+0x88/0x170 [ 9.893496] driver_probe_device+0x44/0x178 [ 9.909639] __driver_attach+0x9c/0x1b8 [ 9.913592] bus_for_each_dev+0x7c/0xe8System Message Bus Socket. [ 9.925839] driver_attach+0x2c/0x40 [ 9.929733] bus_add_driver+0xec/0x218 [ 9.933609] driver_register+0x68/0x138 [ 9.937555] __platform_driver_register+0x2c/0x40 [ 9.937556] adreno_gmu_register+0x2c/0x40 [msm] [ 9.947141] adreno_register+0x3c/0x50 [msm] [ 9.951544] msm_drm_register+0x50/0x78 [msm]for the API... [ 9.962813] do_one_initcall+0x4c/0x3e0 [ 9.966975] do_init_module+0x60/0x280 [ 9.970849] load_module+0x1c70/0x1fa0 [ 9.974708] init_module_from_file+0xdc/0x100 [ 9.979188] __arm64_sys_finit_module+0x1c0/0x2e0 [ 9.984026] invoke_syscall+0x5c/0x120 [ 9.987882] el0_svc_common.constprop.0+0xd0/0xf8 [ 9.992715] do_el0_svc+0x28/0x40 [ 9.995243] qcom_q6v5_pas 6800000.remoteproc: Handover signaled, but it = already happened [ 9.996128] el0_svc+0x38/0x148 [ 10.007672] el0t_64_sync_handler+0xa0/0xe8 [ 10.011975] el0t_64_sync+0x198/0x1a0 Fixes: ead5d3e5eb37 ("drm/msm/a6xx: Vote for cx gdsc from gpu driver") Signed-off-by: Akhil P Oommen Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gmu.c index 1b44b9e21ad8..ec13b27feee7 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -2196,7 +2196,8 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, = struct device_node *node) goto err_mmio; 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No functional change intended. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/adreno_device.c | 3 +-- drivers/gpu/drm/msm/msm_drv.c | 11 +++++++---- drivers/gpu/drm/msm/msm_drv.h | 2 +- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/m= sm/adreno/adreno_device.c index 4edfe80c5be7..3052f3e36de0 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -271,8 +271,7 @@ static const struct component_ops a3xx_ops =3D { =20 static int adreno_probe(struct platform_device *pdev) { - if (of_device_is_compatible(pdev->dev.of_node, "amd,imageon") || - msm_gpu_no_components()) + if (msm_gpu_use_separate_drm_dev(pdev)) return msm_gpu_probe(pdev, &a3xx_ops); =20 return component_add(&pdev->dev, &a3xx_ops); diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 195f40e331e5..b61deafd02c3 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -61,9 +61,12 @@ module_param(separate_gpu_kms, bool, 0400); DECLARE_FAULT_ATTR(fail_gem_alloc); DECLARE_FAULT_ATTR(fail_gem_iova); =20 -bool msm_gpu_no_components(void) +bool msm_gpu_use_separate_drm_dev(struct platform_device *pdev) { - return separate_gpu_kms; + if (!pdev) + return separate_gpu_kms; + + return of_device_is_compatible(pdev->dev.of_node, "amd,imageon") || separ= ate_gpu_kms; } =20 static int msm_drm_uninit(struct device *dev, const struct component_ops *= gpu_ops) @@ -1035,7 +1038,7 @@ static int add_gpu_components(struct device *dev, static int msm_drm_bind(struct device *dev) { return msm_drm_init(dev, - msm_gpu_no_components() ? + msm_gpu_use_separate_drm_dev(NULL) ? &msm_kms_driver : &msm_driver, NULL); @@ -1074,7 +1077,7 @@ int msm_drv_probe(struct device *master_dev, return ret; } =20 - if (!msm_gpu_no_components()) { + if (!msm_gpu_use_separate_drm_dev(NULL)) { ret =3D add_gpu_components(master_dev, &match); if (ret) return ret; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 6d847d593f1a..6fcb696ceb7c 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -555,6 +555,6 @@ void msm_kms_shutdown(struct platform_device *pdev); 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That dereference is wrong because msm_gpu_init() overwrites the GPU pdev's drvdata with adreno_smmu_priv pointer. Fix this by using msm_gpu_use_separate_drm_dev() instead of relying on drvdata. Fixes: 643515a9cd09 ("drm/msm: rework binding of Imageon GPUs") Signed-off-by: Akhil P Oommen Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/adreno_device.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/m= sm/adreno/adreno_device.c index 3052f3e36de0..66953e551d86 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -279,12 +279,10 @@ static int adreno_probe(struct platform_device *pdev) =20 static void adreno_remove(struct platform_device *pdev) { - struct msm_drm_private *priv =3D platform_get_drvdata(pdev); - - if (priv->kms_init) - component_del(&pdev->dev, &a3xx_ops); - else + if (msm_gpu_use_separate_drm_dev(pdev)) msm_gpu_remove(pdev, &a3xx_ops); + else + component_del(&pdev->dev, &a3xx_ops); } =20 static void adreno_shutdown(struct platform_device *pdev) --=20 2.51.0 From nobody Fri Jun 12 20:21:40 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E9843C457D for ; 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In this case, we skip creating components and directly bind the GPU. That shortcut makes it impossible to add a second sibling on the GPU master without introducing ad-hoc plumbing. To prepare for adding the GMU as a peer component on this master, turn the GPU pdev into both a component master and the sole component of itself in this path. A follow up patch will introduce GMU as a component device. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/adreno_device.c | 20 ++++++++++++----- drivers/gpu/drm/msm/msm_drv.c | 35 +++++++++++++++++++++++++-= ---- drivers/gpu/drm/msm/msm_drv.h | 6 ++--- 3 files changed, 45 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/m= sm/adreno/adreno_device.c index 66953e551d86..67686424f3a1 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -271,18 +271,26 @@ static const struct component_ops a3xx_ops =3D { =20 static int adreno_probe(struct platform_device *pdev) { - if (msm_gpu_use_separate_drm_dev(pdev)) - return msm_gpu_probe(pdev, &a3xx_ops); + int ret; =20 - return component_add(&pdev->dev, &a3xx_ops); + if (msm_gpu_use_separate_drm_dev(pdev)) { + ret =3D msm_gpu_probe(pdev); + if (ret) + return ret; + } + + ret =3D component_add(&pdev->dev, &a3xx_ops); + if (ret && msm_gpu_use_separate_drm_dev(pdev)) + msm_gpu_remove(pdev); + + return ret; } =20 static void adreno_remove(struct platform_device *pdev) { + component_del(&pdev->dev, &a3xx_ops); if (msm_gpu_use_separate_drm_dev(pdev)) - msm_gpu_remove(pdev, &a3xx_ops); - else - component_del(&pdev->dev, &a3xx_ops); + msm_gpu_remove(pdev); } =20 static void adreno_shutdown(struct platform_device *pdev) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index b61deafd02c3..af5aa7ff6179 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1097,10 +1097,25 @@ int msm_drv_probe(struct device *master_dev, return 0; } =20 -int msm_gpu_probe(struct platform_device *pdev, - const struct component_ops *ops) +static int msm_gpu_drm_bind(struct device *dev) +{ + return msm_drm_init(dev, &msm_gpu_driver, NULL); +} + +static void msm_gpu_drm_unbind(struct device *dev) +{ + msm_drm_uninit(dev, NULL); +} + +static const struct component_master_ops msm_gpu_drm_ops =3D { + .bind =3D msm_gpu_drm_bind, + .unbind =3D msm_gpu_drm_unbind, +}; + +int msm_gpu_probe(struct platform_device *pdev) { struct msm_drm_private *priv; + struct component_match *match =3D NULL; int ret; =20 priv =3D devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); @@ -1116,13 +1131,21 @@ int msm_gpu_probe(struct platform_device *pdev, if (ret) return ret; =20 - return msm_drm_init(&pdev->dev, &msm_gpu_driver, ops); + /* + * The GPU pdev acts as both the component master and the sole + * component (added by adreno_probe()). Future patches add the + * GMU node as a second component on this same master. + */ + drm_of_component_match_add(&pdev->dev, &match, + component_compare_of, pdev->dev.of_node); + + return component_master_add_with_match(&pdev->dev, &msm_gpu_drm_ops, + match); } =20 -void msm_gpu_remove(struct platform_device *pdev, - const struct component_ops *ops) +void msm_gpu_remove(struct platform_device *pdev) { - msm_drm_uninit(&pdev->dev, ops); + component_master_del(&pdev->dev, &msm_gpu_drm_ops); } =20 static int __init msm_drm_register(void) diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 6fcb696ceb7c..6264ff27496f 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -544,10 +544,8 @@ extern const struct component_master_ops msm_drm_ops; int msm_kms_pm_prepare(struct device *dev); void msm_kms_pm_complete(struct device *dev); =20 -int msm_gpu_probe(struct platform_device *pdev, - const struct component_ops *ops); -void msm_gpu_remove(struct platform_device *pdev, - const struct component_ops *ops); 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Signed-off-by: Akhil P Oommen Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 70 ++++++++++++++++++++++++++= ++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 30 +++++-------- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 -- drivers/gpu/drm/msm/adreno/adreno_device.c | 2 + drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +- drivers/gpu/drm/msm/msm_drv.c | 17 ++++---- 6 files changed, 92 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gmu.c index ec13b27feee7..71bb621b01f3 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -2063,7 +2063,7 @@ void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu) pm_runtime_put(&gpu->pdev->dev); } =20 -void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu) +static void a6xx_gmu_destroy(struct a6xx_gpu *a6xx_gpu) { struct adreno_gpu *adreno_gpu =3D &a6xx_gpu->base; struct a6xx_gmu *gmu =3D &a6xx_gpu->gmu; @@ -2143,7 +2143,7 @@ static void __iomem *a6xx_gmu_get_mmio(struct platfor= m_device *pdev, resource_si return ret; } =20 -int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *n= ode) +static int a6xx_gmu_wrapper_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct de= vice_node *node) { struct platform_device *pdev =3D of_find_device_by_node(node); struct adreno_gpu *adreno_gpu =3D &a6xx_gpu->base; @@ -2213,6 +2213,8 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, = struct device_node *node) goto err_mmio; } =20 + mutex_init(&gmu->lock); + gmu->initialized =3D true; =20 return 0; @@ -2230,7 +2232,7 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, = struct device_node *node) return ret; } =20 -int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) +static int a6xx_gmu_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct device_nod= e *node) { struct platform_device *pdev =3D of_find_device_by_node(node); struct adreno_gpu *adreno_gpu =3D &a6xx_gpu->base; @@ -2415,6 +2417,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct d= evice_node *node) /* Initialize RPMh */ a6xx_gmu_rpmh_init(gmu); =20 + mutex_init(&gmu->lock); gmu->initialized =3D true; =20 return 0; @@ -2444,3 +2447,64 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct = device_node *node) =20 return ret; } + +static int a6xx_gmu_bind(struct device *dev, struct device *master, void *= data) +{ + int (*bind)(struct a6xx_gpu *gpu, struct device_node *node) =3D of_device= _get_match_data(dev); + struct a6xx_gpu *a6xx_gpu =3D dev_get_drvdata(dev); + + if (WARN_ON(!a6xx_gpu)) + return -ENODEV; + + return bind(a6xx_gpu, dev->of_node); +} + +static void a6xx_gmu_unbind(struct device *dev, struct device *master, voi= d *data) +{ + struct a6xx_gpu *a6xx_gpu =3D dev_get_drvdata(dev); + + a6xx_gmu_destroy(a6xx_gpu); + dev_set_drvdata(dev, NULL); +} + +static const struct component_ops a6xx_gmu_bind_ops =3D { + .bind =3D a6xx_gmu_bind, + .unbind =3D a6xx_gmu_unbind, +}; + +static int a6xx_gmu_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &a6xx_gmu_bind_ops); +} + +static void a6xx_gmu_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &a6xx_gmu_bind_ops); +} + +static const struct of_device_id a6xx_gmu_dt_match[] =3D { + { .compatible =3D "qcom,adreno-gmu", .data =3D a6xx_gmu_pdev_bind }, + { .compatible =3D "qcom,adreno-rgmu", .data =3D a6xx_gmu_wrapper_pdev_bin= d }, + { .compatible =3D "qcom,adreno-gmu-wrapper", .data =3D a6xx_gmu_wrapper_p= dev_bind }, + { } +}; +MODULE_DEVICE_TABLE(of, a6xx_gmu_dt_match); + +static struct platform_driver adreno_gmu_driver =3D { + .probe =3D a6xx_gmu_probe, + .remove =3D a6xx_gmu_remove, + .driver =3D { + .name =3D "adreno_gmu", + .of_match_table =3D a6xx_gmu_dt_match, + }, +}; + +void __init adreno_gmu_register(void) +{ + platform_driver_register(&adreno_gmu_driver); +} + +void __exit adreno_gmu_unregister(void) +{ + platform_driver_unregister(&adreno_gmu_driver); +} diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gpu.c index d5aba072f44c..b4ae38e1a3d8 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include =20 @@ -2409,8 +2410,6 @@ static void a6xx_destroy(struct msm_gpu *gpu) =20 a6xx_llc_slices_destroy(a6xx_gpu); =20 - a6xx_gmu_remove(a6xx_gpu); - adreno_gpu_cleanup(adreno_gpu); =20 kfree(a6xx_gpu); @@ -2622,6 +2621,7 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_devic= e *dev) struct adreno_platform_config *config =3D pdev->dev.platform_data; const struct adreno_info *info =3D config->info; struct device_node *node; + struct platform_device *gmu_pdev; struct a6xx_gpu *a6xx_gpu; struct adreno_gpu *adreno_gpu; struct msm_gpu *gpu; @@ -2637,17 +2637,14 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_dev= ice *dev) adreno_gpu =3D &a6xx_gpu->base; gpu =3D &adreno_gpu->base; =20 - mutex_init(&a6xx_gpu->gmu.lock); spin_lock_init(&a6xx_gpu->aperture_lock); =20 adreno_gpu->registers =3D NULL; =20 - /* Check if there is a GMU phandle and set it up */ node =3D of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0); - /* FIXME: How do we gracefully handle this? */ - BUG_ON(!node); - - adreno_gpu->gmu_is_wrapper =3D of_device_is_compatible(node, "qcom,adreno= -gmu-wrapper"); + WARN_ON(!node); + adreno_gpu->gmu_is_wrapper =3D of_device_is_compatible(node, + "qcom,adreno-gmu-wrapper"); =20 adreno_gpu->base.hw_apriv =3D !!(info->quirks & ADRENO_QUIRK_HAS_HW_APRIV); @@ -2686,16 +2683,6 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_devi= ce *dev) if (adreno_is_a618(adreno_gpu) || adreno_is_7c3(adreno_gpu)) priv->gpu_clamp_to_idle =3D true; =20 - if (adreno_has_gmu_wrapper(adreno_gpu) || adreno_has_rgmu(adreno_gpu)) - ret =3D a6xx_gmu_wrapper_init(a6xx_gpu, node); - else - ret =3D a6xx_gmu_init(a6xx_gpu, node); - of_node_put(node); - if (ret) { - a6xx_destroy(&(a6xx_gpu->base.base)); - return ERR_PTR(ret); - } - adreno_gpu->uche_trap_base =3D 0x1fffffffff000ull; =20 msm_mmu_set_fault_handler(to_msm_vm(gpu->vm)->mmu, gpu, @@ -2710,6 +2697,13 @@ static struct msm_gpu *a6xx_gpu_init(struct drm_devi= ce *dev) /* Set up the preemption specific bits and pieces for each ringbuffer */ a6xx_preempt_init(gpu); =20 + gmu_pdev =3D of_find_device_by_node(node); + of_node_put(node); + if (gmu_pdev) { + platform_set_drvdata(gmu_pdev, a6xx_gpu); + put_device(&gmu_pdev->dev); + } + return gpu; } =20 diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/ad= reno/a6xx_gpu.h index eb431e5e00b1..fe8d68df9944 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -268,9 +268,6 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu); int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state); void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state stat= e); =20 -int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node); -int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *n= ode); -void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu); void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu); =20 void a6xx_preempt_init(struct msm_gpu *gpu); diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/m= sm/adreno/adreno_device.c index 67686424f3a1..d70f98e283d5 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -423,6 +423,7 @@ void __init adreno_register(void) return; =20 platform_driver_register(&adreno_driver); + adreno_gmu_register(); } =20 void __exit adreno_unregister(void) @@ -430,5 +431,6 @@ void __exit adreno_unregister(void) if (skip_gpu) return; =20 + adreno_gmu_unregister(); platform_driver_unregister(&adreno_driver); } diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/= adreno/adreno_gpu.h index ec643b84646b..3a05cd98d215 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -642,7 +642,8 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct ms= m_gpu_state *state); int adreno_gpu_state_put(struct msm_gpu_state *state); void adreno_show_object(struct drm_printer *p, void **ptr, int len, bool *encoded); - +void adreno_gmu_register(void); +void adreno_gmu_unregister(void); /* * Common helper function to initialize the default address space for arm-= smmu * attached targets diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index af5aa7ff6179..426255fd0801 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1021,7 +1021,7 @@ static const struct of_device_id msm_gpu_match[] =3D { static int add_gpu_components(struct device *dev, struct component_match **matchptr) { - struct device_node *np; + struct device_node *np, *gmu_np; =20 np =3D of_find_matching_node(NULL, msm_gpu_match); if (!np) @@ -1030,6 +1030,11 @@ static int add_gpu_components(struct device *dev, if (of_device_is_available(np) && adreno_has_gpu(np)) drm_of_component_match_add(dev, matchptr, component_compare_of, np); =20 + gmu_np =3D of_parse_phandle(np, "qcom,gmu", 0); + if (of_device_is_available(gmu_np)) + drm_of_component_match_add(dev, matchptr, component_compare_of, gmu_np); + + of_node_put(gmu_np); of_node_put(np); =20 return 0; @@ -1131,13 +1136,9 @@ int msm_gpu_probe(struct platform_device *pdev) if (ret) return ret; =20 - /* - * The GPU pdev acts as both the component master and the sole - * component (added by adreno_probe()). Future patches add the - * GMU node as a second component on this same master. - */ - drm_of_component_match_add(&pdev->dev, &match, - component_compare_of, pdev->dev.of_node); + ret =3D add_gpu_components(&pdev->dev, &match); + if (ret) + return ret; =20 return component_master_add_with_match(&pdev->dev, &msm_gpu_drm_ops, match); --=20 2.51.0