From nobody Sat Jun 13 00:35:56 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7B7E4D2EE6; Mon, 11 May 2026 21:09:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533790; cv=none; b=EZVkmtMAM+ujb1HrHAW8Fr1P+paX/bg6CtkwVNGQtnQdOdxVDbpM9iwWIRJOhB43/UsgdFT3MoK6tzzRPdtehZcH1+dgQIKIbRcEFQIjToCAu9Sx2rMae4vZcebCnGZ22lbhotOXK0moPDB0ov2qvg1N2Y8JFLj+RqO29xm+bxo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533790; c=relaxed/simple; bh=R3M1Wd/Iys/ZSh84oAQZ8j5ob1LKTDhbBg/wAEZStYU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZTay8RNX6jOa12k6KW3jNbOjK7AFLYjOTPVxI3jxU120UUuMV3nXyuszqhLYSQ6CX5ETlfYPrSyLkqL7EINqKum75rmkxVF66TAyYiEK75gIZcy7KOcOQSzmDCDhA+FBh8PwAtCuyLqwsJzmQuQKoQr7C8DM8/Gz2oSNmDT4E0A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QEkF1416; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QEkF1416" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778533788; x=1810069788; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R3M1Wd/Iys/ZSh84oAQZ8j5ob1LKTDhbBg/wAEZStYU=; b=QEkF1416SJaMpRmZQYjggNNWV8It1fMuTfihYB9vUvNEebrS057MSb7E 08eGOsfELpM4sEVSOvqJbeq1F4hTCd9e4cSNBOMhgQ1VHoZeDKVHq2XFx z8FIZZj3e86hjEvB+4bk1kGStcavRyggu3552jXiCmL0jxrNQ/Svmd3/2 nA0P77joyZGoQ7AhfrIJP1WEOxpGQISLbbyEFFlA3ToB3ZQewmOkxc5BZ rDPrWD7+DE7nYjm3cfJvLR/78zIQy2KpIWuUS3+Yk1BHP2+4PfUXgg+K/ yxa65T0Y1v606lcczFeNUhNgVgcpp7rLFGudX3nhtzpv+ycyN+pXfF1KW g==; X-CSE-ConnectionGUID: +KrdthPVQaGOexKWfokrCw== X-CSE-MsgGUID: 7tLg/dC0Swe7xJdBc8228Q== X-IronPort-AV: E=McAfee;i="6800,10657,11783"; a="90534527" X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="90534527" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:47 -0700 X-CSE-ConnectionGUID: /j8iG+0BQxWaFMwguWy9xA== X-CSE-MsgGUID: qjzwGiJ2QFivMXw4MxWcpw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="241559242" Received: from rfrazer-mobl3.amr.corp.intel.com (HELO tfalcon-desk.attlocal.net) ([10.124.220.210]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:45 -0700 From: Thomas Falcon To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: "David E . Box" , Bjorn Helgaas , Lukas Wunner , Manivannan Sadhasivam , "Rafael J . Wysocki" , Len Brown , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Falcon Subject: [RFC PATCH v2 1/4] pcie/aspm: Add debug logging for aspm policy config Date: Mon, 11 May 2026 16:09:31 -0500 Message-ID: <20260511210936.562622-2-thomas.falcon@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260511210936.562622-1-thomas.falcon@intel.com> References: <20260511210936.562622-1-thomas.falcon@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Include additional logging for ASPM and Clock PM state changes keeping track of code flow and enabled power saving states. Example output after enabling powersupersave policy: [ 130.179249] pcieport 0000:80:1b.0: Updating ASPM state [ 130.179256] igc 0000:81:00.0: ASPM: Disabling ASPM on this device before= disabling parent [ 130.179368] pcieport 0000:80:1b.0: ASPM: Disabling ASPM before applying = configuration [ 130.179373] pcieport 0000:80:1b.0: ASPM: Configure L1 substates [ 130.179391] pcieport 0000:80:1b.0: ASPM: Configure ASPM state on upstrea= m device [ 130.179395] igc 0000:81:00.0: ASPM: Configure ASPM state on downstream d= evice [ 130.179401] pcieport 0000:80:1b.0: ASPM: enabled states: L1 ASPM-L1.1 PC= I-PM-L1.1 PCI-PM-L1.2 [ 130.179416] pcieport 0000:00:06.0: Updating ASPM state [ 130.179418] nvme 0000:01:00.0: ASPM: Disabling ASPM on this device befor= e disabling parent [ 130.179422] pcieport 0000:00:06.0: ASPM: Disabling ASPM before applying = configuration [ 130.179425] pcieport 0000:00:06.0: ASPM: Configure L1 substates [ 130.179435] pcieport 0000:00:06.0: ASPM: Configure ASPM state on upstrea= m device [ 130.179438] nvme 0000:01:00.0: ASPM: Configure ASPM state on downstream = device [ 130.179442] pcieport 0000:00:06.0: ASPM: enabled states: L1 ASPM-L1.1 AS= PM-L1.2 PCI-PM-L1.1 PCI-PM-L1.2 Suggested-by: David E. Box Signed-off-by: Thomas Falcon --- drivers/pci/pcie/aspm.c | 34 ++++++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 925373b98dff..cd23c1462502 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -372,6 +372,9 @@ static void pcie_set_clkpm(struct pcie_link_state *link= , int enable) /* Need nothing if the specified equals to current state */ if (link->clkpm_enabled =3D=3D enable) return; + + pci_dbg(link->pdev, "%s Clock PM\n", + enable ? "Enabling" : "Disabling"); pcie_set_clkpm_nocheck(link, enable); } =20 @@ -961,11 +964,14 @@ static void pcie_config_aspm_link(struct pcie_link_st= ate *link, u32 state) state &=3D (link->aspm_capable & ~link->aspm_disable); =20 /* Can't enable any substates if L1 is not enabled */ - if (!(state & PCIE_LINK_STATE_L1)) + if (!(state & PCIE_LINK_STATE_L1)) { + pci_dbg(parent, "ASPM: L1 not enabled, disabling L1 substates\n"); state &=3D ~PCIE_LINK_STATE_L1SS; + } =20 /* Spec says both ports must be in D0 before enabling PCI PM substates*/ if (parent->current_state !=3D PCI_D0 || child->current_state !=3D PCI_D0= ) { + pci_dbg(parent, "ASPM: Both ports are not in D0, disable PCI PM L1 subst= ates unless explicitly enabled\n"); state &=3D ~PCIE_LINK_STATE_L1_SS_PCIPM; state |=3D (link->aspm_enabled & PCIE_LINK_STATE_L1_SS_PCIPM); } @@ -973,6 +979,8 @@ static void pcie_config_aspm_link(struct pcie_link_stat= e *link, u32 state) /* Nothing to do if the link is already in the requested state */ if (link->aspm_enabled =3D=3D state) return; + pci_dbg(parent, "Updating ASPM state\n"); + /* Convert ASPM state to upstream/downstream ASPM register state */ if (state & PCIE_LINK_STATE_L0S_UP) dwstream |=3D PCI_EXP_LNKCTL_ASPM_L0S; @@ -997,16 +1005,34 @@ static void pcie_config_aspm_link(struct pcie_link_s= tate *link, u32 state) * Sec 7.5.3.7 also recommends programming the same ASPM Control * value for all functions of a multi-function device. */ - list_for_each_entry(child, &linkbus->devices, bus_list) + list_for_each_entry(child, &linkbus->devices, bus_list) { + pci_dbg(child, "ASPM: Disabling ASPM on this device before disabling par= ent\n"); pcie_config_aspm_dev(child, 0); + } + pci_dbg(parent, "ASPM: Disabling ASPM before applying configuration\n"); pcie_config_aspm_dev(parent, 0); =20 - if (link->aspm_capable & PCIE_LINK_STATE_L1SS) + if (link->aspm_capable & PCIE_LINK_STATE_L1SS) { + pci_dbg(parent, "ASPM: Configure L1 substates\n"); pcie_config_aspm_l1ss(link, state); + } =20 + pci_dbg(parent, "ASPM: Configure ASPM state on upstream device\n"); pcie_config_aspm_dev(parent, upstream); - list_for_each_entry(child, &linkbus->devices, bus_list) + list_for_each_entry(child, &linkbus->devices, bus_list) { + pci_dbg(child, "ASPM: Configure ASPM state on downstream device\n"); pcie_config_aspm_dev(child, dwstream); + } + + pci_dbg(parent, "ASPM: enabled states:%s%s%s%s%s%s%s%s\n", + FLAG(state, L0S_UP, " L0s-Upstream"), + FLAG(state, L0S_DW, " L0s-Downstream"), + FLAG(state, L1, " L1"), + FLAG(state, L1_1, " ASPM-L1.1"), + FLAG(state, L1_2, " ASPM-L1.2"), + FLAG(state, L1_1_PCIPM, " PCI-PM-L1.1"), + FLAG(state, L1_2_PCIPM, " PCI-PM-L1.2"), + FLAG(state, CLKPM, " ClockPM")); =20 link->aspm_enabled =3D state; =20 --=20 2.43.0 From nobody Sat Jun 13 00:35:56 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80B394D2EF2; Mon, 11 May 2026 21:09:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="90534535" X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="90534535" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:48 -0700 X-CSE-ConnectionGUID: TGEMsOfeR1W3fvY+ldgqdw== X-CSE-MsgGUID: 1bNp4yDRSuKn1Hzk/KWBkA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="241559246" Received: from rfrazer-mobl3.amr.corp.intel.com (HELO tfalcon-desk.attlocal.net) ([10.124.220.210]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:47 -0700 From: Thomas Falcon To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: "David E . Box" , Bjorn Helgaas , Lukas Wunner , Manivannan Sadhasivam , "Rafael J . Wysocki" , Len Brown , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Falcon Subject: [RFC PATCH v2 2/4] pcie/aspm: Enable all power-saving states during link state initialization Date: Mon, 11 May 2026 16:09:32 -0500 Message-ID: <20260511210936.562622-3-thomas.falcon@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260511210936.562622-1-thomas.falcon@intel.com> References: <20260511210936.562622-1-thomas.falcon@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Setting powersave and powersupersave states at ASPM link state initialization allows for a simpler and more maintainable enabling flow that presumes all advertised power states work. Restrict this behavior to systems with a BIOS release during or after 2025. Suggested-by: David E. Box Signed-off-by: Thomas Falcon --- v2: -- pcie_aspm_legacy_config_check() returns bool instead of int -- only log whether aspm is configured at build or boot time once --- drivers/pci/pcie/aspm.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index cd23c1462502..e93b72494534 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -24,6 +24,7 @@ #include #include #include +#include =20 #include "../pci.h" =20 @@ -1057,6 +1058,23 @@ static void free_link_state(struct pcie_link_state *= link) kfree(link); } =20 +static bool pcie_aspm_legacy_config_check(void) +{ + static bool legacy_aspm_config; + static bool checked; + + if (checked) + return legacy_aspm_config; + if (dmi_get_bios_year() < 2025) + legacy_aspm_config =3D true; + + pr_info_once("ASPM configuration is determined at %s time\n", + legacy_aspm_config ? "build" : "boot"); + checked =3D true; + + return legacy_aspm_config; +} + static int pcie_aspm_sanity_check(struct pci_dev *pdev) { struct pci_dev *child; @@ -1196,8 +1214,9 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev) * the BIOS's expectation, we'll do so once pci_enable_device() is * called. */ - if (aspm_policy !=3D POLICY_POWERSAVE && - aspm_policy !=3D POLICY_POWER_SUPERSAVE) { + if (!pcie_aspm_legacy_config_check() || + (aspm_policy !=3D POLICY_POWERSAVE && + aspm_policy !=3D POLICY_POWER_SUPERSAVE)) { pcie_config_aspm_path(link); pcie_set_clkpm(link, policy_to_clkpm_state(link)); } @@ -1379,8 +1398,9 @@ void pcie_aspm_powersave_config_link(struct pci_dev *= pdev) if (aspm_disabled || !link) return; =20 - if (aspm_policy !=3D POLICY_POWERSAVE && - aspm_policy !=3D POLICY_POWER_SUPERSAVE) + if (!pcie_aspm_legacy_config_check() || + (aspm_policy !=3D POLICY_POWERSAVE && + aspm_policy !=3D POLICY_POWER_SUPERSAVE)) return; =20 down_read(&pci_bus_sem); --=20 2.43.0 From nobody Sat Jun 13 00:35:56 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB3A34D8D83; Mon, 11 May 2026 21:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533791; cv=none; b=B53+MOkmnzP5A8UTFtL13E+iZEPgpiDyQGSS5M13Cvz1rBE/NEXNpabb0rBAQUk59kL3Jf9sqZbN7J0Fa/KQ1jTYqIQ2nDrZI9NUzGTcqzT3bDYgF30m7ebnV/NLRD2uFb00mBuFxh7z+XZisHOMGzHE+hC9ymV2s3DTpNjkXkk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533791; c=relaxed/simple; bh=7D4fT+zPuVHr8Q5e3aJoqT1YsGA8vp4dbvyoG9Ho010=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oeWSwmzgGpLN4rBCxZl3lwO3r0RSrIf4aUtsuDwcbtPoa13k3LXUXJU16r+nY0chOIYvvdW5Eq3+qM/F4kF/J7VjnH5kz27NTNwr7oWiV0/JGyLO59/omBQG8rijQ5xDeWZidKb/uksTiiB5yn9Aj5sJUGbpIj8+c2+yBtL4Fww= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=S0WIbHX6; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="S0WIbHX6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778533789; x=1810069789; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7D4fT+zPuVHr8Q5e3aJoqT1YsGA8vp4dbvyoG9Ho010=; b=S0WIbHX679c7u8bx16Ow9EFpghEO+EZuLmcUQl0hdGxLoZ3MnHkCZH4J qHQWs3Ep1G9NCXZOGoCMh3jgxNPIvjNFfhOLq4wK/Wl33NjL+6GSINESk v+NNa1/X4NeLXw3ObLt6J4lTOZ7f/w5kzLqTBnbKUx4zJ16872LnMxnbi +SGf8cIds3bLk+WH6cvpL6OgTJQg0vJ3TgMASC9WFYpspNLd0Dggs6G0C 4IRfcfSTeOlpMWzCN4AzBPhebQlAIynFTVVjCTmIGvGj9MLxawIpaX0bi gLUklEP7EbNmRbb32cBNCivNTbhPXab/jMnOUpNLDrIgpzeZDMKFi2Afc Q==; X-CSE-ConnectionGUID: /wDAKkzJRQm2waxvoqkXZg== X-CSE-MsgGUID: xCY47SMqRCmrGufkqJIqsQ== X-IronPort-AV: E=McAfee;i="6800,10657,11783"; a="90534540" X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="90534540" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:49 -0700 X-CSE-ConnectionGUID: 8av0VsPhTCqXhjSJqqzqEA== X-CSE-MsgGUID: nZIVucqnQWCGTAFbfjo3Sg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="241559254" Received: from rfrazer-mobl3.amr.corp.intel.com (HELO tfalcon-desk.attlocal.net) ([10.124.220.210]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:48 -0700 From: Thomas Falcon To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: "David E . Box" , Bjorn Helgaas , Lukas Wunner , Manivannan Sadhasivam , "Rafael J . Wysocki" , Len Brown , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Falcon Subject: [RFC PATCH v2 3/4] pcie/aspm: Enable all hardware power-saving states by default Date: Mon, 11 May 2026 16:09:33 -0500 Message-ID: <20260511210936.562622-4-thomas.falcon@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260511210936.562622-1-thomas.falcon@intel.com> References: <20260511210936.562622-1-thomas.falcon@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For systems with a BIOS release date starting in 2025, default ASPM policy to powersupersave if supported in the ACPI FADT. Provide a flag, aspm_user_policy, tracking whether a user has requested a specific power state to give those precedence. Do not enable all states if user has chosen a specific policy or disabled ASPM using the pcie_aspm module parameter. Suggested-by: David E. Box Signed-off-by: Thomas Falcon --- v2: -- Removed extra whitespace -- Fixed unbalanced brackets -- Replaced second dmi_bios_year_check() with pcie_aspm_legacy_config_c= heck() --- drivers/pci/pci-acpi.c | 3 +++ drivers/pci/pcie/aspm.c | 16 ++++++++++++++++ include/linux/pci.h | 1 + 3 files changed, 20 insertions(+) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 4d0f2cb6c695..c73a6b06fc43 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1523,6 +1523,9 @@ static int __init acpi_pci_init(void) if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so dis= able it\n"); pcie_no_aspm(); + } else { + /* If ASPM is supported, configure the default policy here. */ + pcie_aspm_policy_config_init(); } =20 if (acpi_pci_disabled) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index e93b72494534..063ebe81a9cd 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -267,6 +267,8 @@ static int aspm_policy =3D POLICY_POWER_SUPERSAVE; #else static int aspm_policy; #endif +static int aspm_default_policy =3D POLICY_POWER_SUPERSAVE; +static bool aspm_user_policy; =20 static const char *policy_str[] =3D { [POLICY_DEFAULT] =3D "default", @@ -1609,6 +1611,7 @@ static int pcie_aspm_set_policy(const char *val, down_read(&pci_bus_sem); mutex_lock(&aspm_lock); aspm_policy =3D i; + aspm_user_policy =3D true; list_for_each_entry(link, &link_list, sibling) { pcie_config_aspm_link(link, policy_to_aspm_state(link)); pcie_set_clkpm(link, policy_to_clkpm_state(link)); @@ -1810,6 +1813,19 @@ static int __init pcie_aspm_disable(char *str) =20 __setup("pcie_aspm=3D", pcie_aspm_disable); =20 +void __init pcie_aspm_policy_config_init(void) +{ + /* + * Set ASPM policy here, enabling all power-saving states + * unless ASPM has been disabled or the user has already + * requested a policy or the systems BIOS release date + * is before the year 2025. Otherwise use BIOS defaults. + */ + if (!aspm_disabled && !aspm_user_policy && + !pcie_aspm_legacy_config_check()) + aspm_policy =3D aspm_default_policy; +} + void pcie_no_aspm(void) { /* diff --git a/include/linux/pci.h b/include/linux/pci.h index 2c4454583c11..36fa5579709c 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1915,6 +1915,7 @@ int pci_disable_link_state_locked(struct pci_dev *pde= v, int state); int pci_enable_link_state(struct pci_dev *pdev, int state); int pci_enable_link_state_locked(struct pci_dev *pdev, int state); void pcie_no_aspm(void); +void pcie_aspm_policy_config_init(void); bool pcie_aspm_support_enabled(void); bool pcie_aspm_enabled(struct pci_dev *pdev); #else --=20 2.43.0 From nobody Sat Jun 13 00:35:56 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1E474D2EFA; Mon, 11 May 2026 21:09:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533793; cv=none; b=ijCn+rd/aHA8/y2C8Mwlhp45IWPMNODAXVfRppdigkWVgyISDpaFP6nb3x9gXT/A0EjQWKRsObwtRxexs0MePJvLT/hgJBnBGxhdCLFUwRQFg2ZZ4IdqprNzemO+xkc7iiPs4uN7Dy9Z3DGPk0wXiFGSUS82HaM2Q42OImZROFA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778533793; c=relaxed/simple; bh=5vlW8i9B35i+84jUFlbY9V1baOQ6A58XThDU8o5p0eI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VLSs7mkru7u/MmPGC8l4AiIl5eUY+FRvawgyMbG7poWSanFgGCuFv/tO/1iG6XjpG35ks0l2zAB33Jvm1/kJ4xtMqVXjRSbSBr61RHQYQLsgHqXajleXINtdBv7sOqGOkcZd/vlvXun7jb7vrepwi672OMbqmObyjyNrMonQ+x0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=V7EK513b; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="V7EK513b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1778533790; x=1810069790; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5vlW8i9B35i+84jUFlbY9V1baOQ6A58XThDU8o5p0eI=; b=V7EK513bIKjWksdt8bptz6W5Ehwa36pjc2sHm8UxEdpxF/m9IepEoHfb NDDsfGRC1n54rdgfO8HDLNdoVJFK2l0YqIDDlKL2XZ9s5agSf4pL6y5gu 5WKE6bZxuNCxdK30oxvZvyCngIFhiK/kOVu7/mTXTMPD3JaI8+G6zgO0u D1Xqu4vjiQjwRM+x9k764Dv+2tDKfXH+6WSxQDCaaYJspVwbogGoH6iiq RzgzfYZiTwDJQFWGIN2oMbuJ6KkAR8XfpvAKg3ek8OBOtfZmBzy25mYSi ak59mWQsR5NsfnmaB8Cdm6p0TV/MTxhgh3loazeU3gIqLeLc5ZrUzx/iD A==; X-CSE-ConnectionGUID: RD9sWk4ySfSUZy1o2W4k7Q== X-CSE-MsgGUID: vnnK2b+UQ6qpa5CJTdQdQA== X-IronPort-AV: E=McAfee;i="6800,10657,11783"; a="90534545" X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="90534545" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:50 -0700 X-CSE-ConnectionGUID: InPz/bmNT4OLd8o7kIEKJg== X-CSE-MsgGUID: enhRJpf9R0aaa0o8Ug07ZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,229,1770624000"; d="scan'208";a="241559257" Received: from rfrazer-mobl3.amr.corp.intel.com (HELO tfalcon-desk.attlocal.net) ([10.124.220.210]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 14:09:49 -0700 From: Thomas Falcon To: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Cc: "David E . Box" , Bjorn Helgaas , Lukas Wunner , Manivannan Sadhasivam , "Rafael J . Wysocki" , Len Brown , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Falcon Subject: [RFC PATCH v2 4/4] pcie/aspm: Remove CONFIG_PCIEASPM_* policy definitions Date: Mon, 11 May 2026 16:09:34 -0500 Message-ID: <20260511210936.562622-5-thomas.falcon@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260511210936.562622-1-thomas.falcon@intel.com> References: <20260511210936.562622-1-thomas.falcon@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ASPM policy now defaults to POLICY_POWER_SUPERSAVE for new systems and POLICY_DEFAULT for others while allowing the user to change policy using the existing pcie_aspm module parameter. Safely remove CONFIG_PCIEASPM_* policy settings. Suggested-by: David E. Box Signed-off-by: Thomas Falcon --- Documentation/arch/x86/amd-debugging.rst | 5 ++-- arch/mips/configs/bmips_stb_defconfig | 1 - arch/mips/configs/loongson2k_defconfig | 1 - drivers/pci/pcie/Kconfig | 33 ------------------------ drivers/pci/pcie/aspm.c | 8 ------ 5 files changed, 2 insertions(+), 46 deletions(-) diff --git a/Documentation/arch/x86/amd-debugging.rst b/Documentation/arch/= x86/amd-debugging.rst index d92bf59d62c7..3f346a46357a 100644 --- a/Documentation/arch/x86/amd-debugging.rst +++ b/Documentation/arch/x86/amd-debugging.rst @@ -260,9 +260,8 @@ of the devices. ASPM ---- For the best runtime power consumption, ASPM should be programmed as inten= ded -by the BIOS from the hardware vendor. To accomplish this the Linux kernel -should be compiled with ``CONFIG_PCIEASPM_DEFAULT`` set to ``y`` and the -sysfs file ``/sys/module/pcie_aspm/parameters/policy`` should not be modif= ied. +by the BIOS from the hardware vendor. To accomplish this the sysfs file +``/sys/module/pcie_aspm/parameters/policy`` should not be modified. =20 Most notably, if L1.2 is not configured properly for any devices, the SoC will not be able to enter the deepest idle state. diff --git a/arch/mips/configs/bmips_stb_defconfig b/arch/mips/configs/bmip= s_stb_defconfig index ecfa7f777efa..bb19073986a8 100644 --- a/arch/mips/configs/bmips_stb_defconfig +++ b/arch/mips/configs/bmips_stb_defconfig @@ -22,7 +22,6 @@ CONFIG_RD_XZ=3Dy # CONFIG_RD_LZ4 is not set CONFIG_PCI=3Dy CONFIG_PCI_MSI=3Dy -CONFIG_PCIEASPM_POWERSAVE=3Dy CONFIG_PCIEPORTBUS=3Dy CONFIG_PCIE_BRCMSTB=3Dy CONFIG_CPU_FREQ=3Dy diff --git a/arch/mips/configs/loongson2k_defconfig b/arch/mips/configs/loo= ngson2k_defconfig index ca534a6b66de..0a2c123eee69 100644 --- a/arch/mips/configs/loongson2k_defconfig +++ b/arch/mips/configs/loongson2k_defconfig @@ -88,7 +88,6 @@ CONFIG_RFKILL=3Dm CONFIG_RFKILL_INPUT=3Dy CONFIG_PCIEPORTBUS=3Dy CONFIG_HOTPLUG_PCI_PCIE=3Dy -CONFIG_PCIEASPM_PERFORMANCE=3Dy CONFIG_HOTPLUG_PCI=3Dy CONFIG_DEVTMPFS=3Dy CONFIG_DEVTMPFS_MOUNT=3Dy diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig index 207c2deae35f..069058870506 100644 --- a/drivers/pci/pcie/Kconfig +++ b/drivers/pci/pcie/Kconfig @@ -81,39 +81,6 @@ config PCIEASPM =20 When in doubt, say Y. =20 -choice - prompt "Default ASPM policy" - default PCIEASPM_DEFAULT - depends on PCIEASPM - -config PCIEASPM_DEFAULT - bool "BIOS default" - depends on PCIEASPM - help - Use the BIOS defaults for PCI Express ASPM. - -config PCIEASPM_POWERSAVE - bool "Powersave" - depends on PCIEASPM - help - Enable PCI Express ASPM L0s and L1 where possible, even if the - BIOS did not. - -config PCIEASPM_POWER_SUPERSAVE - bool "Power Supersave" - depends on PCIEASPM - help - Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where - possible. This would result in higher power savings while staying in L1 - where the components support it. - -config PCIEASPM_PERFORMANCE - bool "Performance" - depends on PCIEASPM - help - Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them. -endchoice - config PCIE_PME def_bool y depends on PCIEPORTBUS && PM diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 063ebe81a9cd..4502f56f2314 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -258,15 +258,7 @@ static LIST_HEAD(link_list); #define POLICY_POWERSAVE 2 /* high power saving */ #define POLICY_POWER_SUPERSAVE 3 /* possibly even more power saving */ =20 -#ifdef CONFIG_PCIEASPM_PERFORMANCE -static int aspm_policy =3D POLICY_PERFORMANCE; -#elif defined CONFIG_PCIEASPM_POWERSAVE -static int aspm_policy =3D POLICY_POWERSAVE; -#elif defined CONFIG_PCIEASPM_POWER_SUPERSAVE -static int aspm_policy =3D POLICY_POWER_SUPERSAVE; -#else static int aspm_policy; -#endif static int aspm_default_policy =3D POLICY_POWER_SUPERSAVE; static bool aspm_user_policy; =20 --=20 2.43.0