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([116.128.244.171]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2baf1d405adsm96889215ad.28.2026.05.11.00.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2026 00:57:01 -0700 (PDT) From: Xueqin Luo To: lkp@intel.com Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, llvm@lists.linux.dev, luoxueqin@kylinos.cn, oe-kbuild-all@lists.linux.dev, pierre.gondois@arm.com, rafael@kernel.org, sumitg@nvidia.com, viresh.kumar@linaro.org, zhanjie9@hisilicon.com, zhenglifeng1@huawei.com Subject: [PATCH v3] cpufreq: cppc: Add update_limits support for Highest Performance changes Date: Mon, 11 May 2026 15:56:47 +0800 Message-ID: <20260511075647.206642-1-luoxueqin@kylinos.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <202605101404.fqz0MXIe-lkp@intel.com> References: <202605101404.fqz0MXIe-lkp@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" ACPI CPPC specification requires OSPM to re-evaluate the Highest Performance register when Notify(0x85) is received for a processor device. Implement cppc_cpufreq_update_limits() to refresh the cached highest_perf capability through cppc_get_highest_perf() and update policy->cpuinfo.max_freq accordingly. When autonomous selection mode is enabled, reprogram the runtime MIN_PERF/MAX_PERF envelope against the updated Highest Performance capability through cppc_cpufreq_set_autonomous_perf(). -- change v2->v3: - Fix build issues reported by kernel test robot - Fold cppc_cpufreq_set_autonomous_perf() refactoring into this patch to keep it self-contained Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202605101404.fqz0MXIe-lkp@int= el.com/ Signed-off-by: Xueqin Luo --- drivers/cpufreq/cppc_cpufreq.c | 89 +++++++++++++++++++++++++++++----- 1 file changed, 76 insertions(+), 13 deletions(-) diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c index 7e7f9dfb7a24..9184d5570de8 100644 --- a/drivers/cpufreq/cppc_cpufreq.c +++ b/drivers/cpufreq/cppc_cpufreq.c @@ -843,6 +843,80 @@ static int cppc_cpufreq_set_boost(struct cpufreq_polic= y *policy, int state) return 0; } =20 +/** + * cppc_cpufreq_set_autonomous_perf - Configure performance bounds for + * autonomous mode + * @policy: cpufreq policy structure + * + * When enabling autonomous selection, program MIN_PERF and MAX_PERF from + * current policy limits so that the platform uses the correct performance + * bounds immediately. + * + * Return: 0 on success, negative error code on failure. + */ +static int cppc_cpufreq_set_autonomous_perf(struct cpufreq_policy *policy) +{ + struct cppc_cpudata *cpu_data =3D policy->driver_data; + u32 old_min_perf =3D cpu_data->perf_ctrls.min_perf; + u32 old_max_perf =3D cpu_data->perf_ctrls.max_perf; + int ret; + + cppc_cpufreq_update_perf_limits(cpu_data, policy); + + ret =3D cppc_set_perf(policy->cpu, &cpu_data->perf_ctrls); + if (ret) { + cpu_data->perf_ctrls.min_perf =3D old_min_perf; + cpu_data->perf_ctrls.max_perf =3D old_max_perf; + return ret; + } + + return 0; +} + +static void cppc_cpufreq_update_limits(struct cpufreq_policy *policy) +{ + struct cppc_cpudata *cpu_data =3D policy->driver_data; + u64 prev_highest_perf; + u64 highest_perf; + u64 nominal_perf; + int ret; + + guard(cpufreq_policy_write)(policy); + + prev_highest_perf =3D cpu_data->perf_caps.highest_perf; + + ret =3D cppc_get_highest_perf(policy->cpu, &highest_perf); + if (ret) + return; + + if (highest_perf =3D=3D prev_highest_perf) + return; + + cpu_data->perf_caps.highest_perf =3D highest_perf; + nominal_perf =3D min_t(u64, highest_perf, + cpu_data->perf_caps.nominal_perf); + + policy->max =3D cppc_perf_to_khz(&cpu_data->perf_caps, + policy->boost_enabled ? + highest_perf : nominal_perf); + + policy->cpuinfo.max_freq =3D policy->max; + + /* + * Autonomous selection mode uses MIN/MAX performance as runtime + * hardware control bounds. + * + * Re-program them when highest_perf changes. + */ + if (cpu_data->perf_ctrls.auto_sel) + cppc_cpufreq_set_autonomous_perf(policy); + + pr_debug("CPU%d: highest_perf updated %llu -> %llu\n", + policy->cpu, + prev_highest_perf, + highest_perf); +} + static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *b= uf) { struct cppc_cpudata *cpu_data =3D policy->driver_data; @@ -885,20 +959,8 @@ static ssize_t store_auto_select(struct cpufreq_policy= *policy, cpu_data->perf_ctrls.auto_sel =3D val; =20 if (val) { - u32 old_min_perf =3D cpu_data->perf_ctrls.min_perf; - u32 old_max_perf =3D cpu_data->perf_ctrls.max_perf; - - /* - * When enabling autonomous selection, program MIN_PERF and - * MAX_PERF from current policy limits so that the platform - * uses the correct performance bounds immediately. - */ - cppc_cpufreq_update_perf_limits(cpu_data, policy); - - ret =3D cppc_set_perf(policy->cpu, &cpu_data->perf_ctrls); + ret =3D cppc_cpufreq_set_autonomous_perf(policy); if (ret) { - cpu_data->perf_ctrls.min_perf =3D old_min_perf; - cpu_data->perf_ctrls.max_perf =3D old_max_perf; cppc_set_auto_sel(policy->cpu, false); cpu_data->perf_ctrls.auto_sel =3D false; return ret; @@ -1009,6 +1071,7 @@ static struct cpufreq_driver cppc_cpufreq_driver =3D { .init =3D cppc_cpufreq_cpu_init, .exit =3D cppc_cpufreq_cpu_exit, .set_boost =3D cppc_cpufreq_set_boost, + .update_limits =3D cppc_cpufreq_update_limits, .attr =3D cppc_cpufreq_attr, .name =3D "cppc_cpufreq", }; --=20 2.43.0